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src/opcodes ChangeLog cgen-ibld.in fr30-ibld.c ...
- From: nickc at sourceware dot org
- To: binutils-cvs at sources dot redhat dot com
- Date: 5 Mar 2006 08:38:53 -0000
- Subject: src/opcodes ChangeLog cgen-ibld.in fr30-ibld.c ...
CVSROOT: /cvs/src
Module name: src
Changes by: nickc@sourceware.org 2006-03-05 08:38:53
Modified files:
opcodes : ChangeLog cgen-ibld.in fr30-ibld.c frv-ibld.c
ip2k-ibld.c iq2000-asm.c iq2000-ibld.c
m32c-ibld.c m32r-ibld.c openrisc-ibld.c
xc16x-ibld.c xstormy16-ibld.c
Log message:
* cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bit
value into an unsigned 32-bit field when the host is a 64-bit machine.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.911&r2=1.912
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/cgen-ibld.in.diff?cvsroot=src&r1=1.19&r2=1.20
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/fr30-ibld.c.diff?cvsroot=src&r1=1.15&r2=1.16
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/frv-ibld.c.diff?cvsroot=src&r1=1.8&r2=1.9
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ip2k-ibld.c.diff?cvsroot=src&r1=1.4&r2=1.5
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/iq2000-asm.c.diff?cvsroot=src&r1=1.12&r2=1.13
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/iq2000-ibld.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32c-ibld.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/m32r-ibld.c.diff?cvsroot=src&r1=1.20&r2=1.21
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/openrisc-ibld.c.diff?cvsroot=src&r1=1.11&r2=1.12
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/xc16x-ibld.c.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/xstormy16-ibld.c.diff?cvsroot=src&r1=1.5&r2=1.6