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src gas/testsuite/gas/mips/mips.exp gas/Change ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	ths@sourceware.org	2006-06-06 10:49:48

Modified files:
	gas/testsuite/gas/mips: mips.exp 
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/testsuite  : ChangeLog 
	include/opcode : mips.h 
	opcodes        : ChangeLog mips-dis.c mips-opc.c 
Added files:
	gas/testsuite/gas/mips: mips64-dsp.d mips64-dsp.s 

Log message:
	[ gas/ChangeLog ]
	* config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
	(CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
	(macro_build): Update comment.
	(mips_ip): Allow DSP64 instructions for MIPS64R2.
	(mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
	CPU_HAS_MDMX.
	(mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
	MIPS_CPU_ASE_MDMX flags for sb1.
	
	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips64-dsp.s, gas/mips/mips64-dsp.d: New DSP64 tests.
	* gas/mips/mips.exp: Run DSP64 tests.
	
	[ opcodes/ChangeLog ]
	* mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
	* mips-opc.c: Add DSP64 instructions.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips64-dsp.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips64-dsp.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips.exp.diff?cvsroot=src&r1=1.118&r2=1.119
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.2927&r2=1.2928
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.339&r2=1.340
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1032&r2=1.1033
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.51&r2=1.52
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.956&r2=1.957
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.62&r2=1.63
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.58&r2=1.59


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