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src/include/opcode ChangeLog rx.h
- From: dj at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 28 Jul 2010 21:58:22 -0000
- Subject: src/include/opcode ChangeLog rx.h
CVSROOT: /cvs/src
Module name: src
Changes by: dj@sourceware.org 2010-07-28 21:58:22
Modified files:
include/opcode : ChangeLog rx.h
Log message:
[sim/rx]
* README.txt: New.
* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
New. Default to enabled.
* configure: Regenerate.
* cpu.h (regs_type): Add cycle tracking info.
(reset_pipeline_stats): Declare.
(halt_pipeline_stats): Declare.
(pipeline_stats): Declare.
* main.c (done): Call pipeline_stats().
* mem.h (rx_mem_ptr): Moved to here ...
* mem.c (mem_ptr): ... from here. Rename throughout.
(mem_put_byte): Move LEDs to Port A. Add Port B to control cycle
statistics. Move UART to SCI4.
(mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles.
* reg.c (init_regs): Set Rt reg to -1 (no reg).
* rx.c: Add cycle counting and statistics throughout.
(rx_get_byte): Optimize for speed.
(decode_opcode): Likewise.
(reset_pipeline_stats): New.
(halt_pipeline_stats): New.
(pipeline_stats): New.
* trace.c (sim_disasm_one): Print cycle count.
[include/opcode]
* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.412&r2=1.413
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/rx.h.diff?cvsroot=src&r1=1.3&r2=1.4