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src/gas ChangeLog write.c config/tc-rx.c tests ...
- From: nickc at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 31 Jan 2011 16:43:15 -0000
- Subject: src/gas ChangeLog write.c config/tc-rx.c tests ...
CVSROOT: /cvs/src
Module name: src
Changes by: nickc@sourceware.org 2011-01-31 16:43:15
Modified files:
gas : ChangeLog write.c
gas/config : tc-rx.c
gas/testsuite : ChangeLog
gas/testsuite/gas/rx: bcnd.d bra.d macros.inc max.d max.sm mov.d
mov.sm rx-asm-good.d rx-asm-good.s
gas/testsuite/gas/all: align.d
gas/testsuite/gas/elf: elf.exp group1a.d groupautoa.d section4.d
section7.d
gas/testsuite/gas/macros: semi.d semi.s
Log message:
* write.c (write_contents): Include output file name and bfd error
value when reporting the inability to write to the output file.
* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
frag that has a non-zero fill value.
* gas/all/align.d: Skip for the RX.
* gas/elf/group1a.d: Likewise.
* gas/elf/groupautoa.d: Likewise.
* gas/elf/elf.exp: Do not run section5 test for the RX port.
* gas/elf/section4.d: Likewise.
* gas/elf/section7.d: Likewise.
* gas/macros/semi.s: Fill with a non-zero pattern.
* gas/macros/semi.d: Expect non-zero fill value.
* gas/rx/bcnd.d: Update expected disassembly.
* gas/rx/bra.d: Likewise.
* gas/rx/macros.inc: Add reg1 macro.
* gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP
instruction.
* gas/rx/mov.sm: Likewise.
* gas/rx/max.d: Update expected disassembly.
* gas/rx/mov.d: Likewise.
* gas/rx/rx-asm-good.s: Use Renesas section names.
* gas/rx/rx-asm-good.d: Update expected disassembly.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4396&r2=1.4397
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/write.c.diff?cvsroot=src&r1=1.139&r2=1.140
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-rx.c.diff?cvsroot=src&r1=1.8&r2=1.9
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1842&r2=1.1843
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/bcnd.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/bra.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/macros.inc.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/max.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/max.sm.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/mov.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/mov.sm.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/rx-asm-good.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/rx/rx-asm-good.s.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/all/align.d.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/elf/elf.exp.diff?cvsroot=src&r1=1.73&r2=1.74
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/elf/group1a.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/elf/groupautoa.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/elf/section4.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/elf/section7.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/macros/semi.d.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/macros/semi.s.diff?cvsroot=src&r1=1.1.1.1&r2=1.2