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src opcodes/ChangeLog opcodes/Makefile.am opco ...
- From: nickc at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 22 Aug 2011 15:25:08 -0000
- Subject: src opcodes/ChangeLog opcodes/Makefile.am opco ...
CVSROOT: /cvs/src
Module name: src
Changes by: nickc@sourceware.org 2011-08-22 15:25:08
Modified files:
opcodes : ChangeLog Makefile.am Makefile.in
cpu : ChangeLog
Added files:
cpu : fr30.cpu fr30.opc ip2k.cpu ip2k.opc mep-avc.cpu
mep-avc2.cpu mep-c5.cpu mep-core.cpu
mep-default.cpu mep-ext-cop.cpu mep-fmax.cpu
mep-h1.cpu mep-ivc2.cpu mep-rhcop.cpu
mep-sample-ucidsp.cpu mep.cpu mep.opc
openrisc.cpu openrisc.opc xstormy16.cpu
xstormy16.opc
Log message:
Move cpu files from cgen/cpu to top level cpu directory.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1751&r2=1.1752
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/Makefile.am.diff?cvsroot=src&r1=1.163&r2=1.164
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/Makefile.in.diff?cvsroot=src&r1=1.186&r2=1.187
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/fr30.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/fr30.opc.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ip2k.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ip2k.opc.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-avc.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-avc2.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-c5.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-core.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-default.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-ext-cop.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-fmax.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-h1.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-ivc2.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-rhcop.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep-sample-ucidsp.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/mep.opc.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/openrisc.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/openrisc.opc.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/xstormy16.cpu.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/xstormy16.opc.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/cpu/ChangeLog.diff?cvsroot=src&r1=1.96&r2=1.97