src bfd/ChangeLog bfd/elfxx-mips.c bfd/elfxx-m ...

[macro at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	macro@sourceware.org	2013-06-25 18:02:34

Modified files:
	bfd            : ChangeLog elfxx-mips.c elfxx-mips.h 
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/doc        : as.texinfo c-mips.texi 
	gas/testsuite  : ChangeLog 
	gas/testsuite/gas/mips: micromips-trap.d micromips.d micromips.l 
	                        micromips.s mips.exp 
	include/opcode : ChangeLog mips.h 
	ld             : ChangeLog gen-doc.texi ld.texinfo 
	ld/emultempl   : mipself.em 
	opcodes        : ChangeLog micromips-opc.c 
Added files:
	gas/testsuite/gas/mips: micromips-insn32.d micromips-noinsn32.d 
	                        micromips-warn.l 

Log message:
	bfd/
	* elfxx-mips.h (_bfd_mips_elf_insn32): New prototype.
	* elfxx-mips.c (mips_elf_link_hash_table): Add insn32 member.
	(STUB_MOVE32_MICROMIPS, STUB_JALR32_MICROMIPS): New macros.
	(MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE): Likewise.
	(MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE): Likewise.
	(micromips_insn32_o32_exec_plt0_entry): New variable.
	(micromips_insn32_o32_exec_plt_entry): Likewise.
	(_bfd_mips_elf_adjust_dynamic_symbol): Handle insn32 mode.
	(mips_elf_estimate_stub_size): Likewise.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
	(mips_finish_exec_plt): Likewise.
	(_bfd_mips_elf_relax_section): Likewise.
	(_bfd_mips_elf_insn32): New function.
	(_bfd_mips_elf_get_synthetic_symtab): Handle insn32 PLT.
	
	gas/
	* config/tc-mips.c (mips_set_options): Add insn32 member.
	(mips_opts): Initialize it.
	(NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
	(options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
	(md_longopts): Add "minsn32" and "mno-insn32" options.
	(is_size_valid): Handle insn32 mode.
	(md_assemble): Pass instruction string down to macro.
	(brk_fmt): Add second dimension and insn32 mode initializers.
	(mfhl_fmt): Likewise.
	(BRK_FMT, MFHL_FMT): Handle insn32 mode.
	(macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
	(macro_build_jalr, move_register): Handle insn32 mode.
	(macro_build_branch_rs): Likewise.
	(macro): Handle insn32 mode.
	<M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
	(mips_ip): Handle insn32 mode.
	(md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
	(s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
	(mips_handle_align): Handle insn32 mode.
	(md_show_usage): Add -minsn32 and -mno-insn32.
	
	* doc/as.texinfo (Target MIPS options): Add -minsn32 and
	-mno-insn32 options.
	(-minsn32, -mno-insn32): New options.
	* doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
	options.
	(MIPS assembly options): New node.  Document .set insn32 and
	.set noinsn32.
	(MIPS-Dependent): List the new node.
	
	gas/testsuite/
	* gas/mips/micromips-insn32.d: New test.
	* gas/mips/micromips-noinsn32.d: Likewise.
	* gas/mips/micromips.l: Rename to...
	* gas/mips/micromips-warn.l: ... this.
	* gas/mips/micromips.d: Update accordingly.
	* gas/mips/micromips-trap.d: Likewise.
	* gas/mips/micromips.l: New list test.
	* gas/mips/micromips.s: Add conditionals.
	* gas/mips/mips.exp: Run the new tests.
	
	include/opcode/
	* mips.h: Add M_JRADDIUSP, M_JRC and M_MOVEP anonymous enum
	values.
	
	ld/
	* emultempl/mipself.em (insn32): New variable.
	(mips_create_output_section_statements): Handle insn32 mode.
	(PARSE_AND_LIST_PROLOGUE): New macro.
	(PARSE_AND_LIST_LONGOPTS): Likewise.
	(PARSE_AND_LIST_OPTIONS): Likewise.
	
	* gen-doc.texi: Set MIPS.
	* ld.texinfo: Likewise.
	(Options specific to MIPS targets): New section.
	(ld and MIPS family): New node.
	(Top, Machine Dependent): List the new node.
	
	opcodes/
	* micromips-opc.c (micromips_opcodes): Add "jraddiusp", "jrc"
	and "movep" macros.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.6081&r2=1.6082
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.c.diff?cvsroot=src&r1=1.355&r2=1.356
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.h.diff?cvsroot=src&r1=1.48&r2=1.49
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.5029&r2=1.5030
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.549&r2=1.550
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/as.texinfo.diff?cvsroot=src&r1=1.269&r2=1.270
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-mips.texi.diff?cvsroot=src&r1=1.76&r2=1.77
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.2259&r2=1.2260
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips-insn32.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips-noinsn32.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips-warn.l.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips-trap.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips.d.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips.l.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/micromips.s.diff?cvsroot=src&r1=1.1&r2=1.2
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips.exp.diff?cvsroot=src&r1=1.225&r2=1.226
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.500&r2=1.501
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.91&r2=1.92
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/ChangeLog.diff?cvsroot=src&r1=1.2603&r2=1.2604
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/gen-doc.texi.diff?cvsroot=src&r1=1.14&r2=1.15
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/ld.texinfo.diff?cvsroot=src&r1=1.303&r2=1.304
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emultempl/mipself.em.diff?cvsroot=src&r1=1.16&r2=1.17
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1977&r2=1.1978
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/micromips-opc.c.diff?cvsroot=src&r1=1.12&r2=1.13