src include/opcode/mips.h include/opcode/Chang ...

[rsandifo at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	rsandifo@sourceware.org	2013-08-01 20:40:24

Modified files:
	include/opcode : mips.h ChangeLog 
	opcodes        : mips16-opc.c mips-dis.c ChangeLog 
	gas/config     : tc-mips.c 
	gas            : ChangeLog 

Log message:
	include/opcode/
	* mips.h (MIPS16_INSN_WRITE_SP, MIPS16_INSN_READ_31)
	(MIPS16_INSN_READ_PC, MIPS16_INSN_UNCOND_BRANCH)
	(MIPS16_INSN_COND_BRANCH): Delete.
	
	opcodes/
	* mips16-opc.c (UBR, CBR, RD_31, RD_PC): Redefine as INSN2_* flags.
	(WR_SP): Replace with...
	(MOD_SP): ...this.
	(mips16_opcodes): Update accordingly.
	* mips-dis.c (print_insn_mips16): Likewise.
	
	gas/
	* config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
	flags for MIPS16 and non-MIPS16 instructions.
	(gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
	(gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
	(gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
	(can_swap_branch_p, get_append_method): Use the same flags for MIPS16
	and non-MIPS16 instructions.  Fix formatting.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.102&r2=1.103
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.512&r2=1.513
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips16-opc.c.diff?cvsroot=src&r1=1.24&r2=1.25
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.112&r2=1.113
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.2006&r2=1.2007
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.573&r2=1.574
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.5073&r2=1.5074