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Re: PATCH BFD section load page support

To: Timothy Wall <twall at tiac dot net>
Subject: Re: PATCH BFD section load page support
From: Michael Hayes <m dot hayes at elec dot canterbury dot ac dot nz>
Date: Sun, 23 Jan 2000 22:06:57 +1300 (NZDT)
Cc: Ian Lance Taylor <ian at zembu dot com>, binutils at sourceware dot cygnus dot com
References: <387F44B9.D8CABF35@domesolutions.com><20000114214854.1220.qmail@daffy.airs.com> <387FA012.F0D3680C@tiac.net><20000115041739.588.qmail@daffy.airs.com> <388AA50B.E085DA8B@tiac.net>

Timothy Wall writes:

 > In this case, the LMA *is* only 16 bits.  Some variants use 23
 > bits.  The c3x/c4x uses 32 bits.  All have similarly orthogonal
 > program/data address spaces.

Unlike the other chips in the TMS320 family, the C3x/C4x does not have
separate program/data address spaces.

Michael.

References:
- Re: PATCH BFD section load page support
  - From: Timothy Wall
- Re: PATCH BFD section load page support
  - From: Ian Lance Taylor
- Re: PATCH BFD section load page support
  - From: Timothy Wall
- Re: PATCH BFD section load page support
  - From: Ian Lance Taylor
- Re: PATCH BFD section load page support
  - From: Timothy Wall

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