Re: ARM Thumb byte stores

[Richard Earnshaw <rearnsha at arm dot com>]

> arm-elf-gcc -mthumb generates the following instruction:
> 
> 	.code	16
> 	strb	r3, [sp]
> 
> However this seems to be falling foul of a check in
> gas/config/tc-arm.c:5863:
> 
>   if (Rb == REG_PC || Rb == REG_SP)
>     {
>       if (size != THUMB_WORD)
> 	{
> 	  inst.error = _("byte or halfword not valid for base register");
> 	  return;
> 	}
> 
> The size in this case is obviously THUMB_BYTE, not THUMB_WORD. So is this
> check in gas correct? Or is this a gcc problem. I don't know much about
> Thumb, sorry.

This is a bug in gcc.  There is no strb instruction that stores to the 
stack in thumb mode.  It was fixed (I hope) in the cvs in early December:

2000-12-02  Richard Earnshaw  <rearnsha@arm.com>

        * arm.h (ARM_REGNO_OK_FOR_BASE_P, THUMB_REGNO_MODE_OK_FOR_BASE_P): 
New
        macros.
        (REGNO_MODE_OK_FOR_BASE_P): Define in terms of above.
        (REGNO_OK_FOR_FOR_BASE_P): Delete.
        (ARM_REG_OK_FOR_BASE_P, THUMB_REG_MODE_OK_FOR_BASE_P): New macros 
for
        both strict and non-strict uses.
        (REG_MODE_OK_FOR_BASE_P): Define in terms of above.
        (ARM_REG_OK_FOR_INDEX_P, THUMB_REG_OK_FOR_INDEX_P): New macros.
        (REG_OK_FOR_INDEX_P): Define in terms of above.
        (REG_OK_FOR_BASE_P): Delete.
        (REG_OK_FOR_PRE_POST_P): Delete.
        (ARM_BASE_REGISTER_RTX_P): Renamed from BASE_REGISTER_RTX_P.
        (ARM_INDEX_REGISTER_RTX_P): Renamed from INDEX_REGISTER_RTX_P.
        (ARM_GO_IF_LEGITIMATE_INDEX): Renamed from GO_IF_LEGITIMATE_INDEX.
        (THUMB_LEGITIMATE_OFFSET): Renamed from LEGITIMATE_OFFSET.
        (ARM_GO_IF_LEGITIMATE_ADDRESS): Adjust for name changes.  Use ARM
        specific variants rather than general ones.  Use 
ARM_REG_OK_FOR_BASE_P
        in pre/post increment cases.
        (THUMB_GO_IF_LEGITIMATE_ADDRESS): Similarly for Thumb.
        (ARM_LEGITIMIZE_ADDRESS): Similarly.
        (THUMB_LEGITIMIZE_RELOAD_ADDRESS): Similarly.
        * arm.c (legitimate_pic_address): Similarly.