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Re: PATCH: mips-opc rearrange
> Heh. I figured as much, but i'm still a bit puzzled. For this to be
> an actual problem, you'd need:
>
> * an entry earlier in the list that matches the same bit pattern that
> prefx does,
>
> * that entry and the prefx entry to both be (correctly) 'enabled'
> (i.e., both prefx and the other entry are valid instructions on your
> processor).
>
> I don't understand how that could actually happen (but obviously you
> have more information 8-).
>
Silly encoding of new instructions on processor :)
>
> I guess if you know that what you're proposing is correct and
> necessary, that's good enough for me -- certainly the change causes no
> harm. 8-)
>
> The one remaining comment that i have is that, when you _can_ tell the
> world, you should go back and update the prefx entry at the top of the
> list to note the conflicting instruction. (all of the rest of the
> entries there, other than nop and ssnop, appear to have notes as to
> why they're there.)
>
Will do. :)
-eric
--
I will not grease the monkey bars