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Patch to add -mfp32 support to MIPS gas
- To: binutils at sources dot redhat dot com
- Subject: Patch to add -mfp32 support to MIPS gas
- From: Richard Sandiford <r dot sandiford at redhat dot com>
- Date: 19 Jul 2001 20:46:13 +0100
At the moment, MIPS gas uses:
ISA_HAS_64BIT_REGS (mips_opts.isa)
to decide what size the registers are and:
bfd_arch_bits_per_address (stdoutput) == 32
|| ! ISA_HAS_64BIT_REGS (mips_opts.isa)
to decide what size addresses are. That isn't as fine grain as GCC, which
allows the sizes of the FPRs and GPRs to be selected independently. GAS
already has a -mgp32 switch, but it doesn't affect the size of address
calculations; they will still be done using 64-bit instructions if a 64-bit
ISA is selected.
The patch below adds macros that give the size of GPRs, FPRs and addresses,
and tries to retrofit them to the rest of tc-mips.c. It also adds the
options -mfp32 and -mfp64, and documents -m[fg]p* in the usage printout.
The changes are mostly routine. Two things that needed special attention:
- The current code checks "bfd_arch_bits_per_address (stdoutput)" when
deciding whether the set instructions ("sle", etc.) should use 32-bit
or 64-bit instructions. That seems rather strange, and is inconsistent
with usage elsewhere, where "bfd_arch_bits_per_address" only affects
address calculations. The patch changes it to use 32-bit instructions
if GPRs are 32-bits wide, and 64-bit instructions otherwise.
- The LI_DD handler assumes that it can construct constants in a GPR
first and then copy it to an FPR. That doesn't work if the FPRs are
wider than the GPRs, so the patch forces floating-point constants
into memory under these conditions.
I've included 8 new test cases, hopefully testing each of the macros
whose code has been touched. They test the pattern of options:
{,-mgp32}{,-mfp32}{,-KPIC}
The testcases without a -mgp32 or -mfp32 option behaved the same before the
patch as they do after it. The patch introduces no regressions in the
existing test cases (tested with mips-elf).
Is this the right thing to do? Is it OK to apply?
Richard
[gas/ChangeLog]
* tc-mips.c (mips_fp32): New static variable.
(md_long_opts): Add -mfp32 and -mfp64.
(md_parse_option): Handle them.
(md_show_usage): Show usage for -mfp32, -mfp64, -mgp32 and -mgp64.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros.
(HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above.
(HAVE_32BIT_ADDRESSES): New macro.
(load_register): Use HAVE_32BIT_GPRS to determine the register width.
(load_address): Use HAVE_32BIT_ADDRESSES to determine the address size.
(s_cprestore, s_cpadd): Likewise.
(macro): Use HAVE_32BIT_GPRS to determine the width of registers
used in branch and M_LI_D macros. Use HAVE_32BIT_FPRS to determine
the width registers used in M_LI_DD macros. Use HAVE_32BIT_ADDRESSES
to determine the width of addresses in load, store and jump macros.
(macro2): Use HAVE_32BIT_GPRS to determine the width of registers
used in set instructions; do not check the address size for them.
Use HAVE_32BIT_ADDRESSES to determine the width of addresses in
unaligned load and store macros.
(mips_ip): Use the new macros to check the width of a register when
processing float constants. Force a constant into memory if it is
destined for an FPR and the FPRs are wider than the GPRs. Warn about
odd FPR numbers if HAVE_32BIT_FPRS.
[gas/testsuite/ChangeLog]
* gas/mips/mips-gp(32|64)-fp(32|64)(|-pic): New testcases.
Index: tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.51
diff -u -p -d -r1.51 tc-mips.c
--- tc-mips.c 2001/07/04 12:32:07 1.51
+++ tc-mips.c 2001/07/19 18:37:14
@@ -229,6 +229,9 @@ static int mips_32bitmode = 0;
/* True if -mgp32 was passed. */
static int mips_gp32 = 0;
+/* True if -mfp32 was passed. */
+static int mips_fp32 = 0;
+
/* Some ISA's have delay slots for instructions which read or write
from a coprocessor (eg. mips1-mips3); some don't (eg mips4).
Return true if instructions marked INSN_LOAD_COPROC_DELAY,
@@ -251,6 +254,18 @@ static int mips_gp32 = 0;
|| (ISA) == ISA_MIPS64 \
)
+#define HAVE_32BIT_GPRS \
+ (mips_gp32 || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
+
+#define HAVE_32BIT_FPRS \
+ (mips_fp32 || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
+
+#define HAVE_64BIT_GPRS (! HAVE_32BIT_GPRS)
+#define HAVE_64BIT_FPRS (! HAVE_32BIT_FPRS)
+
+#define HAVE_32BIT_ADDRESSES \
+ (HAVE_32BIT_GPRS || bfd_arch_bits_per_address (stdoutput) == 32)
+
/* Whether the processor uses hardware interlocks to protect
reads from the HI and LO registers, and thus does not
require nops to be inserted. */
@@ -3008,9 +3023,9 @@ load_register (counter, reg, ep, dbl)
|| ! ep->X_unsigned
|| sizeof (ep->X_add_number) > 4
|| (ep->X_add_number & 0x80000000) == 0))
- || ((! ISA_HAS_64BIT_REGS (mips_opts.isa) || ! dbl)
+ || ((HAVE_32BIT_GPRS || ! dbl)
&& (ep->X_add_number &~ (offsetT) 0xffffffff) == 0)
- || (! ISA_HAS_64BIT_REGS (mips_opts.isa)
+ || (HAVE_32BIT_GPRS
&& ! dbl
&& ((ep->X_add_number &~ (offsetT) 0xffffffff)
== ~ (offsetT) 0xffffffff)))
@@ -3027,7 +3042,7 @@ load_register (counter, reg, ep, dbl)
/* The value is larger than 32 bits. */
- if (! ISA_HAS_64BIT_REGS (mips_opts.isa))
+ if (HAVE_32BIT_GPRS)
{
as_bad (_("Number larger than 32 bits"));
macro_build ((char *) NULL, counter, ep, "addiu", "t,r,j", reg, 0,
@@ -3269,9 +3284,7 @@ load_address (counter, reg, ep)
{
frag_grow (20);
macro_build ((char *) NULL, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL);
p = frag_var (rs_machine_dependent, 8, 0,
RELAX_ENCODE (4, 8, 0, 4, 0,
@@ -3282,9 +3295,7 @@ load_address (counter, reg, ep)
if (p != NULL)
p += 4;
macro_build (p, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
@@ -3302,18 +3313,14 @@ load_address (counter, reg, ep)
ep->X_add_number = 0;
frag_grow (20);
macro_build ((char *) NULL, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, counter, (expressionS *) NULL, "nop", "");
p = frag_var (rs_machine_dependent, 4, 0,
RELAX_ENCODE (0, 4, -8, 0, 0, mips_opts.warn_about_macros),
ep->X_add_symbol, (offsetT) 0, (char *) NULL);
macro_build (p, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
if (ex.X_add_number != 0)
{
@@ -3321,9 +3328,7 @@ load_address (counter, reg, ep)
as_bad (_("PIC code offset overflow (max 16 signed bits)"));
ex.X_op = O_constant;
macro_build ((char *) NULL, counter, &ex,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
}
@@ -3352,14 +3357,10 @@ load_address (counter, reg, ep)
macro_build ((char *) NULL, counter, ep, "lui", "t,u", reg,
(int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, counter, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", reg, reg, GP);
macro_build ((char *) NULL, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT_LO16, reg);
p = frag_var (rs_machine_dependent, 12 + off, 0,
RELAX_ENCODE (12, 12 + off, off, 8 + off, 0,
@@ -3375,17 +3376,13 @@ load_address (counter, reg, ep)
p += 4;
}
macro_build (p, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", reg, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, counter, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
if (ex.X_add_number != 0)
{
@@ -3393,9 +3390,7 @@ load_address (counter, reg, ep)
as_bad (_("PIC code offset overflow (max 16 signed bits)"));
ex.X_op = O_constant;
macro_build ((char *) NULL, counter, &ex,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, reg, (int) BFD_RELOC_LO16);
}
}
@@ -3405,9 +3400,7 @@ load_address (counter, reg, ep)
addiu $reg,$gp,<sym> (BFD_RELOC_MIPS_GPREL)
*/
macro_build ((char *) NULL, counter, ep,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", reg, GP, (int) BFD_RELOC_MIPS_GPREL);
}
else
@@ -3614,7 +3607,7 @@ macro (ip)
case M_BGT_I:
/* check for > max integer */
maxnum = 0x7fffffff;
- if (ISA_HAS_64BIT_REGS (mips_opts.isa) && sizeof (maxnum) > 4)
+ if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
{
maxnum <<= 16;
maxnum |= 0xffff;
@@ -3623,7 +3616,7 @@ macro (ip)
}
if (imm_expr.X_op == O_constant
&& imm_expr.X_add_number >= maxnum
- && (! ISA_HAS_64BIT_REGS (mips_opts.isa) || sizeof (maxnum) > 4))
+ && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
{
do_false:
/* result is always false */
@@ -3667,7 +3660,7 @@ macro (ip)
return;
}
maxnum = 0x7fffffff;
- if (ISA_HAS_64BIT_REGS (mips_opts.isa) && sizeof (maxnum) > 4)
+ if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
{
maxnum <<= 16;
maxnum |= 0xffff;
@@ -3677,7 +3670,7 @@ macro (ip)
maxnum = - maxnum - 1;
if (imm_expr.X_op == O_constant
&& imm_expr.X_add_number <= maxnum
- && (! ISA_HAS_64BIT_REGS (mips_opts.isa) || sizeof (maxnum) > 4))
+ && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
{
do_true:
/* result is always true */
@@ -3714,7 +3707,7 @@ macro (ip)
likely = 1;
case M_BGTU_I:
if (sreg == 0
- || (! ISA_HAS_64BIT_REGS (mips_opts.isa)
+ || (HAVE_32BIT_GPRS
&& imm_expr.X_op == O_constant
&& imm_expr.X_add_number == 0xffffffff))
goto do_false;
@@ -3810,7 +3803,7 @@ macro (ip)
likely = 1;
case M_BLE_I:
maxnum = 0x7fffffff;
- if (ISA_HAS_64BIT_REGS (mips_opts.isa) && sizeof (maxnum) > 4)
+ if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4)
{
maxnum <<= 16;
maxnum |= 0xffff;
@@ -3819,7 +3812,7 @@ macro (ip)
}
if (imm_expr.X_op == O_constant
&& imm_expr.X_add_number >= maxnum
- && (! ISA_HAS_64BIT_REGS (mips_opts.isa) || sizeof (maxnum) > 4))
+ && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4))
goto do_true;
if (imm_expr.X_op != O_constant)
as_bad (_("Unsupported large constant"));
@@ -3872,7 +3865,7 @@ macro (ip)
likely = 1;
case M_BLEU_I:
if (sreg == 0
- || (! ISA_HAS_64BIT_REGS (mips_opts.isa)
+ || (HAVE_32BIT_GPRS
&& imm_expr.X_op == O_constant
&& imm_expr.X_add_number == 0xffffffff))
goto do_true;
@@ -4170,9 +4163,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
treg, (int) BFD_RELOC_PCREL_HI16_S);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", treg, treg, (int) BFD_RELOC_PCREL_LO16);
return;
}
@@ -4213,9 +4204,7 @@ macro (ip)
{
frag_grow (20);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL);
p = frag_var (rs_machine_dependent, 8, 0,
RELAX_ENCODE (4, 8, 0, 4, 0,
@@ -4227,9 +4216,7 @@ macro (ip)
if (p != NULL)
p += 4;
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
}
else if (mips_pic == SVR4_PIC && ! mips_big_got)
@@ -4300,9 +4287,7 @@ macro (ip)
p += 4;
}
macro_build (p, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
/* FIXME: If breg == 0, and the next instruction uses
$tempreg, then if this variant case is used an extra
@@ -4314,9 +4299,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
(void) frag_var (rs_machine_dependent, 0, 0,
RELAX_ENCODE (0, 0, -12, -4, 0, 0),
@@ -4341,9 +4324,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", treg, AT, breg);
breg = 0;
tempreg = treg;
@@ -4358,14 +4339,10 @@ macro (ip)
mips_optimize = hold_mips_optimize;
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, AT);
(void) frag_var (rs_machine_dependent, 0, 0,
RELAX_ENCODE (0, 0, -16 + off1, -8, 0, 0),
@@ -4435,9 +4412,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
tempreg, lui_reloc_type);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
dbl ? "ld" : "lw",
@@ -4473,9 +4448,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
p = frag_var (rs_machine_dependent, 12 + gpdel, 0,
@@ -4508,9 +4481,7 @@ macro (ip)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
"nop", "");
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", treg, AT, breg);
dreg = treg;
adj = 8;
@@ -4524,14 +4495,10 @@ macro (ip)
mips_optimize = hold_mips_optimize;
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", dreg, dreg, AT);
p = frag_var (rs_machine_dependent, 16 + gpdel + adj, 0,
@@ -4563,9 +4530,7 @@ macro (ip)
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
/* FIXME: If add_number is 0, and there was no base
register, the external symbol case ended with a load,
@@ -4583,9 +4548,7 @@ macro (ip)
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", treg, AT, breg);
p += 4;
tempreg = treg;
@@ -4597,15 +4560,11 @@ macro (ip)
macro_build_lui (p, &icnt, &expr1, AT);
p += 4;
macro_build (p, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", AT, AT, (int) BFD_RELOC_LO16);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, AT);
p += 4;
}
@@ -4616,9 +4575,7 @@ macro (ip)
addiu $tempreg,$gp,<sym> (BFD_RELOC_MIPS_GPREL)
*/
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, GP, (int) BFD_RELOC_MIPS_GPREL);
}
else
@@ -4626,9 +4583,7 @@ macro (ip)
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", treg, tempreg, breg);
if (! used_at)
@@ -4670,9 +4625,7 @@ macro (ip)
{
expr1.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", GP, (int) BFD_RELOC_LO16, mips_frame_reg);
}
}
@@ -4713,9 +4666,7 @@ macro (ip)
if (! mips_big_got)
{
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_CALL16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
@@ -4736,14 +4687,10 @@ macro (ip)
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
PIC_CALL_REG, (int) BFD_RELOC_MIPS_CALL_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", PIC_CALL_REG, PIC_CALL_REG, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
@@ -4759,9 +4706,7 @@ macro (ip)
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", PIC_CALL_REG,
(int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
@@ -4769,9 +4714,7 @@ macro (ip)
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", PIC_CALL_REG, PIC_CALL_REG,
(int) BFD_RELOC_LO16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
@@ -4785,9 +4728,7 @@ macro (ip)
"nop", "");
expr1.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", GP, (int) BFD_RELOC_LO16,
mips_frame_reg);
}
@@ -5042,9 +4983,7 @@ macro (ip)
{
frag_grow (28);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, breg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt,
treg, (int) BFD_RELOC_MIPS_GPREL, tempreg);
@@ -5057,9 +4996,7 @@ macro (ip)
if (p != NULL)
p += 4;
macro_build (p, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, breg);
if (p != NULL)
p += 4;
@@ -5092,9 +5029,7 @@ macro (ip)
as_bad (_("PIC code offset overflow (max 16 signed bits)"));
frag_grow (20);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
p = frag_var (rs_machine_dependent, 4, 0,
@@ -5102,15 +5037,11 @@ macro (ip)
offset_expr.X_add_symbol, (offsetT) 0,
(char *) NULL);
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, breg);
macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg,
(int) BFD_RELOC_LO16, tempreg);
@@ -5149,14 +5080,10 @@ macro (ip)
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
tempreg, (int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT_LO16,
tempreg);
p = frag_var (rs_machine_dependent, 12 + gpdel, 0,
@@ -5168,23 +5095,17 @@ macro (ip)
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", tempreg, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
p += 4;
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", tempreg, tempreg, (int) BFD_RELOC_LO16);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, tempreg, breg);
macro_build ((char *) NULL, &icnt, &expr1, s, fmt, treg,
(int) BFD_RELOC_LO16, tempreg);
@@ -5207,9 +5128,7 @@ macro (ip)
else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", tempreg, breg, GP);
macro_build ((char *) NULL, &icnt, &offset_expr, s, fmt,
treg, (int) BFD_RELOC_MIPS_GPREL, tempreg);
@@ -5253,13 +5172,13 @@ macro (ip)
}
case M_LI_D:
- /* If we have a constant in IMM_EXPR, then in mips3 mode it is
- the entire value, and in mips1 mode it is the high order 32
- bits of the value and the low order 32 bits are either zero
- or in offset_expr. */
+ /* Check if we have a constant in IMM_EXPR. If the GPRs are 64 bits
+ wide, IMM_EXPR is the entire value. Otherwise IMM_EXPR is the high
+ order 32 bits of the value and the low order 32 bits are either
+ zero or in OFFSET_EXPR. */
if (imm_expr.X_op == O_constant || imm_expr.X_op == O_big)
{
- if (ISA_HAS_64BIT_REGS (mips_opts.isa))
+ if (HAVE_64BIT_GPRS)
load_register (&icnt, treg, &imm_expr, 1);
else
{
@@ -5303,9 +5222,7 @@ macro (ip)
else if (mips_pic == SVR4_PIC)
{
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
}
else if (mips_pic == EMBEDDED_PIC)
@@ -5313,9 +5230,7 @@ macro (ip)
/* For embedded PIC we pick up the entire address off $gp in
a single instruction. */
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_ADDRESSES ? "addiu" : "daddiu",
"t,r,j", AT, GP, (int) BFD_RELOC_MIPS_GPREL);
offset_expr.X_op = O_constant;
offset_expr.X_add_number = 0;
@@ -5324,7 +5239,7 @@ macro (ip)
abort ();
/* Now we load the register(s). */
- if (ISA_HAS_64BIT_REGS (mips_opts.isa))
+ if (HAVE_64BIT_GPRS)
macro_build ((char *) NULL, &icnt, &offset_expr, "ld", "t,o(b)",
treg, (int) BFD_RELOC_LO16, AT);
else
@@ -5349,16 +5264,20 @@ macro (ip)
break;
case M_LI_DD:
- /* If we have a constant in IMM_EXPR, then in mips3 mode it is
- the entire value, and in mips1 mode it is the high order 32
- bits of the value and the low order 32 bits are either zero
- or in offset_expr. */
+ /* Check if we have a constant in IMM_EXPR. If the FPRs are 64 bits
+ wide, IMM_EXPR is the entire value and the GPRs are known to be 64
+ bits wide as well. Otherwise IMM_EXPR is the high order 32 bits of
+ the value and the low order 32 bits are either zero or in
+ OFFSET_EXPR. */
if (imm_expr.X_op == O_constant || imm_expr.X_op == O_big)
{
- load_register (&icnt, AT, &imm_expr, ISA_HAS_64BIT_REGS (mips_opts.isa));
- if (ISA_HAS_64BIT_REGS (mips_opts.isa))
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- "dmtc1", "t,S", AT, treg);
+ load_register (&icnt, AT, &imm_expr, HAVE_64BIT_FPRS);
+ if (HAVE_64BIT_FPRS)
+ {
+ assert (HAVE_64BIT_GPRS);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
+ "dmtc1", "t,S", AT, treg);
+ }
else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
@@ -5397,9 +5316,7 @@ macro (ip)
assert (strcmp (s, RDATA_SECTION_NAME) == 0);
if (mips_pic == SVR4_PIC)
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
else
{
@@ -5503,7 +5420,7 @@ macro (ip)
goto ldd_std;
case M_LD_AB:
- if (ISA_HAS_64BIT_REGS (mips_opts.isa))
+ if (HAVE_64BIT_GPRS)
{
s = "ld";
goto ld;
@@ -5514,7 +5431,7 @@ macro (ip)
goto ldd_std;
case M_SD_AB:
- if (ISA_HAS_64BIT_REGS (mips_opts.isa))
+ if (HAVE_64BIT_GPRS)
{
s = "sd";
goto st;
@@ -5576,9 +5493,7 @@ macro (ip)
{
frag_grow (36);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, GP);
tempreg = AT;
off = 4;
@@ -5634,9 +5549,7 @@ macro (ip)
if (breg != 0)
{
macro_build (p, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, AT);
if (p != NULL)
p += 4;
@@ -5683,16 +5596,12 @@ macro (ip)
off = 4;
frag_grow (24 + off);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, AT);
/* Itbl support may require additional care here. */
macro_build ((char *) NULL, &icnt, &expr1, s, fmt,
@@ -5752,21 +5661,15 @@ macro (ip)
macro_build ((char *) NULL, &icnt, &offset_expr, "lui", "t,u",
AT, (int) BFD_RELOC_MIPS_GOT_HI16);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, AT, GP);
macro_build ((char *) NULL, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT_LO16, AT);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "nop", "");
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, AT);
/* Itbl support may require additional care here. */
macro_build ((char *) NULL, &icnt, &expr1, s, fmt,
@@ -5796,9 +5699,7 @@ macro (ip)
p += 4;
}
macro_build (p, &icnt, &offset_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "lw" : "ld"),
+ HAVE_32BIT_ADDRESSES ? "lw" : "ld",
"t,o(b)", AT, (int) BFD_RELOC_MIPS_GOT16, GP);
p += 4;
macro_build (p, &icnt, (expressionS *) NULL, "nop", "");
@@ -5806,9 +5707,7 @@ macro (ip)
if (breg != 0)
{
macro_build (p, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, AT);
p += 4;
}
@@ -5847,9 +5746,7 @@ macro (ip)
else
{
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, breg, GP);
tempreg = AT;
used_at = 1;
@@ -5879,8 +5776,7 @@ macro (ip)
case M_SD_OB:
s = "sw";
sd_ob:
- assert (bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa));
+ assert (HAVE_32BIT_ADDRESSES);
macro_build ((char *) NULL, &icnt, &offset_expr, s, "t,o(b)", treg,
(int) BFD_RELOC_LO16, breg);
offset_expr.X_add_number += 4;
@@ -6174,9 +6070,7 @@ macro2 (ip)
{
imm_expr.X_add_number = -imm_expr.X_add_number;
macro_build ((char *) NULL, &icnt, &imm_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_GPRS ? "addiu" : "daddiu",
"t,r,j", dreg, sreg,
(int) BFD_RELOC_LO16);
used_at = 0;
@@ -6327,9 +6221,7 @@ macro2 (ip)
as_warn (_("Instruction %s: result is always true"),
ip->insn_mo->name);
macro_build ((char *) NULL, &icnt, &expr1,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_GPRS ? "addiu" : "daddiu",
"t,r,j", dreg, 0, (int) BFD_RELOC_LO16);
return;
}
@@ -6347,9 +6239,7 @@ macro2 (ip)
{
imm_expr.X_add_number = -imm_expr.X_add_number;
macro_build ((char *) NULL, &icnt, &imm_expr,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addiu" : "daddiu"),
+ HAVE_32BIT_GPRS ? "addiu" : "daddiu",
"t,r,j", dreg, sreg, (int) BFD_RELOC_LO16);
used_at = 0;
}
@@ -6516,9 +6406,7 @@ macro2 (ip)
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = off;
@@ -6539,9 +6427,7 @@ macro2 (ip)
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, AT, breg);
if (target_big_endian)
expr1.X_add_number = 0;
@@ -6613,9 +6499,7 @@ macro2 (ip)
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = off;
@@ -6635,9 +6519,7 @@ macro2 (ip)
load_address (&icnt, AT, &offset_expr);
if (breg != 0)
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", AT, AT, breg);
if (! target_big_endian)
expr1.X_add_number = 0;
@@ -7496,7 +7378,7 @@ mips_ip (str, ip)
as_bad (_("Invalid float register number (%d)"), regno);
if ((regno & 1) != 0
- && ! ISA_HAS_64BIT_REGS (mips_opts.isa)
+ && HAVE_32BIT_FPRS
&& ! (strcmp (str, "mtc1") == 0
|| strcmp (str, "mfc1") == 0
|| strcmp (str, "lwc1") == 0
@@ -7570,6 +7452,7 @@ mips_ip (str, ip)
case 'l':
{
int f64;
+ int using_gprs;
char *save_in;
char *err;
unsigned char temp[8];
@@ -7603,9 +7486,15 @@ mips_ip (str, ip)
.lit4 inline easily; we need to put .lit8
somewhere in the data segment, and using .lit8
permits the linker to eventually combine identical
- .lit8 entries). */
+ .lit8 entries).
+ The code below needs to know whether the target register
+ is 32 or 64 bits wide. It relies on the fact 'f' and
+ 'F' are used with GPR-based instructions and 'l' and
+ 'L' are used with FPR-based instructions. */
+
f64 = *args == 'F' || *args == 'L';
+ using_gprs = *args == 'F' || *args == 'f';
save_in = input_line_pointer;
input_line_pointer = s;
@@ -7638,18 +7527,24 @@ mips_ip (str, ip)
}
else if (length > 4
&& ! mips_disable_float_construction
+ /* Constants can only be constructed in GPRs and
+ copied to FPRs if the GPRs are at least as wide
+ as the FPRs. Force the constant into memory if
+ we are using 64-bit FPRs but the GPRs are only
+ 32 bits wide. */
+ && (using_gprs
+ || ! (HAVE_64BIT_FPRS && HAVE_32BIT_GPRS))
&& ((temp[0] == 0 && temp[1] == 0)
|| (temp[2] == 0 && temp[3] == 0))
&& ((temp[4] == 0 && temp[5] == 0)
|| (temp[6] == 0 && temp[7] == 0)))
{
- /* The value is simple enough to load with a
- couple of instructions. In mips1 mode, set
- imm_expr to the high order 32 bits and
- offset_expr to the low order 32 bits.
- Otherwise, set imm_expr to the entire 64 bit
- constant. */
- if (! ISA_HAS_64BIT_REGS (mips_opts.isa))
+ /* The value is simple enough to load with a couple of
+ instructions. If using 32-bit registers, set
+ imm_expr to the high order 32 bits and offset_expr to
+ the low order 32 bits. Otherwise, set imm_expr to
+ the entire 64 bit constant. */
+ if (using_gprs ? HAVE_32BIT_GPRS : HAVE_32BIT_FPRS)
{
imm_expr.X_op = O_constant;
offset_expr.X_op = O_constant;
@@ -7820,7 +7715,7 @@ mips_ip (str, ip)
&& imm_expr.X_op == O_constant)
|| (more
&& imm_expr.X_add_number < 0
- && ISA_HAS_64BIT_REGS (mips_opts.isa)
+ && HAVE_64BIT_GPRS
&& imm_expr.X_unsigned
&& sizeof (imm_expr.X_add_number) <= 4))
{
@@ -8945,6 +8840,10 @@ struct option md_longopts[] =
{"march", required_argument, NULL, OPTION_MARCH},
#define OPTION_MTUNE (OPTION_MD_BASE + 32)
{"mtune", required_argument, NULL, OPTION_MTUNE},
+#define OPTION_FP32 (OPTION_MD_BASE + 33)
+ {"mfp32", no_argument, NULL, OPTION_FP32},
+#define OPTION_FP64 (OPTION_MD_BASE + 34)
+ {"mfp64", no_argument, NULL, OPTION_FP64},
#ifdef OBJ_ELF
#define OPTION_ELF_BASE (OPTION_MD_BASE + 35)
#define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0)
@@ -9247,6 +9146,14 @@ md_parse_option (c, arg)
#endif
break;
+ case OPTION_FP32:
+ mips_fp32 = 1;
+ break;
+
+ case OPTION_FP64:
+ mips_fp32 = 0;
+ break;
+
case OPTION_MABI:
if (strcmp (arg, "32") == 0
|| strcmp (arg, "n32") == 0
@@ -9369,6 +9276,10 @@ MIPS options:\n\
-mips16 generate mips16 instructions\n\
-no-mips16 do not generate mips16 instructions\n"));
fprintf (stream, _("\
+-mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\
+-mgp64 has no effect, but is accepted for symmetry\n\
+-mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\
+-mfp64 has no effect, but is accepted for symmetry\n\
-O0 remove unneeded NOPs, do not swap branches\n\
-O remove unneeded NOPs and swap branches\n\
-n warn about NOPs generated from macros\n\
@@ -10546,9 +10457,7 @@ s_cprestore (ignore)
ex.X_add_number = mips_cprestore_offset;
macro_build ((char *) NULL, &icnt, &ex,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "sw" : "sd"),
+ HAVE_32BIT_ADDRESSES ? "sw" : "sd",
"t,o(b)", GP, (int) BFD_RELOC_LO16, SP);
demand_empty_rest_of_line ();
@@ -10614,9 +10523,7 @@ s_cpadd (ignore)
/* Add $gp to the register named as an argument. */
reg = tc_get_register (0);
macro_build ((char *) NULL, &icnt, (expressionS *) NULL,
- ((bfd_arch_bits_per_address (stdoutput) == 32
- || ! ISA_HAS_64BIT_REGS (mips_opts.isa))
- ? "addu" : "daddu"),
+ HAVE_32BIT_ADDRESSES ? "addu" : "daddu",
"d,v,t", reg, reg, GP);
demand_empty_rest_of_line ();
Index: mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.14
diff -u -p -d -r1.14 mips.exp
--- mips.exp 2001/06/09 06:25:55 1.14
+++ mips.exp 2001/07/19 19:06:33
@@ -119,6 +119,11 @@ if { [istarget mips*-*-*] } then {
run_list_test "illegal" ""
+ run_dump_test "mips-gp32-fp32"
+ run_dump_test "mips-gp32-fp64"
+ run_dump_test "mips-gp64-fp32"
+ run_dump_test "mips-gp64-fp64"
+
if $svr4pic {
# Make sure that -mcpu=FOO and -mFOO are equivalent. Assemble a file
# containing 4650-specific instructions with -m4650 and -mcpu=4650,
@@ -131,6 +136,11 @@ if { [istarget mips*-*-*] } then {
run_dump_test "elf_e_flags3"
run_dump_test "elf_e_flags4"
+ run_dump_test "mips-gp32-fp32-pic"
+ run_dump_test "mips-gp32-fp64-pic"
+ run_dump_test "mips-gp64-fp32-pic"
+ run_dump_test "mips-gp64-fp64-pic"
+
if [istarget mips*el-*-*] {
run_dump_test "elfel-rel"
} {
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp32-pic.s Thu Jul 19 18:24:15 2001
@@ -0,0 +1,139 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+ .ent func
+func:
+ .set mips4
+ .set noreorder
+ .cpload $25 # 0000 lui gp,hi(_gp_disp)
+ # 0004 addiu gp,gp,lo(_gp_disp)
+ # 0008 addu gp,gp,t9
+ .set reorder
+ .cprestore 8 # 000c sw gp,8(sp)
+ .cpadd $4 # 0010 addu a0,a0,gp
+ li $4, 0x12345678 # 0014 lui a0,0x1234
+ # 0018 ori a0,a0,0x5678
+ la $4, shared # 001c lw a0,got(.sdata)(gp)
+ # 0020 nop
+ # 0024 addiu a0,a0,lo(shared)
+ la $4, unshared # 0028 lw a0,got(.data)(gp)
+ # 002c nop
+ # 0030 addiu a0,a0,lo(unshared)
+ la $4, end # 0034 lw a0,got(.text)(gp)
+ # 0038 nop
+ # 003c addiu a0,a0,lo(end)
+ j end # 0040 b end
+ # 0044 nop
+ jal end # 0048 lw t9,got(.text)(gp)
+ # 004c nop
+ # 0050 addiu t9,t9,lo(end)
+ # 0054 jalr t9
+ # 0058 nop
+ # 005c lw gp,8(sp)
+ lw $4, shared # 0060 lw a0,got(.sdata)(gp)
+ # 0064 nop
+ # 0068 addiu a0,a0,lo(shared)
+ # 006c lw a0,(a0)
+ lw $4, unshared # 0070 lw a0,got(.data)(gp)
+ # 0074 nop
+ # 0078 addiu a0,a0,lo(unshared)
+ # 007c lw a0,(a0)
+ lw $4, end # 0080 lw a0,got(.text)(gp)
+ # 0084 nop
+ # 0088 addiu a0,a0,lo(end)
+ # 008c lw a0,(a0)
+ ld $4, shared # 0090 lw at,got(.sdata)(gp)
+ # 0094 nop
+ # 0098 lw a0,lo(shared)(at)
+ # 009c lw a1,lo(shared)+4(at)
+ ld $4, unshared # 00a0 lw at,got(.data)(gp)
+ # 00a4 nop
+ # 00a8 lw a0,lo(unshared)(at)
+ # 00ac lw a1,lo(unshared)+4(at)
+ ld $4, end # 00b0 lw at,got(.text)(gp)
+ # 00b4 nop
+ # 00b8 lw a0,lo(end)(at)
+ # 00bc lw a1,lo(end)+4(at)
+ sw $4, shared # 00c0 lw at,got(.sdata)(gp)
+ # 00c4 nop
+ # 00c8 addiu at,at,lo(shared)
+ # 00cc sw a0,0(at)
+ sw $4, unshared # 00d0 lw at,got(.data)(gp)
+ # 00d4 nop
+ # 00d8 addiu at,at,lo(unshared)
+ # 00dc sw a0,0(at)
+ sd $4, shared # 00e0 lw at,got(.sdata)(gp)
+ # 00e4 nop
+ # 00e8 sw a0,lo(shared)(at)
+ # 00ec sw a1,lo(shared)+4(at)
+ sd $4, unshared # 00f0 lw at,got(.data)(gp)
+ # 00f4 nop
+ # 00f8 sw a0,lo(unshared)(at)
+ # 00fc sw a1,lo(unshared)+4(at)
+ ulh $4, unshared # 0100 lw at,got(.data)(gp)
+ # 0104 nop
+ # 0108 addiu at,at,lo(unshared)
+ # 010c lb a0,0(at)
+ # 0110 lbu at,1(at)
+ # 0114 sll a0,a0,8
+ # 0118 or a0,a0,at
+ ush $4, unshared # 011c lw at,got(.data)(gp)
+ # 0120 nop
+ # 0124 addiu at,at,lo(unshared)
+ # 0128 sb a0,0(at)
+ # 012c srl a0,a0,8
+ # 0130 sb a0,1(at)
+ # 0134 lbu at,0(at)
+ # 0138 sll a0,a0,8
+ # 013c or a0,a0,at
+ ulw $4, unshared # 0140 lw at,got(.data)(gp)
+ # 0144 nop
+ # 0148 addiu at,at,lo(unshared)
+ # 014c lwl a0,0(at)
+ # 0150 lwr a0,3(at)
+ usw $4, unshared # 0154 lw at,got(.data)(gp)
+ # 0158 nop
+ # 015c addiu at,at,lo(unshared)
+ # 0160 swl a0,0(at)
+ # 0164 swr a0,3(at)
+ li.d $4, 1.0 # 0168 lui a0,0x3ff0
+ # 016c move a1,zero
+ li.d $4, 1.9 # 0170 lw at,got(.rodata)(gp)
+ # 0174 lw a0,lo(F1.9)(at)
+ # 0178 lw a1,lo(F1.9)+4(at)
+ li.d $f0, 1.0 # 017c lui at,0x3ff0
+ # 0180 mtc1 at,$f1
+ # 0184 mtc1 zero,$f0
+ li.d $f0, 1.9 # 0188 lw at,got(.rodata)(gp)
+ # 018c ldc1 $f0,lo(L1.9)(at)
+ seq $4, $5, -100 # 0190 addiu a0,a1,100
+ # 0194 sltiu a0,a0,1
+ sne $4, $5, -100 # 0198 addiu a0,a1,100
+ # 019c sltu a0,zero,a0
+
+# Not available in 32-bit mode
+# dla $4, shared
+# dla $4, unshared
+# uld $4, unshared
+# usd $4, unshared
+
+# Should produce warnings given -mgp32
+# bgt $4, 0x7fffffff, end
+# bgtu $4, 0xffffffff, end
+# ble $4, 0x7fffffff, end
+# bleu $4, 0xffffffff, end
+
+# Should produce warnings given -mfp32
+# add.d $f1, $f2, $f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp32-pic.d Thu Jul 19 19:24:27 2001
@@ -0,0 +1,111 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mgp32 -mfp32 -KPIC
+#name: MIPS -mgp32 -mfp32 (SVR4 PIC)
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui gp,0x0
+0+004 <[^>]*> addiu gp,gp,0
+0+008 <[^>]*> addu gp,gp,t9
+0+00c <[^>]*> sw gp,8\(sp\)
+0+010 <[^>]*> addu a0,a0,gp
+0+014 <[^>]*> lui a0,0x1234
+0+018 <[^>]*> ori a0,a0,0x5678
+0+01c <[^>]*> lw a0,0\(gp\)
+0+020 <[^>]*> nop
+0+024 <[^>]*> addiu a0,a0,0
+0+028 <[^>]*> lw a0,0\(gp\)
+0+02c <[^>]*> nop
+0+030 <[^>]*> addiu a0,a0,0
+0+034 <[^>]*> lw a0,0\(gp\)
+0+038 <[^>]*> nop
+0+03c <[^>]*> addiu a0,a0,416
+0+040 <[^>]*> b 0+1a0 <[^>]*>
+0+044 <[^>]*> nop
+0+048 <[^>]*> lw t9,0\(gp\)
+0+04c <[^>]*> nop
+0+050 <[^>]*> addiu t9,t9,416
+0+054 <[^>]*> jalr t9
+0+058 <[^>]*> nop
+0+05c <[^>]*> lw gp,8\(sp\)
+0+060 <[^>]*> lw a0,0\(gp\)
+0+064 <[^>]*> nop
+0+068 <[^>]*> addiu a0,a0,0
+0+06c <[^>]*> lw a0,0\(a0\)
+0+070 <[^>]*> lw a0,0\(gp\)
+0+074 <[^>]*> nop
+0+078 <[^>]*> addiu a0,a0,0
+0+07c <[^>]*> lw a0,0\(a0\)
+0+080 <[^>]*> lw a0,0\(gp\)
+0+084 <[^>]*> nop
+0+088 <[^>]*> addiu a0,a0,416
+0+08c <[^>]*> lw a0,0\(a0\)
+0+090 <[^>]*> lw at,0\(gp\)
+0+094 <[^>]*> nop
+0+098 <[^>]*> lw a0,0\(at\)
+0+09c <[^>]*> lw a1,4\(at\)
+0+0a0 <[^>]*> lw at,0\(gp\)
+0+0a4 <[^>]*> nop
+0+0a8 <[^>]*> lw a0,0\(at\)
+0+0ac <[^>]*> lw a1,4\(at\)
+0+0b0 <[^>]*> lw at,0\(gp\)
+0+0b4 <[^>]*> nop
+0+0b8 <[^>]*> lw a0,416\(at\)
+0+0bc <[^>]*> lw a1,420\(at\)
+0+0c0 <[^>]*> lw at,0\(gp\)
+0+0c4 <[^>]*> nop
+0+0c8 <[^>]*> addiu at,at,0
+0+0cc <[^>]*> sw a0,0\(at\)
+0+0d0 <[^>]*> lw at,0\(gp\)
+0+0d4 <[^>]*> nop
+0+0d8 <[^>]*> addiu at,at,0
+0+0dc <[^>]*> sw a0,0\(at\)
+0+0e0 <[^>]*> lw at,0\(gp\)
+0+0e4 <[^>]*> nop
+0+0e8 <[^>]*> sw a0,0\(at\)
+0+0ec <[^>]*> sw a1,4\(at\)
+0+0f0 <[^>]*> lw at,0\(gp\)
+0+0f4 <[^>]*> nop
+0+0f8 <[^>]*> sw a0,0\(at\)
+0+0fc <[^>]*> sw a1,4\(at\)
+0+100 <[^>]*> lw at,0\(gp\)
+0+104 <[^>]*> nop
+0+108 <[^>]*> addiu at,at,0
+0+10c <[^>]*> lb a0,0\(at\)
+0+110 <[^>]*> lbu at,1\(at\)
+0+114 <[^>]*> sll a0,a0,0x8
+0+118 <[^>]*> or a0,a0,at
+0+11c <[^>]*> lw at,0\(gp\)
+0+120 <[^>]*> nop
+0+124 <[^>]*> addiu at,at,0
+0+128 <[^>]*> sb a0,1\(at\)
+0+12c <[^>]*> srl a0,a0,0x8
+0+130 <[^>]*> sb a0,0\(at\)
+0+134 <[^>]*> lbu at,1\(at\)
+0+138 <[^>]*> sll a0,a0,0x8
+0+13c <[^>]*> or a0,a0,at
+0+140 <[^>]*> lw at,0\(gp\)
+0+144 <[^>]*> nop
+0+148 <[^>]*> addiu at,at,0
+0+14c <[^>]*> lwl a0,0\(at\)
+0+150 <[^>]*> lwr a0,3\(at\)
+0+154 <[^>]*> lw at,0\(gp\)
+0+158 <[^>]*> nop
+0+15c <[^>]*> addiu at,at,0
+0+160 <[^>]*> swl a0,0\(at\)
+0+164 <[^>]*> swr a0,3\(at\)
+0+168 <[^>]*> lui a0,0x3ff0
+0+16c <[^>]*> move a1,zero
+0+170 <[^>]*> lw at,0\(gp\)
+0+174 <[^>]*> lw a0,0\(at\)
+0+178 <[^>]*> lw a1,4\(at\)
+0+17c <[^>]*> lui at,0x3ff0
+0+180 <[^>]*> mtc1 at,\$f1
+0+184 <[^>]*> mtc1 zero,\$f0
+0+188 <[^>]*> lw at,0\(gp\)
+0+18c <[^>]*> ldc1 \$f0,8\(at\)
+0+190 <[^>]*> addiu a0,a1,100
+0+194 <[^>]*> sltiu a0,a0,1
+0+198 <[^>]*> addiu a0,a1,100
+0+19c <[^>]*> sltu a0,zero,a0
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp32.s Thu Jul 19 19:09:16 2001
@@ -0,0 +1,98 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+func:
+ .set noreorder
+ .set mips4
+ li $4, 0x12345678 # 0000 lui a0,0x1234
+ # 0004 ori a0,a0,0x5678
+ la $4, shared # 0008 addiu a0,gp,shared
+ la $4, unshared # 000c lui a0,hi(unshared)
+ # 0010 addiu a0,a0,lo(unshared)
+ la $4, end # 0014 lui a0,hi(end)
+ # 0018 addiu a0,a0,lo(end)
+ j end # 001c j end
+ jal end # 0020 jal end
+ lw $4, shared # 0024 lw a0,shared(gp)
+ lw $4, unshared # 0028 lui a0,hi(unshared)
+ # 002c lw a0,lo(unshared)(a0)
+ lw $4, end # 0030 lui a0,hi(end)
+ # 0034 lw a0,lo(end)(a0)
+ ld $4, shared # 0038 lw a0,shared(gp)
+ # 003c lw a1,shared+4(gp)
+ ld $4, unshared # 0040 lui at,hi(unshared)
+ # 0044 lw a0,lo(unshared)(at)
+ # 0048 lw a1,lo(unshared)+4(at)
+ ld $4, end # 004c lui at,hi(end)
+ # 0050 lw a0,lo(end)(at)
+ # 0054 lw a1,lo(end)+4(at)
+ sw $4, shared # 0058 sw a0,shared(gp)
+ sw $4, unshared # 005c lui at,hi(unshared)
+ # 0060 sw a0,lo(unshared)(at)
+ sd $4, shared # 0064 sw a0,shared(gp)
+ # 0068 sw a1,shared+4(gp)
+ sd $4, unshared # 006c lui at,hi(unshared)
+ # 0070 sw a0,lo(unshared)(at)
+ # 0074 sw a1,lo(unshared)+4(at)
+ ulh $4, unshared # 0078 lui at,hi(unshared)
+ # 007c addiu at,at,lo(unshared)
+ # 0080 lb a0,0(at)
+ # 0084 lbu at,1(at)
+ # 0088 sll a0,a0,8
+ # 008c or a0,a0,at
+ ush $4, unshared # 0090 lui at,hi(unshared)
+ # 0094 addiu at,at,lo(unshared)
+ # 0098 sb a0,1(at)
+ # 009c srl a0,a0,8
+ # 00a0 sb a0,0(at)
+ # 00a4 lbu at,1(at)
+ # 00a8 sll a0,a0,8
+ # 00ac or a0,a0,at
+ ulw $4, unshared # 00b0 lui at,hi(unshared)
+ # 00b4 addiu at,at,lo(unshared)
+ # 00b8 lwl a0,0(at)
+ # 00bc lwr a0,3(at)
+ usw $4, unshared # 00c0 lui at,hi(unshared)
+ # 00c4 addiu at,at,lo(unshared)
+ # 00c8 swl a0,0(at)
+ # 00cc swr a0,3(at)
+ li.d $4, 1.0 # 00d0 lui a0,0x3ff0
+ # 00d4 move a1,zero
+ li.d $4, 1.9 # 00d8 lui at,hi(F1.9)
+ # 00dc lw a0,lo(F1.9)(at)
+ # 00e0 lw a1,lo(F1.9)+4(at)
+ li.d $f0, 1.0 # 00e4 lui at,0x3ff0
+ # 00e8 mtc1 at,$f1
+ # 00ec mtc1 zero,$f0
+ li.d $f0, 1.9 # 00f0 ldc1 $f0,L1.9(gp)
+ seq $4, $5, -100 # 00f4 addiu a0,a1,100
+ # 00f8 sltiu a0,a0,1
+ sne $4, $5, -100 # 00fc addiu a0,a1,100
+ # 0100 sltu a0,zero,a0
+
+# Not available in 32-bit mode
+# dla $4, shared
+# dla $4, unshared
+# uld $4, unshared
+# usd $4, unshared
+
+# Should produce warnings given -mgp32
+# bgt $4, 0x7fffffff, end
+# bgtu $4, 0xffffffff, end
+# ble $4, 0x7fffffff, end
+# bleu $4, 0xffffffff, end
+
+# Should produce warnings given -mfp32
+# add.d $f1, $f2, $f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp32.d Thu Jul 19 19:24:27 2001
@@ -0,0 +1,72 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mgp32 -mfp32
+#name: MIPS -mgp32 -mfp32
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui a0,0x1234
+0+004 <[^>]*> ori a0,a0,0x5678
+0+008 <[^>]*> addiu a0,gp,-16384
+0+00c <[^>]*> lui a0,0x0
+0+010 <[^>]*> addiu a0,a0,0
+0+014 <[^>]*> lui a0,0x0
+0+018 <[^>]*> addiu a0,a0,260
+0+01c <[^>]*> j 0+104 <[^>]*>
+0+020 <[^>]*> jal 0+104 <[^>]*>
+0+024 <[^>]*> lw a0,-16384\(gp\)
+0+028 <[^>]*> lui a0,0x0
+0+02c <[^>]*> lw a0,0\(a0\)
+0+030 <[^>]*> lui a0,0x0
+0+034 <[^>]*> lw a0,260\(a0\)
+0+038 <[^>]*> lw a0,-16384\(gp\)
+0+03c <[^>]*> lw a1,-16380\(gp\)
+0+040 <[^>]*> lui at,0x0
+0+044 <[^>]*> lw a0,0\(at\)
+0+048 <[^>]*> lw a1,4\(at\)
+0+04c <[^>]*> lui at,0x0
+0+050 <[^>]*> lw a0,260\(at\)
+0+054 <[^>]*> lw a1,264\(at\)
+0+058 <[^>]*> sw a0,-16384\(gp\)
+0+05c <[^>]*> lui at,0x0
+0+060 <[^>]*> sw a0,0\(at\)
+0+064 <[^>]*> sw a0,-16384\(gp\)
+0+068 <[^>]*> sw a1,-16380\(gp\)
+0+06c <[^>]*> lui at,0x0
+0+070 <[^>]*> sw a0,0\(at\)
+0+074 <[^>]*> sw a1,4\(at\)
+0+078 <[^>]*> lui at,0x0
+0+07c <[^>]*> addiu at,at,0
+0+080 <[^>]*> lb a0,0\(at\)
+0+084 <[^>]*> lbu at,1\(at\)
+0+088 <[^>]*> sll a0,a0,0x8
+0+08c <[^>]*> or a0,a0,at
+0+090 <[^>]*> lui at,0x0
+0+094 <[^>]*> addiu at,at,0
+0+098 <[^>]*> sb a0,1\(at\)
+0+09c <[^>]*> srl a0,a0,0x8
+0+0a0 <[^>]*> sb a0,0\(at\)
+0+0a4 <[^>]*> lbu at,1\(at\)
+0+0a8 <[^>]*> sll a0,a0,0x8
+0+0ac <[^>]*> or a0,a0,at
+0+0b0 <[^>]*> lui at,0x0
+0+0b4 <[^>]*> addiu at,at,0
+0+0b8 <[^>]*> lwl a0,0\(at\)
+0+0bc <[^>]*> lwr a0,3\(at\)
+0+0c0 <[^>]*> lui at,0x0
+0+0c4 <[^>]*> addiu at,at,0
+0+0c8 <[^>]*> swl a0,0\(at\)
+0+0cc <[^>]*> swr a0,3\(at\)
+0+0d0 <[^>]*> lui a0,0x3ff0
+0+0d4 <[^>]*> move a1,zero
+0+0d8 <[^>]*> lui at,0x0
+0+0dc <[^>]*> lw a0,0\(at\)
+0+0e0 <[^>]*> lw a1,4\(at\)
+0+0e4 <[^>]*> lui at,0x3ff0
+0+0e8 <[^>]*> mtc1 at,\$f1
+0+0ec <[^>]*> mtc1 zero,\$f0
+0+0f0 <[^>]*> ldc1 \$f0,-16384\(gp\)
+0+0f4 <[^>]*> addiu a0,a1,100
+0+0f8 <[^>]*> sltiu a0,a0,1
+0+0fc <[^>]*> addiu a0,a1,100
+0+100 <[^>]*> sltu a0,zero,a0
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp64-pic.s Thu Jul 19 18:24:25 2001
@@ -0,0 +1,138 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+ .ent func
+func:
+ .set mips4
+ .set noreorder
+ .cpload $25 # 0000 lui gp,hi(_gp_disp)
+ # 0004 addiu gp,gp,lo(_gp_disp)
+ # 0008 addu gp,gp,t9
+ .set reorder
+ .cprestore 8 # 000c sw gp,8(sp)
+ .cpadd $4 # 0010 addu a0,a0,gp
+ li $4, 0x12345678 # 0014 lui a0,0x1234
+ # 0018 ori a0,a0,0x5678
+ la $4, shared # 001c lw a0,got(.sdata)(gp)
+ # 0020 nop
+ # 0024 addiu a0,a0,lo(shared)
+ la $4, unshared # 0028 lw a0,got(.data)(gp)
+ # 002c nop
+ # 0030 addiu a0,a0,lo(unshared)
+ la $4, end # 0034 lw a0,got(.text)(gp)
+ # 0038 nop
+ # 003c addiu a0,a0,lo(end)
+ j end # 0040 b end
+ # 0044 nop
+ jal end # 0048 lw t9,got(.text)(gp)
+ # 004c nop
+ # 0050 addiu t9,t9,lo(end)
+ # 0054 jalr t9
+ # 0058 nop
+ # 005c lw gp,8(sp)
+ lw $4, shared # 0060 lw a0,got(.sdata)(gp)
+ # 0064 nop
+ # 0068 addiu a0,a0,lo(shared)
+ # 006c lw a0,(a0)
+ lw $4, unshared # 0070 lw a0,got(.data)(gp)
+ # 0074 nop
+ # 0078 addiu a0,a0,lo(unshared)
+ # 007c lw a0,(a0)
+ lw $4, end # 0080 lw a0,got(.text)(gp)
+ # 0084 nop
+ # 0088 addiu a0,a0,lo(end)
+ # 008c lw a0,(a0)
+ ld $4, shared # 0090 lw at,got(.sdata)(gp)
+ # 0094 nop
+ # 0098 lw a0,lo(shared)(at)
+ # 009c lw a1,lo(shared)+4(at)
+ ld $4, unshared # 00a0 lw at,got(.data)(gp)
+ # 00a4 nop
+ # 00a8 lw a0,lo(unshared)(at)
+ # 00ac lw a1,lo(unshared)+4(at)
+ ld $4, end # 00b0 lw at,got(.text)(gp)
+ # 00b4 nop
+ # 00b8 lw a0,lo(end)(at)
+ # 00bc lw a1,lo(end)+4(at)
+ sw $4, shared # 00c0 lw at,got(.sdata)(gp)
+ # 00c4 nop
+ # 00c8 addiu at,at,lo(shared)
+ # 00cc sw a0,0(at)
+ sw $4, unshared # 00d0 lw at,got(.data)(gp)
+ # 00d4 nop
+ # 00d8 addiu at,at,lo(unshared)
+ # 00dc sw a0,0(at)
+ sd $4, shared # 00e0 lw at,got(.sdata)(gp)
+ # 00e4 nop
+ # 00e8 sw a0,lo(shared)(at)
+ # 00ec sw a1,lo(shared)+4(at)
+ sd $4, unshared # 00f0 lw at,got(.data)(gp)
+ # 00f4 nop
+ # 00f8 sw a0,lo(unshared)(at)
+ # 00fc sw a1,lo(unshared)+4(at)
+ ulh $4, unshared # 0100 lw at,got(.data)(gp)
+ # 0104 nop
+ # 0108 addiu at,at,lo(unshared)
+ # 010c lb a0,0(at)
+ # 0110 lbu at,1(at)
+ # 0114 sll a0,a0,8
+ # 0118 or a0,a0,at
+ ush $4, unshared # 011c lw at,got(.data)(gp)
+ # 0120 nop
+ # 0124 addiu at,at,lo(unshared)
+ # 0128 sb a0,0(at)
+ # 012c srl a0,a0,8
+ # 0130 sb a0,1(at)
+ # 0134 lbu at,0(at)
+ # 0138 sll a0,a0,8
+ # 013c or a0,a0,at
+ ulw $4, unshared # 0140 lw at,got(.data)(gp)
+ # 0144 nop
+ # 0148 addiu at,at,lo(unshared)
+ # 014c lwl a0,0(at)
+ # 0150 lwr a0,3(at)
+ usw $4, unshared # 0154 lw at,got(.data)(gp)
+ # 0158 nop
+ # 015c addiu at,at,lo(unshared)
+ # 0160 swl a0,0(at)
+ # 0164 swr a0,3(at)
+ li.d $4, 1.0 # 0168 lui a0,0x3ff0
+ # 016c move a1,zero
+ li.d $4, 1.9 # 0170 lw at,got(.rodata)(gp)
+ # 0174 lw a0,lo(F1.9)(at)
+ # 0178 lw a1,lo(F1.9)+4(at)
+ li.d $f0, 1.0 # 017c lw at,got(.rodata)(gp)
+ # 0180 ldc1 $f0,lo(L1.0)(at)
+ li.d $f0, 1.9 # 0184 lw at,got(.rodata)(gp)
+ # 0188 ldc1 $f0,lo(L1.9)(at)
+ seq $4, $5, -100 # 018c addiu a0,a1,100
+ # 0190 sltiu a0,a0,1
+ sne $4, $5, -100 # 0194 addiu a0,a1,100
+ # 0198 sltu a0,zero,a0
+
+# Not available in 32-bit mode
+# dla $4, shared
+# dla $4, unshared
+# uld $4, unshared
+# usd $4, unshared
+
+# Should produce warnings given -mgp32
+# bgt $4, 0x7fffffff, end
+# bgtu $4, 0xffffffff, end
+# ble $4, 0x7fffffff, end
+# bleu $4, 0xffffffff, end
+
+# Should produce warnings given -mfp32
+ add.d $f1, $f2, $f3 # 019c add.d $f1,$f2,$f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp64-pic.d Thu Jul 19 19:24:28 2001
@@ -0,0 +1,111 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mgp32 -KPIC
+#name: MIPS -mgp32 -mfp64 (SVR4 PIC)
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui gp,0x0
+0+004 <[^>]*> addiu gp,gp,0
+0+008 <[^>]*> addu gp,gp,t9
+0+00c <[^>]*> sw gp,8\(sp\)
+0+010 <[^>]*> addu a0,a0,gp
+0+014 <[^>]*> lui a0,0x1234
+0+018 <[^>]*> ori a0,a0,0x5678
+0+01c <[^>]*> lw a0,0\(gp\)
+0+020 <[^>]*> nop
+0+024 <[^>]*> addiu a0,a0,0
+0+028 <[^>]*> lw a0,0\(gp\)
+0+02c <[^>]*> nop
+0+030 <[^>]*> addiu a0,a0,0
+0+034 <[^>]*> lw a0,0\(gp\)
+0+038 <[^>]*> nop
+0+03c <[^>]*> addiu a0,a0,416
+0+040 <[^>]*> b 0+1a0 <[^>]*>
+0+044 <[^>]*> nop
+0+048 <[^>]*> lw t9,0\(gp\)
+0+04c <[^>]*> nop
+0+050 <[^>]*> addiu t9,t9,416
+0+054 <[^>]*> jalr t9
+0+058 <[^>]*> nop
+0+05c <[^>]*> lw gp,8\(sp\)
+0+060 <[^>]*> lw a0,0\(gp\)
+0+064 <[^>]*> nop
+0+068 <[^>]*> addiu a0,a0,0
+0+06c <[^>]*> lw a0,0\(a0\)
+0+070 <[^>]*> lw a0,0\(gp\)
+0+074 <[^>]*> nop
+0+078 <[^>]*> addiu a0,a0,0
+0+07c <[^>]*> lw a0,0\(a0\)
+0+080 <[^>]*> lw a0,0\(gp\)
+0+084 <[^>]*> nop
+0+088 <[^>]*> addiu a0,a0,416
+0+08c <[^>]*> lw a0,0\(a0\)
+0+090 <[^>]*> lw at,0\(gp\)
+0+094 <[^>]*> nop
+0+098 <[^>]*> lw a0,0\(at\)
+0+09c <[^>]*> lw a1,4\(at\)
+0+0a0 <[^>]*> lw at,0\(gp\)
+0+0a4 <[^>]*> nop
+0+0a8 <[^>]*> lw a0,0\(at\)
+0+0ac <[^>]*> lw a1,4\(at\)
+0+0b0 <[^>]*> lw at,0\(gp\)
+0+0b4 <[^>]*> nop
+0+0b8 <[^>]*> lw a0,416\(at\)
+0+0bc <[^>]*> lw a1,420\(at\)
+0+0c0 <[^>]*> lw at,0\(gp\)
+0+0c4 <[^>]*> nop
+0+0c8 <[^>]*> addiu at,at,0
+0+0cc <[^>]*> sw a0,0\(at\)
+0+0d0 <[^>]*> lw at,0\(gp\)
+0+0d4 <[^>]*> nop
+0+0d8 <[^>]*> addiu at,at,0
+0+0dc <[^>]*> sw a0,0\(at\)
+0+0e0 <[^>]*> lw at,0\(gp\)
+0+0e4 <[^>]*> nop
+0+0e8 <[^>]*> sw a0,0\(at\)
+0+0ec <[^>]*> sw a1,4\(at\)
+0+0f0 <[^>]*> lw at,0\(gp\)
+0+0f4 <[^>]*> nop
+0+0f8 <[^>]*> sw a0,0\(at\)
+0+0fc <[^>]*> sw a1,4\(at\)
+0+100 <[^>]*> lw at,0\(gp\)
+0+104 <[^>]*> nop
+0+108 <[^>]*> addiu at,at,0
+0+10c <[^>]*> lb a0,0\(at\)
+0+110 <[^>]*> lbu at,1\(at\)
+0+114 <[^>]*> sll a0,a0,0x8
+0+118 <[^>]*> or a0,a0,at
+0+11c <[^>]*> lw at,0\(gp\)
+0+120 <[^>]*> nop
+0+124 <[^>]*> addiu at,at,0
+0+128 <[^>]*> sb a0,1\(at\)
+0+12c <[^>]*> srl a0,a0,0x8
+0+130 <[^>]*> sb a0,0\(at\)
+0+134 <[^>]*> lbu at,1\(at\)
+0+138 <[^>]*> sll a0,a0,0x8
+0+13c <[^>]*> or a0,a0,at
+0+140 <[^>]*> lw at,0\(gp\)
+0+144 <[^>]*> nop
+0+148 <[^>]*> addiu at,at,0
+0+14c <[^>]*> lwl a0,0\(at\)
+0+150 <[^>]*> lwr a0,3\(at\)
+0+154 <[^>]*> lw at,0\(gp\)
+0+158 <[^>]*> nop
+0+15c <[^>]*> addiu at,at,0
+0+160 <[^>]*> swl a0,0\(at\)
+0+164 <[^>]*> swr a0,3\(at\)
+0+168 <[^>]*> lui a0,0x3ff0
+0+16c <[^>]*> move a1,zero
+0+170 <[^>]*> lw at,0\(gp\)
+0+174 <[^>]*> lw a0,0\(at\)
+0+178 <[^>]*> lw a1,4\(at\)
+0+17c <[^>]*> lw at,0\(gp\)
+0+180 <[^>]*> ldc1 \$f0,8\(at\)
+0+184 <[^>]*> lw at,0\(gp\)
+0+188 <[^>]*> ldc1 \$f0,16\(at\)
+0+18c <[^>]*> addiu a0,a1,100
+0+190 <[^>]*> sltiu a0,a0,1
+0+194 <[^>]*> addiu a0,a1,100
+0+198 <[^>]*> sltu a0,zero,a0
+0+19c <[^>]*> add.d \$f1,\$f2,\$f3
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp64.s Thu Jul 19 19:09:05 2001
@@ -0,0 +1,95 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+func:
+ .set noreorder
+ .set mips4
+ li $4, 0x12345678 # 0000 lui a0,0x1234
+ # 0004 ori a0,a0,0x5678
+ la $4, shared # 0008 addiu a0,gp,shared
+ la $4, unshared # 000c lui a0,hi(unshared)
+ # 0010 addiu a0,a0,lo(unshared)
+ la $4, end # 0014 lui a0,hi(end)
+ # 0018 addiu a0,a0,lo(end)
+ j end # 001c j end
+ jal end # 0020 jal end
+ lw $4, shared # 0024 lw a0,shared(gp)
+ lw $4, unshared # 0028 lui a0,hi(unshared)
+ # 002c lw a0,lo(unshared)(a0)
+ lw $4, end # 0030 lui a0,hi(end)
+ # 0034 lw a0,lo(end)(a0)
+ ld $4, shared # 0038 lw a0,shared(gp)
+ # 003c lw a1,shared+4(gp)
+ ld $4, unshared # 0040 lui at,hi(unshared)
+ # 0044 lw a0,lo(unshared)(at)
+ # 0048 lw a1,lo(unshared)+4(at)
+ ld $4, end # 004c lui at,hi(end)
+ # 0050 lw a0,lo(end)(at)
+ # 0054 lw a1,lo(end)+4(at)
+ sw $4, shared # 0058 sw a0,shared(gp)
+ sw $4, unshared # 005c lui at,hi(unshared)
+ # 0060 sw a0,lo(unshared)(at)
+ sd $4, shared # 0064 sw a0,shared(gp)
+ # 0068 sw a1,shared+4(gp)
+ sd $4, unshared # 006c lui at,hi(unshared)
+ # 0070 sw a0,lo(unshared)(at)
+ # 0074 sw a1,lo(unshared)+4(at)
+ ulh $4, unshared # 0078 lui at,hi(unshared)
+ # 007c addiu at,at,lo(unshared)
+ # 0080 lb a0,0(at)
+ # 0084 lbu at,1(at)
+ # 0088 sll a0,a0,8
+ # 008c or a0,a0,at
+ ush $4, unshared # 0090 lui at,hi(unshared)
+ # 0094 addiu at,at,lo(unshared)
+ # 0098 sb a0,1(at)
+ # 009c srl a0,a0,8
+ # 00a0 sb a0,0(at)
+ # 00a4 lbu at,1(at)
+ # 00a8 sll a0,a0,8
+ # 00ac or a0,a0,at
+ ulw $4, unshared # 00b0 lui at,hi(unshared)
+ # 00b4 addiu at,at,lo(unshared)
+ # 00b8 lwl a0,0(at)
+ # 00bc lwr a0,3(at)
+ usw $4, unshared # 00c0 lui at,hi(unshared)
+ # 00c4 addiu at,at,lo(unshared)
+ # 00c8 swl a0,0(at)
+ # 00cc swr a0,3(at)
+ li.d $4, 1.0 # 00d0 lui a0,0x3ff0
+ # 00d4 move a1,zero
+ li.d $4, 1.9 # 00d8 lui at,hi(F1.9)
+ # 00dc lw a0,lo(F1.9)(at)
+ # 00e0 lw a1,lo(F1.9)+4(at)
+ li.d $f0, 1.0 # 00e4 ldc1 $f0,L1.0(gp)
+ li.d $f0, 1.9 # 00e8 ldc1 $f0,L1.9(gp)
+ seq $4, $5, -100 # 00ec addiu a0,a1,100
+ # 00f0 sltiu a0,a0,1
+ sne $4, $5, -100 # 00f4 addiu a0,a1,100
+ # 00f8 sltu a0,zero,a0
+
+# Not available in 32-bit mode
+# dla $4, shared
+# dla $4, unshared
+# uld $4, unshared
+# usd $4, unshared
+
+# Should produce warnings given -mgp32
+# bgt $4, 0x7fffffff, end
+# bgtu $4, 0xffffffff, end
+# ble $4, 0x7fffffff, end
+# bleu $4, 0xffffffff, end
+
+ add.d $f1, $f2, $f3 # 00fc add.d $f1,$f2,$f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp32-fp64.d Thu Jul 19 19:24:27 2001
@@ -0,0 +1,71 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mgp32
+#name: MIPS -mgp32 -mfp64
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui a0,0x1234
+0+004 <[^>]*> ori a0,a0,0x5678
+0+008 <[^>]*> addiu a0,gp,-16384
+0+00c <[^>]*> lui a0,0x0
+0+010 <[^>]*> addiu a0,a0,0
+0+014 <[^>]*> lui a0,0x0
+0+018 <[^>]*> addiu a0,a0,256
+0+01c <[^>]*> j 0+100 <[^>]*>
+0+020 <[^>]*> jal 0+100 <[^>]*>
+0+024 <[^>]*> lw a0,-16384\(gp\)
+0+028 <[^>]*> lui a0,0x0
+0+02c <[^>]*> lw a0,0\(a0\)
+0+030 <[^>]*> lui a0,0x0
+0+034 <[^>]*> lw a0,256\(a0\)
+0+038 <[^>]*> lw a0,-16384\(gp\)
+0+03c <[^>]*> lw a1,-16380\(gp\)
+0+040 <[^>]*> lui at,0x0
+0+044 <[^>]*> lw a0,0\(at\)
+0+048 <[^>]*> lw a1,4\(at\)
+0+04c <[^>]*> lui at,0x0
+0+050 <[^>]*> lw a0,256\(at\)
+0+054 <[^>]*> lw a1,260\(at\)
+0+058 <[^>]*> sw a0,-16384\(gp\)
+0+05c <[^>]*> lui at,0x0
+0+060 <[^>]*> sw a0,0\(at\)
+0+064 <[^>]*> sw a0,-16384\(gp\)
+0+068 <[^>]*> sw a1,-16380\(gp\)
+0+06c <[^>]*> lui at,0x0
+0+070 <[^>]*> sw a0,0\(at\)
+0+074 <[^>]*> sw a1,4\(at\)
+0+078 <[^>]*> lui at,0x0
+0+07c <[^>]*> addiu at,at,0
+0+080 <[^>]*> lb a0,0\(at\)
+0+084 <[^>]*> lbu at,1\(at\)
+0+088 <[^>]*> sll a0,a0,0x8
+0+08c <[^>]*> or a0,a0,at
+0+090 <[^>]*> lui at,0x0
+0+094 <[^>]*> addiu at,at,0
+0+098 <[^>]*> sb a0,1\(at\)
+0+09c <[^>]*> srl a0,a0,0x8
+0+0a0 <[^>]*> sb a0,0\(at\)
+0+0a4 <[^>]*> lbu at,1\(at\)
+0+0a8 <[^>]*> sll a0,a0,0x8
+0+0ac <[^>]*> or a0,a0,at
+0+0b0 <[^>]*> lui at,0x0
+0+0b4 <[^>]*> addiu at,at,0
+0+0b8 <[^>]*> lwl a0,0\(at\)
+0+0bc <[^>]*> lwr a0,3\(at\)
+0+0c0 <[^>]*> lui at,0x0
+0+0c4 <[^>]*> addiu at,at,0
+0+0c8 <[^>]*> swl a0,0\(at\)
+0+0cc <[^>]*> swr a0,3\(at\)
+0+0d0 <[^>]*> lui a0,0x3ff0
+0+0d4 <[^>]*> move a1,zero
+0+0d8 <[^>]*> lui at,0x0
+0+0dc <[^>]*> lw a0,0\(at\)
+0+0e0 <[^>]*> lw a1,4\(at\)
+0+0e4 <[^>]*> ldc1 \$f0,-16384\(gp\)
+0+0e8 <[^>]*> ldc1 \$f0,-16376\(gp\)
+0+0ec <[^>]*> addiu a0,a1,100
+0+0f0 <[^>]*> sltiu a0,a0,1
+0+0f4 <[^>]*> addiu a0,a1,100
+0+0f8 <[^>]*> sltu a0,zero,a0
+0+0fc <[^>]*> add.d \$f1,\$f2,\$f3
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp32-pic.s Thu Jul 19 18:20:17 2001
@@ -0,0 +1,162 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+ .ent func
+func:
+ .set mips4
+ .set noreorder
+ .cpload $25 # 0000 lui gp,hi(_gp_disp)
+ # 0004 addiu gp,gp,lo(_gp_disp)
+ # 0008 addu gp,gp,t9
+ .set reorder
+ .cprestore 8 # 000c sd gp,8(sp)
+ .cpadd $4 # 0010 daddu a0,a0,gp
+ li $4, 0x12345678 # 0014 lui a0,0x1234
+ # 0018 ori a0,a0,0x5678
+ la $4, shared # 001c lw a0,got(.sdata)(gp)
+ # 0020 nop
+ # 0024 daddiu a0,a0,lo(shared)
+ la $4, unshared # 0028 lw a0,got(.data)(gp)
+ # 002c nop
+ # 0030 daddiu a0,a0,lo(unshared)
+ la $4, end # 0034 lw a0,got(.text)(gp)
+ # 0038 nop
+ # 003c daddiu a0,a0,lo(end)
+ j end # 0040 b end
+ # 0044 nop
+ jal end # 0048 ld t9,got(.text)(gp)
+ # 004c nop
+ # 0050 daddiu t9,t9,lo(end)
+ # 0054 jalr t9
+ # 0058 nop
+ # 005c ld gp,8(sp)
+ lw $4, shared # 0060 ld a0,got(.sdata)(gp)
+ # 0064 nop
+ # 0068 daddiu a0,a0,lo(shared)
+ # 006c lw a0,(a0)
+ lw $4, unshared # 0070 ld a0,got(.data)(gp)
+ # 0074 nop
+ # 0078 daddiu a0,a0,lo(unshared)
+ # 007c lw a0,(a0)
+ lw $4, end # 0080 ld a0,got(.text)(gp)
+ # 0084 nop
+ # 0088 daddiu a0,a0,lo(end)
+ # 008c lw a0,(a0)
+ ld $4, shared # 0090 ld a0,got(.sdata)(gp)
+ # 0094 nop
+ # 0098 daddiu a0,a0,lo(shared)
+ # 009c ld a0,(a0)
+ ld $4, unshared # 00a0 ld a0,got(.data)(gp)
+ # 00a4 nop
+ # 00a8 daddiu a0,a0,lo(unshared)
+ # 00ac ld a0,(a0)
+ ld $4, end # 00b0 ld a0,got(.text)(gp)
+ # 00b4 nop
+ # 00b8 daddiu a0,a0,lo(end)
+ # 00bc ld a0,(a0)
+ sw $4, shared # 00c0 ld at,got(.sdata)(gp)
+ # 00c4 nop
+ # 00c8 daddiu at,at,lo(shared)
+ # 00cc sw a0,0(at)
+ sw $4, unshared # 00d0 ld at,got(.data)(gp)
+ # 00d4 nop
+ # 00d8 daddiu at,at,lo(unshared)
+ # 00dc sw a0,0(at)
+ sd $4, shared # 00e0 ld at,got(.sdata)(gp)
+ # 00e4 nop
+ # 00e8 daddiu at,at,lo(shared)
+ # 00ec sd a0,(at)
+ sd $4, unshared # 00f0 ld at,got(.data)(gp)
+ # 00f4 nop
+ # 00f8 daddiu at,at,lo(unshared)
+ # 00fc sd a0,(at)
+ ulh $4, unshared # 0100 ld at,got(.data)(gp)
+ # 0104 nop
+ # 0108 daddiu at,at,lo(unshared)
+ # 010c lb a0,0(at)
+ # 0110 lbu at,1(at)
+ # 0114 sll a0,a0,8
+ # 0118 or a0,a0,at
+ ush $4, unshared # 011c ld at,got(.data)(gp)
+ # 0120 nop
+ # 0124 daddiu at,at,lo(unshared)
+ # 0128 sb a0,0(at)
+ # 012c srl a0,a0,8
+ # 0130 sb a0,1(at)
+ # 0134 lbu at,0(at)
+ # 0138 sll a0,a0,8
+ # 013c or a0,a0,at
+ ulw $4, unshared # 0140 ld at,got(.data)(gp)
+ # 0144 nop
+ # 0148 daddiu at,at,lo(unshared)
+ # 014c lwl a0,0(at)
+ # 0150 lwr a0,3(at)
+ usw $4, unshared # 0154 ld at,got(.data)(gp)
+ # 0158 nop
+ # 015c daddiu at,at,lo(unshared)
+ # 0160 swl a0,0(at)
+ # 0164 swr a0,3(at)
+ li.d $4, 1.0 # 0168 li a0,0xffc0
+ # 016c dsll32 a0,a0,14
+ li.d $4, 1.9 # 0170 ld at,got(.rodata)(gp)
+ # 0174 ld a0,lo(F1.9)(at)
+ li.d $f0, 1.0 # 0178 lui at,0x3ff0
+ # 017c mtc1 at,$f1
+ # 0180 mtc1 zero,$f0
+ li.d $f0, 1.9 # 0184 ld at,got(.rodata)(gp)
+ # 0188 ldc1 $f0,lo(L1.9)(at)
+ seq $4, $5, -100 # 018c daddiu a0,a1,100
+ # 0190 sltiu a0,a0,1
+ sne $4, $5, -100 # 0194 daddiu a0,a1,100
+ # 0198 sltu a0,zero,a0
+
+ dla $4, shared # 019c ld a0,got(.sdata)(gp)
+ # 01a0 nop
+ # 01a4 daddiu a0,a0,lo(shared)
+ dla $4, unshared # 01a8 ld a0,got(.data)(gp)
+ # 01ac nop
+ # 01b0 daddiu a0,a0,lo(unshared)
+ uld $4, unshared # 01b4 ld at,got(.data)(gp)
+ # 01b8 nop
+ # 01bc daddiu at,at,lo(unshared)
+ # 01c0 ldl a0,0(at)
+ # 01c4 ldr a0,7(at)
+ usd $4, unshared # 01c8 ld at,got(.data)(gp)
+ # 01cc nop
+ # 01d0 daddiu at,at,lo(unshared)
+ # 01d4 sdl a0,0(at)
+ # 01d8 sdr a0,7(at)
+
+ bgt $4, 0x7fffffff, end # 01dc lui at,0x8000
+ # 01e0 slt at,a0,at
+ # 01e4 beqz at,end
+ # 01e8 nop
+ bgtu $4, 0xffffffff, end # 01ec li at,0x8000
+ # 01f0 dsll at,at,17
+ # 01f4 sltu at,a0,at
+ # 01f8 beqz at,end
+ # 01fc nop
+ ble $4, 0x7fffffff, end # 0200 lui at,0x8000
+ # 0204 slt at,a0,at
+ # 0208 bnez at,end
+ # 020c nop
+ bleu $4, 0xffffffff, end # 0210 li at,0x8000
+ # 0214 dsll at,at,17
+ # 0218 sltu at,a0,at
+ # 021c bnez at,end
+ # 0220 nop
+
+# Should produce warnings given -mfp32
+# add.d $f1, $f2, $f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp32-pic.d Thu Jul 19 19:24:28 2001
@@ -0,0 +1,144 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mfp32 -KPIC
+#name: MIPS -mgp64 -mfp32 (SVR4 PIC)
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui gp,0x0
+0+004 <[^>]*> addiu gp,gp,0
+0+008 <[^>]*> addu gp,gp,t9
+0+00c <[^>]*> sd gp,8\(sp\)
+0+010 <[^>]*> daddu a0,a0,gp
+0+014 <[^>]*> lui a0,0x1234
+0+018 <[^>]*> ori a0,a0,0x5678
+0+01c <[^>]*> lw a0,0\(gp\)
+0+020 <[^>]*> nop
+0+024 <[^>]*> daddiu a0,a0,0
+0+028 <[^>]*> lw a0,0\(gp\)
+0+02c <[^>]*> nop
+0+030 <[^>]*> daddiu a0,a0,0
+0+034 <[^>]*> lw a0,0\(gp\)
+0+038 <[^>]*> nop
+0+03c <[^>]*> daddiu a0,a0,548
+0+040 <[^>]*> b 0+224 <[^>]*>
+0+044 <[^>]*> nop
+0+048 <[^>]*> ld t9,0\(gp\)
+0+04c <[^>]*> nop
+0+050 <[^>]*> daddiu t9,t9,548
+0+054 <[^>]*> jalr t9
+0+058 <[^>]*> nop
+0+05c <[^>]*> ld gp,8\(sp\)
+0+060 <[^>]*> ld a0,0\(gp\)
+0+064 <[^>]*> nop
+0+068 <[^>]*> daddiu a0,a0,0
+0+06c <[^>]*> lw a0,0\(a0\)
+0+070 <[^>]*> ld a0,0\(gp\)
+0+074 <[^>]*> nop
+0+078 <[^>]*> daddiu a0,a0,0
+0+07c <[^>]*> lw a0,0\(a0\)
+0+080 <[^>]*> ld a0,0\(gp\)
+0+084 <[^>]*> nop
+0+088 <[^>]*> daddiu a0,a0,548
+0+08c <[^>]*> lw a0,0\(a0\)
+0+090 <[^>]*> ld a0,0\(gp\)
+0+094 <[^>]*> nop
+0+098 <[^>]*> daddiu a0,a0,0
+0+09c <[^>]*> ld a0,0\(a0\)
+0+0a0 <[^>]*> ld a0,0\(gp\)
+0+0a4 <[^>]*> nop
+0+0a8 <[^>]*> daddiu a0,a0,0
+0+0ac <[^>]*> ld a0,0\(a0\)
+0+0b0 <[^>]*> ld a0,0\(gp\)
+0+0b4 <[^>]*> nop
+0+0b8 <[^>]*> daddiu a0,a0,548
+0+0bc <[^>]*> ld a0,0\(a0\)
+0+0c0 <[^>]*> ld at,0\(gp\)
+0+0c4 <[^>]*> nop
+0+0c8 <[^>]*> daddiu at,at,0
+0+0cc <[^>]*> sw a0,0\(at\)
+0+0d0 <[^>]*> ld at,0\(gp\)
+0+0d4 <[^>]*> nop
+0+0d8 <[^>]*> daddiu at,at,0
+0+0dc <[^>]*> sw a0,0\(at\)
+0+0e0 <[^>]*> ld at,0\(gp\)
+0+0e4 <[^>]*> nop
+0+0e8 <[^>]*> daddiu at,at,0
+0+0ec <[^>]*> sd a0,0\(at\)
+0+0f0 <[^>]*> ld at,0\(gp\)
+0+0f4 <[^>]*> nop
+0+0f8 <[^>]*> daddiu at,at,0
+0+0fc <[^>]*> sd a0,0\(at\)
+0+100 <[^>]*> ld at,0\(gp\)
+0+104 <[^>]*> nop
+0+108 <[^>]*> daddiu at,at,0
+0+10c <[^>]*> lb a0,0\(at\)
+0+110 <[^>]*> lbu at,1\(at\)
+0+114 <[^>]*> sll a0,a0,0x8
+0+118 <[^>]*> or a0,a0,at
+0+11c <[^>]*> ld at,0\(gp\)
+0+120 <[^>]*> nop
+0+124 <[^>]*> daddiu at,at,0
+0+128 <[^>]*> sb a0,1\(at\)
+0+12c <[^>]*> srl a0,a0,0x8
+0+130 <[^>]*> sb a0,0\(at\)
+0+134 <[^>]*> lbu at,1\(at\)
+0+138 <[^>]*> sll a0,a0,0x8
+0+13c <[^>]*> or a0,a0,at
+0+140 <[^>]*> ld at,0\(gp\)
+0+144 <[^>]*> nop
+0+148 <[^>]*> daddiu at,at,0
+0+14c <[^>]*> lwl a0,0\(at\)
+0+150 <[^>]*> lwr a0,3\(at\)
+0+154 <[^>]*> ld at,0\(gp\)
+0+158 <[^>]*> nop
+0+15c <[^>]*> daddiu at,at,0
+0+160 <[^>]*> swl a0,0\(at\)
+0+164 <[^>]*> swr a0,3\(at\)
+0+168 <[^>]*> li a0,0xffc0
+0+16c <[^>]*> dsll32 a0,a0,0xe
+0+170 <[^>]*> ld at,0\(gp\)
+0+174 <[^>]*> ld a0,0\(at\)
+0+178 <[^>]*> lui at,0x3ff0
+0+17c <[^>]*> mtc1 at,\$f1
+0+180 <[^>]*> mtc1 zero,\$f0
+0+184 <[^>]*> ld at,0\(gp\)
+0+188 <[^>]*> ldc1 \$f0,8\(at\)
+0+18c <[^>]*> daddiu a0,a1,100
+0+190 <[^>]*> sltiu a0,a0,1
+0+194 <[^>]*> daddiu a0,a1,100
+0+198 <[^>]*> sltu a0,zero,a0
+0+19c <[^>]*> ld a0,0\(gp\)
+0+1a0 <[^>]*> nop
+0+1a4 <[^>]*> daddiu a0,a0,0
+0+1a8 <[^>]*> ld a0,0\(gp\)
+0+1ac <[^>]*> nop
+0+1b0 <[^>]*> daddiu a0,a0,0
+0+1b4 <[^>]*> ld at,0\(gp\)
+0+1b8 <[^>]*> nop
+0+1bc <[^>]*> daddiu at,at,0
+0+1c0 <[^>]*> ldl a0,0\(at\)
+0+1c4 <[^>]*> ldr a0,7\(at\)
+0+1c8 <[^>]*> ld at,0\(gp\)
+0+1cc <[^>]*> nop
+0+1d0 <[^>]*> daddiu at,at,0
+0+1d4 <[^>]*> sdl a0,0\(at\)
+0+1d8 <[^>]*> sdr a0,7\(at\)
+0+1dc <[^>]*> lui at,0x8000
+0+1e0 <[^>]*> slt at,a0,at
+0+1e4 <[^>]*> beqz at,0+224 <[^>]*>
+0+1e8 <[^>]*> nop
+0+1ec <[^>]*> li at,0x8000
+0+1f0 <[^>]*> dsll at,at,0x11
+0+1f4 <[^>]*> sltu at,a0,at
+0+1f8 <[^>]*> beqz at,0+224 <[^>]*>
+0+1fc <[^>]*> nop
+0+200 <[^>]*> lui at,0x8000
+0+204 <[^>]*> slt at,a0,at
+0+208 <[^>]*> bnez at,0+224 <[^>]*>
+0+20c <[^>]*> nop
+0+210 <[^>]*> li at,0x8000
+0+214 <[^>]*> dsll at,at,0x11
+0+218 <[^>]*> sltu at,a0,at
+0+21c <[^>]*> bnez at,0+224 <[^>]*>
+0+220 <[^>]*> nop
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp32.s Thu Jul 19 19:23:40 2001
@@ -0,0 +1,106 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+func:
+ .set noreorder
+ .set mips4
+ li $4, 0x12345678 # 0000 lui a0,0x1234
+ # 0004 ori a0,a0,0x5678
+ la $4, shared # 0008 daddiu a0,gp,shared
+ la $4, unshared # 000c lui a0,hi(unshared)
+ # 0010 daddiu a0,a0,lo(unshared)
+ la $4, end # 0014 lui a0,hi(end)
+ # 0018 daddiu a0,a0,lo(end)
+ j end # 001c j end
+ jal end # 0020 jal end
+ lw $4, shared # 0024 lw a0,shared(gp)
+ lw $4, unshared # 0028 lui a0,hi(unshared)
+ # 002c lw a0,lo(unshared)(a0)
+ lw $4, end # 0030 lui a0,hi(end)
+ # 0034 lw a0,lo(end)(a0)
+ ld $4, shared # 0038 ld a0,shared(gp)
+ ld $4, unshared # 003c lui a0,hi(unshared)
+ # 0040 ld a0,lo(unshared)(a0)
+ ld $4, end # 0044 lui a0,hi(end)
+ # 0048 ld a0,lo(end)(a0)
+ sw $4, shared # 004c sw a0,shared(gp)
+ sw $4, unshared # 0050 lui at,hi(unshared)
+ # 0054 sw a0,lo(unshared)(at)
+ sd $4, shared # 0058 sd a0,shared(gp)
+ sd $4, unshared # 005c lui at,hi(unshared)
+ # 0060 sd a0,lo(unshared)(at)
+ ulh $4, unshared # 0064 lui at,hi(unshared)
+ # 0068 daddiu at,at,lo(unshared)
+ # 006c lb a0,0(at)
+ # 0070 lbu at,1(at)
+ # 0074 sll a0,a0,8
+ # 0078 or a0,a0,at
+ ush $4, unshared # 007c lui at,hi(unshared)
+ # 0080 daddiu at,at,lo(unshared)
+ # 0084 sb a0,1(at)
+ # 0088 srl a0,a0,8
+ # 008c sb a0,0(at)
+ # 0090 lbu at,1(at)
+ # 0094 sll a0,a0,8
+ # 0098 or a0,a0,at
+ ulw $4, unshared # 009c lui at,hi(unshared)
+ # 00a0 daddiu at,at,lo(unshared)
+ # 00a4 lwl a0,0(at)
+ # 00a8 lwr a0,3(at)
+ usw $4, unshared # 00ac lui at,hi(unshared)
+ # 00b0 daddiu at,at,lo(unshared)
+ # 00b4 swl a0,0(at)
+ # 00b8 swr a0,3(at)
+ li.d $4, 1.0 # 00bc li a0,0xffc0
+ # 00c0 dsll32 a0,a0,14 # giving 0x3ff00000...
+ li.d $4, 1.9 # 00c4 lui at,hi(F1.9)
+ # 00c8 ld a0,lo(F1.9)(at)
+ li.d $f0, 1.0 # 00cc lui at,0x3ff0
+ # 00d0 mtc1 at,$f1
+ # 00d4 mtc1 zero,$f0
+ li.d $f0, 1.9 # 00d8 ldc1 $f0,L1.9(gp)
+ seq $4, $5, -100 # 00dc daddiu a0,a1,100
+ # 00e0 sltiu a0,a0,1
+ sne $4, $5, -100 # 00e4 daddiu a0,a1,100
+ # 00e8 sltu a0,zero,a0
+ dla $4, shared # 00ec daddiu a0,gp,shared
+ dla $4, unshared # 00f0 lui a0,hi(unshared)
+ # 00f4 daddiu a0,a0,lo(unshared)
+ uld $4, unshared # 00f8 lui at,hi(unshared)
+ # 00fc daddiu at,at,lo(unshared)
+ # 0100 ldl a0,0(at)
+ # 0104 ldr a0,7(at)
+ usd $4, unshared # 0108 lui at,hi(unshared)
+ # 010c daddiu at,at,lo(unshared)
+ # 0110 sdl a0,0(at)
+ # 0114 sdr a0,7(at)
+
+ bgt $4, 0x7fffffff, end # 0118 lui at,0x8000
+ # 011c slt at,a0,at
+ # 0120 beqz at,end
+ bgtu $4, 0xffffffff, end # 0124 li at,0x8000
+ # 0128 dsll at,at,17
+ # 012c sltu at,a0,at
+ # 0130 beqz at,end
+ ble $4, 0x7fffffff, end # 0134 lui at,0x8000
+ # 0138 slt at,a0,at
+ # 013c bnez at,end
+ bleu $4, 0xffffffff, end # 0140 li at,0x8000
+ # 0144 dsll at,at,17
+ # 0148 sltu at,a0,at
+ # 014c bnez at,end
+
+# Should produce warnings given -mfp32
+# add.d $f1, $f2, $f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp32.d Thu Jul 19 19:24:27 2001
@@ -0,0 +1,91 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -mfp32
+#name: MIPS -mgp64 -mfp32
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui a0,0x1234
+0+004 <[^>]*> ori a0,a0,0x5678
+0+008 <[^>]*> daddiu a0,gp,-16384
+0+00c <[^>]*> lui a0,0x0
+0+010 <[^>]*> daddiu a0,a0,0
+0+014 <[^>]*> lui a0,0x0
+0+018 <[^>]*> daddiu a0,a0,336
+0+01c <[^>]*> j 0+150 <[^>]*>
+0+020 <[^>]*> jal 0+150 <[^>]*>
+0+024 <[^>]*> lw a0,-16384\(gp\)
+0+028 <[^>]*> lui a0,0x0
+0+02c <[^>]*> lw a0,0\(a0\)
+0+030 <[^>]*> lui a0,0x0
+0+034 <[^>]*> lw a0,336\(a0\)
+0+038 <[^>]*> ld a0,-16384\(gp\)
+0+03c <[^>]*> lui a0,0x0
+0+040 <[^>]*> ld a0,0\(a0\)
+0+044 <[^>]*> lui a0,0x0
+0+048 <[^>]*> ld a0,336\(a0\)
+0+04c <[^>]*> sw a0,-16384\(gp\)
+0+050 <[^>]*> lui at,0x0
+0+054 <[^>]*> sw a0,0\(at\)
+0+058 <[^>]*> sd a0,-16384\(gp\)
+0+05c <[^>]*> lui at,0x0
+0+060 <[^>]*> sd a0,0\(at\)
+0+064 <[^>]*> lui at,0x0
+0+068 <[^>]*> daddiu at,at,0
+0+06c <[^>]*> lb a0,0\(at\)
+0+070 <[^>]*> lbu at,1\(at\)
+0+074 <[^>]*> sll a0,a0,0x8
+0+078 <[^>]*> or a0,a0,at
+0+07c <[^>]*> lui at,0x0
+0+080 <[^>]*> daddiu at,at,0
+0+084 <[^>]*> sb a0,1\(at\)
+0+088 <[^>]*> srl a0,a0,0x8
+0+08c <[^>]*> sb a0,0\(at\)
+0+090 <[^>]*> lbu at,1\(at\)
+0+094 <[^>]*> sll a0,a0,0x8
+0+098 <[^>]*> or a0,a0,at
+0+09c <[^>]*> lui at,0x0
+0+0a0 <[^>]*> daddiu at,at,0
+0+0a4 <[^>]*> lwl a0,0\(at\)
+0+0a8 <[^>]*> lwr a0,3\(at\)
+0+0ac <[^>]*> lui at,0x0
+0+0b0 <[^>]*> daddiu at,at,0
+0+0b4 <[^>]*> swl a0,0\(at\)
+0+0b8 <[^>]*> swr a0,3\(at\)
+0+0bc <[^>]*> li a0,0xffc0
+0+0c0 <[^>]*> dsll32 a0,a0,0xe
+0+0c4 <[^>]*> lui at,0x0
+0+0c8 <[^>]*> ld a0,0\(at\)
+0+0cc <[^>]*> lui at,0x3ff0
+0+0d0 <[^>]*> mtc1 at,\$f1
+0+0d4 <[^>]*> mtc1 zero,\$f0
+0+0d8 <[^>]*> ldc1 \$f0,-16384\(gp\)
+0+0dc <[^>]*> daddiu a0,a1,100
+0+0e0 <[^>]*> sltiu a0,a0,1
+0+0e4 <[^>]*> daddiu a0,a1,100
+0+0e8 <[^>]*> sltu a0,zero,a0
+0+0ec <[^>]*> daddiu a0,gp,-16384
+0+0f0 <[^>]*> lui a0,0x0
+0+0f4 <[^>]*> daddiu a0,a0,0
+0+0f8 <[^>]*> lui at,0x0
+0+0fc <[^>]*> daddiu at,at,0
+0+100 <[^>]*> ldl a0,0\(at\)
+0+104 <[^>]*> ldr a0,7\(at\)
+0+108 <[^>]*> lui at,0x0
+0+10c <[^>]*> daddiu at,at,0
+0+110 <[^>]*> sdl a0,0\(at\)
+0+114 <[^>]*> sdr a0,7\(at\)
+0+118 <[^>]*> lui at,0x8000
+0+11c <[^>]*> slt at,a0,at
+0+120 <[^>]*> beqz at,0+150 <[^>]*>
+0+124 <[^>]*> li at,0x8000
+0+128 <[^>]*> dsll at,at,0x11
+0+12c <[^>]*> sltu at,a0,at
+0+130 <[^>]*> beqz at,0+150 <[^>]*>
+0+134 <[^>]*> lui at,0x8000
+0+138 <[^>]*> slt at,a0,at
+0+13c <[^>]*> bnez at,0+150 <[^>]*>
+0+140 <[^>]*> li at,0x8000
+0+144 <[^>]*> dsll at,at,0x11
+0+148 <[^>]*> sltu at,a0,at
+0+14c <[^>]*> bnez at,0+150 <[^>]*>
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp64-pic.s Thu Jul 19 18:23:28 2001
@@ -0,0 +1,161 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+ .ent func
+func:
+ .set mips4
+ .set noreorder
+ .cpload $25 # 0000 lui gp,hi(_gp_disp)
+ # 0004 addiu gp,gp,lo(_gp_disp)
+ # 0008 addu gp,gp,t9
+ .set reorder
+ .cprestore 8 # 000c sd gp,8(sp)
+ .cpadd $4 # 0010 daddu a0,a0,gp
+ li $4, 0x12345678 # 0014 lui a0,0x1234
+ # 0018 ori a0,a0,0x5678
+ la $4, shared # 001c lw a0,got(.sdata)(gp)
+ # 0020 nop
+ # 0024 daddiu a0,a0,lo(shared)
+ la $4, unshared # 0028 lw a0,got(.data)(gp)
+ # 002c nop
+ # 0030 daddiu a0,a0,lo(unshared)
+ la $4, end # 0034 lw a0,got(.text)(gp)
+ # 0038 nop
+ # 003c daddiu a0,a0,lo(end)
+ j end # 0040 b end
+ # 0044 nop
+ jal end # 0048 ld t9,got(.text)(gp)
+ # 004c nop
+ # 0050 daddiu t9,t9,lo(end)
+ # 0054 jalr t9
+ # 0058 nop
+ # 005c ld gp,8(sp)
+ lw $4, shared # 0060 ld a0,got(.sdata)(gp)
+ # 0064 nop
+ # 0068 daddiu a0,a0,lo(shared)
+ # 006c lw a0,(a0)
+ lw $4, unshared # 0070 ld a0,got(.data)(gp)
+ # 0074 nop
+ # 0078 daddiu a0,a0,lo(unshared)
+ # 007c lw a0,(a0)
+ lw $4, end # 0080 ld a0,got(.text)(gp)
+ # 0084 nop
+ # 0088 daddiu a0,a0,lo(end)
+ # 008c lw a0,(a0)
+ ld $4, shared # 0090 ld a0,got(.sdata)(gp)
+ # 0094 nop
+ # 0098 daddiu a0,a0,lo(shared)
+ # 009c ld a0,(a0)
+ ld $4, unshared # 00a0 ld a0,got(.data)(gp)
+ # 00a4 nop
+ # 00a8 daddiu a0,a0,lo(unshared)
+ # 00ac ld a0,(a0)
+ ld $4, end # 00b0 ld a0,got(.text)(gp)
+ # 00b4 nop
+ # 00b8 daddiu a0,a0,lo(end)
+ # 00bc ld a0,(a0)
+ sw $4, shared # 00c0 ld at,got(.sdata)(gp)
+ # 00c4 nop
+ # 00c8 daddiu at,at,lo(shared)
+ # 00cc sw a0,0(at)
+ sw $4, unshared # 00d0 ld at,got(.data)(gp)
+ # 00d4 nop
+ # 00d8 daddiu at,at,lo(unshared)
+ # 00dc sw a0,0(at)
+ sd $4, shared # 00e0 ld at,got(.sdata)(gp)
+ # 00e4 nop
+ # 00e8 daddiu at,at,lo(shared)
+ # 00ec sd a0,(at)
+ sd $4, unshared # 00f0 ld at,got(.data)(gp)
+ # 00f4 nop
+ # 00f8 daddiu at,at,lo(unshared)
+ # 00fc sd a0,(at)
+ ulh $4, unshared # 0100 ld at,got(.data)(gp)
+ # 0104 nop
+ # 0108 daddiu at,at,lo(unshared)
+ # 010c lb a0,0(at)
+ # 0110 lbu at,1(at)
+ # 0114 sll a0,a0,8
+ # 0118 or a0,a0,at
+ ush $4, unshared # 011c ld at,got(.data)(gp)
+ # 0120 nop
+ # 0124 daddiu at,at,lo(unshared)
+ # 0128 sb a0,0(at)
+ # 012c srl a0,a0,8
+ # 0130 sb a0,1(at)
+ # 0134 lbu at,0(at)
+ # 0138 sll a0,a0,8
+ # 013c or a0,a0,at
+ ulw $4, unshared # 0140 ld at,got(.data)(gp)
+ # 0144 nop
+ # 0148 daddiu at,at,lo(unshared)
+ # 014c lwl a0,0(at)
+ # 0150 lwr a0,3(at)
+ usw $4, unshared # 0154 ld at,got(.data)(gp)
+ # 0158 nop
+ # 015c daddiu at,at,lo(unshared)
+ # 0160 swl a0,0(at)
+ # 0164 swr a0,3(at)
+ li.d $4, 1.0 # 0168 li a0,0xffc0
+ # 016c dsll32 a0,a0,14
+ li.d $4, 1.9 # 0170 ld at,got(.rodata)(gp)
+ # 0174 ld a0,lo(F1.9)(at)
+ li.d $f0, 1.0 # 0178 li at,0xffc0
+ # 017c dsll32 at,at,14
+ # 0180 dmtc1 at,$f0
+ li.d $f0, 1.9 # 0184 ld at,got(.rodata)(gp)
+ # 0188 ldc1 $f0,lo(L1.9)(at)
+ seq $4, $5, -100 # 018c daddiu a0,a1,100
+ # 0190 sltiu a0,a0,1
+ sne $4, $5, -100 # 0194 daddiu a0,a1,100
+ # 0198 sltu a0,zero,a0
+
+ dla $4, shared # 019c ld a0,got(.sdata)(gp)
+ # 01a0 nop
+ # 01a4 daddiu a0,a0,lo(shared)
+ dla $4, unshared # 01a8 ld a0,got(.data)(gp)
+ # 01ac nop
+ # 01b0 daddiu a0,a0,lo(unshared)
+ uld $4, unshared # 01b4 ld at,got(.data)(gp)
+ # 01b8 nop
+ # 01bc daddiu at,at,lo(unshared)
+ # 01c0 ldl a0,0(at)
+ # 01c4 ldr a0,7(at)
+ usd $4, unshared # 01c8 ld at,got(.data)(gp)
+ # 01cc nop
+ # 01d0 daddiu at,at,lo(unshared)
+ # 01d4 sdl a0,0(at)
+ # 01d8 sdr a0,7(at)
+
+ bgt $4, 0x7fffffff, end # 01dc lui at,0x8000
+ # 01e0 slt at,a0,at
+ # 01e4 beqz at,end
+ # 01e8 nop
+ bgtu $4, 0xffffffff, end # 01ec li at,0x8000
+ # 01f0 dsll at,at,17
+ # 01f4 sltu at,a0,at
+ # 01f8 beqz at,end
+ # 01fc nop
+ ble $4, 0x7fffffff, end # 0200 lui at,0x8000
+ # 0204 slt at,a0,at
+ # 0208 bnez at,end
+ # 020c nop
+ bleu $4, 0xffffffff, end # 0210 li at,0x8000
+ # 0214 dsll at,at,17
+ # 0218 sltu at,a0,at
+ # 021c bnez at,end
+ # 0220 nop
+
+ add.d $f1, $f2, $f3 # 0224 add.d $f1,$f2,$f3
+
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp64-pic.d Thu Jul 19 19:24:28 2001
@@ -0,0 +1,145 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000 -KPIC
+#name: MIPS -mgp64 -mfp64 (SVR4 PIC)
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui gp,0x0
+0+004 <[^>]*> addiu gp,gp,0
+0+008 <[^>]*> addu gp,gp,t9
+0+00c <[^>]*> sd gp,8\(sp\)
+0+010 <[^>]*> daddu a0,a0,gp
+0+014 <[^>]*> lui a0,0x1234
+0+018 <[^>]*> ori a0,a0,0x5678
+0+01c <[^>]*> lw a0,0\(gp\)
+0+020 <[^>]*> nop
+0+024 <[^>]*> daddiu a0,a0,0
+0+028 <[^>]*> lw a0,0\(gp\)
+0+02c <[^>]*> nop
+0+030 <[^>]*> daddiu a0,a0,0
+0+034 <[^>]*> lw a0,0\(gp\)
+0+038 <[^>]*> nop
+0+03c <[^>]*> daddiu a0,a0,552
+0+040 <[^>]*> b 0+228 <[^>]*>
+0+044 <[^>]*> nop
+0+048 <[^>]*> ld t9,0\(gp\)
+0+04c <[^>]*> nop
+0+050 <[^>]*> daddiu t9,t9,552
+0+054 <[^>]*> jalr t9
+0+058 <[^>]*> nop
+0+05c <[^>]*> ld gp,8\(sp\)
+0+060 <[^>]*> ld a0,0\(gp\)
+0+064 <[^>]*> nop
+0+068 <[^>]*> daddiu a0,a0,0
+0+06c <[^>]*> lw a0,0\(a0\)
+0+070 <[^>]*> ld a0,0\(gp\)
+0+074 <[^>]*> nop
+0+078 <[^>]*> daddiu a0,a0,0
+0+07c <[^>]*> lw a0,0\(a0\)
+0+080 <[^>]*> ld a0,0\(gp\)
+0+084 <[^>]*> nop
+0+088 <[^>]*> daddiu a0,a0,552
+0+08c <[^>]*> lw a0,0\(a0\)
+0+090 <[^>]*> ld a0,0\(gp\)
+0+094 <[^>]*> nop
+0+098 <[^>]*> daddiu a0,a0,0
+0+09c <[^>]*> ld a0,0\(a0\)
+0+0a0 <[^>]*> ld a0,0\(gp\)
+0+0a4 <[^>]*> nop
+0+0a8 <[^>]*> daddiu a0,a0,0
+0+0ac <[^>]*> ld a0,0\(a0\)
+0+0b0 <[^>]*> ld a0,0\(gp\)
+0+0b4 <[^>]*> nop
+0+0b8 <[^>]*> daddiu a0,a0,552
+0+0bc <[^>]*> ld a0,0\(a0\)
+0+0c0 <[^>]*> ld at,0\(gp\)
+0+0c4 <[^>]*> nop
+0+0c8 <[^>]*> daddiu at,at,0
+0+0cc <[^>]*> sw a0,0\(at\)
+0+0d0 <[^>]*> ld at,0\(gp\)
+0+0d4 <[^>]*> nop
+0+0d8 <[^>]*> daddiu at,at,0
+0+0dc <[^>]*> sw a0,0\(at\)
+0+0e0 <[^>]*> ld at,0\(gp\)
+0+0e4 <[^>]*> nop
+0+0e8 <[^>]*> daddiu at,at,0
+0+0ec <[^>]*> sd a0,0\(at\)
+0+0f0 <[^>]*> ld at,0\(gp\)
+0+0f4 <[^>]*> nop
+0+0f8 <[^>]*> daddiu at,at,0
+0+0fc <[^>]*> sd a0,0\(at\)
+0+100 <[^>]*> ld at,0\(gp\)
+0+104 <[^>]*> nop
+0+108 <[^>]*> daddiu at,at,0
+0+10c <[^>]*> lb a0,0\(at\)
+0+110 <[^>]*> lbu at,1\(at\)
+0+114 <[^>]*> sll a0,a0,0x8
+0+118 <[^>]*> or a0,a0,at
+0+11c <[^>]*> ld at,0\(gp\)
+0+120 <[^>]*> nop
+0+124 <[^>]*> daddiu at,at,0
+0+128 <[^>]*> sb a0,1\(at\)
+0+12c <[^>]*> srl a0,a0,0x8
+0+130 <[^>]*> sb a0,0\(at\)
+0+134 <[^>]*> lbu at,1\(at\)
+0+138 <[^>]*> sll a0,a0,0x8
+0+13c <[^>]*> or a0,a0,at
+0+140 <[^>]*> ld at,0\(gp\)
+0+144 <[^>]*> nop
+0+148 <[^>]*> daddiu at,at,0
+0+14c <[^>]*> lwl a0,0\(at\)
+0+150 <[^>]*> lwr a0,3\(at\)
+0+154 <[^>]*> ld at,0\(gp\)
+0+158 <[^>]*> nop
+0+15c <[^>]*> daddiu at,at,0
+0+160 <[^>]*> swl a0,0\(at\)
+0+164 <[^>]*> swr a0,3\(at\)
+0+168 <[^>]*> li a0,0xffc0
+0+16c <[^>]*> dsll32 a0,a0,0xe
+0+170 <[^>]*> ld at,0\(gp\)
+0+174 <[^>]*> ld a0,0\(at\)
+0+178 <[^>]*> li at,0xffc0
+0+17c <[^>]*> dsll32 at,at,0xe
+0+180 <[^>]*> dmtc1 at,\$f0
+0+184 <[^>]*> ld at,0\(gp\)
+0+188 <[^>]*> ldc1 \$f0,8\(at\)
+0+18c <[^>]*> daddiu a0,a1,100
+0+190 <[^>]*> sltiu a0,a0,1
+0+194 <[^>]*> daddiu a0,a1,100
+0+198 <[^>]*> sltu a0,zero,a0
+0+19c <[^>]*> ld a0,0\(gp\)
+0+1a0 <[^>]*> nop
+0+1a4 <[^>]*> daddiu a0,a0,0
+0+1a8 <[^>]*> ld a0,0\(gp\)
+0+1ac <[^>]*> nop
+0+1b0 <[^>]*> daddiu a0,a0,0
+0+1b4 <[^>]*> ld at,0\(gp\)
+0+1b8 <[^>]*> nop
+0+1bc <[^>]*> daddiu at,at,0
+0+1c0 <[^>]*> ldl a0,0\(at\)
+0+1c4 <[^>]*> ldr a0,7\(at\)
+0+1c8 <[^>]*> ld at,0\(gp\)
+0+1cc <[^>]*> nop
+0+1d0 <[^>]*> daddiu at,at,0
+0+1d4 <[^>]*> sdl a0,0\(at\)
+0+1d8 <[^>]*> sdr a0,7\(at\)
+0+1dc <[^>]*> lui at,0x8000
+0+1e0 <[^>]*> slt at,a0,at
+0+1e4 <[^>]*> beqz at,0+228 <[^>]*>
+0+1e8 <[^>]*> nop
+0+1ec <[^>]*> li at,0x8000
+0+1f0 <[^>]*> dsll at,at,0x11
+0+1f4 <[^>]*> sltu at,a0,at
+0+1f8 <[^>]*> beqz at,0+228 <[^>]*>
+0+1fc <[^>]*> nop
+0+200 <[^>]*> lui at,0x8000
+0+204 <[^>]*> slt at,a0,at
+0+208 <[^>]*> bnez at,0+228 <[^>]*>
+0+20c <[^>]*> nop
+0+210 <[^>]*> li at,0x8000
+0+214 <[^>]*> dsll at,at,0x11
+0+218 <[^>]*> sltu at,a0,at
+0+21c <[^>]*> bnez at,0+228 <[^>]*>
+0+220 <[^>]*> nop
+0+224 <[^>]*> add.d \$f1,\$f2,\$f3
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp64.s Thu Jul 19 19:24:18 2001
@@ -0,0 +1,104 @@
+
+ .sdata
+shared: .4byte 11
+
+ .data
+ .size unshared,16
+unshared:
+ .4byte 1
+ .4byte 2
+ .4byte 3
+ .4byte 4
+
+ .text
+func:
+ .set noreorder
+ .set mips4
+ li $4, 0x12345678 # 0000 lui a0,0x1234
+ # 0004 ori a0,a0,0x5678
+ la $4, shared # 0008 daddiu a0,gp,shared
+ la $4, unshared # 000c lui a0,hi(unshared)
+ # 0010 daddiu a0,a0,lo(unshared)
+ la $4, end # 0014 lui a0,hi(end)
+ # 0018 daddiu a0,a0,lo(end)
+ j end # 001c j end
+ jal end # 0020 jal end
+ lw $4, shared # 0024 lw a0,shared(gp)
+ lw $4, unshared # 0028 lui a0,hi(unshared)
+ # 002c lw a0,lo(unshared)(a0)
+ lw $4, end # 0030 lui a0,hi(end)
+ # 0034 lw a0,lo(end)(a0)
+ ld $4, shared # 0038 ld a0,shared(gp)
+ ld $4, unshared # 003c lui a0,hi(unshared)
+ # 0040 ld a0,lo(unshared)(a0)
+ ld $4, end # 0044 lui a0,hi(end)
+ # 0048 ld a0,lo(end)(a0)
+ sw $4, shared # 004c sw a0,shared(gp)
+ sw $4, unshared # 0050 lui at,hi(unshared)
+ # 0054 sw a0,lo(unshared)(at)
+ sd $4, shared # 0058 sd a0,shared(gp)
+ sd $4, unshared # 005c lui at,hi(unshared)
+ # 0060 sd a0,lo(unshared)(at)
+ ulh $4, unshared # 0064 lui at,hi(unshared)
+ # 0068 daddiu at,at,lo(unshared)
+ # 006c lb a0,0(at)
+ # 0070 lbu at,1(at)
+ # 0074 sll a0,a0,8
+ # 0078 or a0,a0,at
+ ush $4, unshared # 007c lui at,hi(unshared)
+ # 0080 daddiu at,at,lo(unshared)
+ # 0084 sb a0,1(at)
+ # 0088 srl a0,a0,8
+ # 008c sb a0,0(at)
+ # 0090 lbu at,1(at)
+ # 0094 sll a0,a0,8
+ # 0098 or a0,a0,at
+ ulw $4, unshared # 009c lui at,hi(unshared)
+ # 00a0 daddiu at,at,lo(unshared)
+ # 00a4 lwl a0,0(at)
+ # 00a8 lwr a0,3(at)
+ usw $4, unshared # 00ac lui at,hi(unshared)
+ # 00b0 daddiu at,at,lo(unshared)
+ # 00b4 swl a0,0(at)
+ # 00b8 swr a0,3(at)
+ li.d $4, 1.0 # 00bc li a0,0xffc0
+ # 00c0 dsll32 a0,a0,14 # giving 0x3ff00000...
+ li.d $4, 1.9 # 00c4 lui at,hi(F1.9)
+ # 00c8 ld a0,lo(F1.9)(at)
+ li.d $f0, 1.0 # 00cc li at,0xffc0
+ # 00d0 dsll32 at,at,14
+ # 00d4 dmtc1 at,$f0
+ li.d $f0, 1.9 # 00d8 ldc1 $f0,L1.9(gp)
+ seq $4, $5, -100 # 00dc daddiu a0,a1,100
+ # 00e0 sltiu a0,a0,1
+ sne $4, $5, -100 # 00e4 daddiu a0,a1,100
+ # 00e8 sltu a0,zero,a0
+ dla $4, shared # 00ec daddiu a0,gp,shared
+ dla $4, unshared # 00f0 lui a0,hi(unshared)
+ # 00f4 daddiu a0,a0,lo(unshared)
+ uld $4, unshared # 00f8 lui at,hi(unshared)
+ # 00fc daddiu at,at,lo(unshared)
+ # 0100 ldl a0,0(at)
+ # 0104 ldr a0,7(at)
+ usd $4, unshared # 0108 lui at,hi(unshared)
+ # 010c daddiu at,at,lo(unshared)
+ # 0110 sdl a0,0(at)
+ # 0114 sdr a0,7(at)
+
+ bgt $4, 0x7fffffff, end # 0118 lui at,0x8000
+ # 011c slt at,a0,at
+ # 0120 beqz at,end
+ bgtu $4, 0xffffffff, end # 0124 li at,0x8000
+ # 0128 dsll at,at,17
+ # 012c sltu at,a0,at
+ # 0130 beqz at,end
+ ble $4, 0x7fffffff, end # 0134 lui at,0x8000
+ # 0138 slt at,a0,at
+ # 013c bnez at,end
+ bleu $4, 0xffffffff, end # 0140 li at,0x8000
+ # 0144 dsll at,at,17
+ # 0148 sltu at,a0,at
+ # 014c bnez at,end
+
+ add.d $f1, $f2, $f3 # 0150 add.d $f1,$f2,$f3
+end:
--- /dev/null Tue Nov 14 21:44:43 2000
+++ mips-gp64-fp64.d Thu Jul 19 19:24:27 2001
@@ -0,0 +1,92 @@
+#objdump: --prefix-addresses -d -mmips:8000
+#as: -march=8000
+#name: MIPS -mgp64 -mfp64
+
+.*: +file format.*
+
+Disassembly of section .text:
+0+000 <[^>]*> lui a0,0x1234
+0+004 <[^>]*> ori a0,a0,0x5678
+0+008 <[^>]*> daddiu a0,gp,-16384
+0+00c <[^>]*> lui a0,0x0
+0+010 <[^>]*> daddiu a0,a0,0
+0+014 <[^>]*> lui a0,0x0
+0+018 <[^>]*> daddiu a0,a0,340
+0+01c <[^>]*> j 0+154 <[^>]*>
+0+020 <[^>]*> jal 0+154 <[^>]*>
+0+024 <[^>]*> lw a0,-16384\(gp\)
+0+028 <[^>]*> lui a0,0x0
+0+02c <[^>]*> lw a0,0\(a0\)
+0+030 <[^>]*> lui a0,0x0
+0+034 <[^>]*> lw a0,340\(a0\)
+0+038 <[^>]*> ld a0,-16384\(gp\)
+0+03c <[^>]*> lui a0,0x0
+0+040 <[^>]*> ld a0,0\(a0\)
+0+044 <[^>]*> lui a0,0x0
+0+048 <[^>]*> ld a0,340\(a0\)
+0+04c <[^>]*> sw a0,-16384\(gp\)
+0+050 <[^>]*> lui at,0x0
+0+054 <[^>]*> sw a0,0\(at\)
+0+058 <[^>]*> sd a0,-16384\(gp\)
+0+05c <[^>]*> lui at,0x0
+0+060 <[^>]*> sd a0,0\(at\)
+0+064 <[^>]*> lui at,0x0
+0+068 <[^>]*> daddiu at,at,0
+0+06c <[^>]*> lb a0,0\(at\)
+0+070 <[^>]*> lbu at,1\(at\)
+0+074 <[^>]*> sll a0,a0,0x8
+0+078 <[^>]*> or a0,a0,at
+0+07c <[^>]*> lui at,0x0
+0+080 <[^>]*> daddiu at,at,0
+0+084 <[^>]*> sb a0,1\(at\)
+0+088 <[^>]*> srl a0,a0,0x8
+0+08c <[^>]*> sb a0,0\(at\)
+0+090 <[^>]*> lbu at,1\(at\)
+0+094 <[^>]*> sll a0,a0,0x8
+0+098 <[^>]*> or a0,a0,at
+0+09c <[^>]*> lui at,0x0
+0+0a0 <[^>]*> daddiu at,at,0
+0+0a4 <[^>]*> lwl a0,0\(at\)
+0+0a8 <[^>]*> lwr a0,3\(at\)
+0+0ac <[^>]*> lui at,0x0
+0+0b0 <[^>]*> daddiu at,at,0
+0+0b4 <[^>]*> swl a0,0\(at\)
+0+0b8 <[^>]*> swr a0,3\(at\)
+0+0bc <[^>]*> li a0,0xffc0
+0+0c0 <[^>]*> dsll32 a0,a0,0xe
+0+0c4 <[^>]*> lui at,0x0
+0+0c8 <[^>]*> ld a0,0\(at\)
+0+0cc <[^>]*> li at,0xffc0
+0+0d0 <[^>]*> dsll32 at,at,0xe
+0+0d4 <[^>]*> dmtc1 at,\$f0
+0+0d8 <[^>]*> ldc1 \$f0,-16384\(gp\)
+0+0dc <[^>]*> daddiu a0,a1,100
+0+0e0 <[^>]*> sltiu a0,a0,1
+0+0e4 <[^>]*> daddiu a0,a1,100
+0+0e8 <[^>]*> sltu a0,zero,a0
+0+0ec <[^>]*> daddiu a0,gp,-16384
+0+0f0 <[^>]*> lui a0,0x0
+0+0f4 <[^>]*> daddiu a0,a0,0
+0+0f8 <[^>]*> lui at,0x0
+0+0fc <[^>]*> daddiu at,at,0
+0+100 <[^>]*> ldl a0,0\(at\)
+0+104 <[^>]*> ldr a0,7\(at\)
+0+108 <[^>]*> lui at,0x0
+0+10c <[^>]*> daddiu at,at,0
+0+110 <[^>]*> sdl a0,0\(at\)
+0+114 <[^>]*> sdr a0,7\(at\)
+0+118 <[^>]*> lui at,0x8000
+0+11c <[^>]*> slt at,a0,at
+0+120 <[^>]*> beqz at,0+154 <[^>]*>
+0+124 <[^>]*> li at,0x8000
+0+128 <[^>]*> dsll at,at,0x11
+0+12c <[^>]*> sltu at,a0,at
+0+130 <[^>]*> beqz at,0+154 <[^>]*>
+0+134 <[^>]*> lui at,0x8000
+0+138 <[^>]*> slt at,a0,at
+0+13c <[^>]*> bnez at,0+154 <[^>]*>
+0+140 <[^>]*> li at,0x8000
+0+144 <[^>]*> dsll at,at,0x11
+0+148 <[^>]*> sltu at,a0,at
+0+14c <[^>]*> bnez at,0+154 <[^>]*>
+0+150 <[^>]*> add.d \$f1,\$f2,\$f3