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XScale/armv5e mixups


Hi Nick

GAS seems to think that LDRD, STRD and PLD are some kind of sordid XScale 
extension.  But in fact they are perfectly wholesome V5E instructions, and 
deserve to be treated as such. :-)

Also, this sort of thing seems fairly unhealthy:

#ifndef CPU_DEFAULT
#if defined __XSCALE__
#define CPU_DEFAULT	(ARM_9 | ARM_ARCH_XSCALE)
#else
#if defined __thumb__
#define CPU_DEFAULT 	(ARM_7 | ARM_ARCH_V4T)
#else
#define CPU_DEFAULT 	ARM_ALL
#endif
#endif
#endif

The __XSCALE__ and __thumb__ macros tell you the properties of the host 
compiler; it's hard to imagine that this is going to be useful.  My 
inclination would just be to delete that whole block, make the default for 
GAS be ARM_ALL, and use GCC specs to pass in a more restrictive architecture 
when that seems appropriate.  What do you think?

p.

2001-10-26  Philip Blundell  <philb@gnu.org>

	* config/tc-arm.c (do_ldrd): Check for El Segundo, not XScale.
	Fix display of bad instructions.
	(insns): Move PLD under V5E.  Remove duplicated entries for LDR and STR.

Index: config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.99
diff -u -r1.99 tc-arm.c
--- tc-arm.c	2001/10/20 22:41:09	1.99
+++ tc-arm.c	2001/10/26 09:03:09
@@ -621,8 +621,6 @@
 static void do_mia		PARAMS ((char *, unsigned long));
 static void do_mar		PARAMS ((char *, unsigned long));
 static void do_mra		PARAMS ((char *, unsigned long));
-static void do_pld		PARAMS ((char *, unsigned long));
-static void do_ldrd		PARAMS ((char *, unsigned long));
 
 /* ARM_EXT_V5.  */
 static void do_blx		PARAMS ((char *, unsigned long));
@@ -641,6 +639,8 @@
 static void do_smul		PARAMS ((char *, unsigned long));
 static void do_qadd		PARAMS ((char *, unsigned long));
 static void do_co_reg2c		PARAMS ((char *, unsigned long));
+static void do_pld		PARAMS ((char *, unsigned long));
+static void do_ldrd		PARAMS ((char *, unsigned long));
 
 /* Coprocessor Instructions.  */
 static void do_cdp		PARAMS ((char *, unsigned long));
@@ -784,9 +784,6 @@
   {"miatt", 0x0e2f0010, NULL,   NULL,        ARM_EXT_XSCALE, do_mia},
   {"mar",   0x0c400000, NULL,   NULL,        ARM_EXT_XSCALE, do_mar},
   {"mra",   0x0c500000, NULL,   NULL,        ARM_EXT_XSCALE, do_mra},
-  {"pld",   0xf450f000, "",     NULL,        ARM_EXT_XSCALE, do_pld},
-  {"ldr",   0x000000d0, NULL,   ldr_flags,   ARM_ANY,        do_ldrd},
-  {"str",   0x000000f0, NULL,   str_flags,   ARM_ANY,        do_ldrd},
 
 /* ARM Instructions.  */
   {"and",   0x00000000, NULL,   s_flag,      ARM_ANY,      do_arit},
@@ -805,8 +802,8 @@
   {"cmn",   0x01600000, NULL,   cmp_flags,   ARM_ANY,      do_cmp},
   {"mov",   0x01a00000, NULL,   s_flag,      ARM_ANY,      do_mov},
   {"mvn",   0x01e00000, NULL,   s_flag,      ARM_ANY,      do_mov},
-  {"str",   0x04000000, NULL,   str_flags,   ARM_ANY,      do_ldst},
-  {"ldr",   0x04100000, NULL,   ldr_flags,   ARM_ANY,      do_ldst},
+  {"str",   0x04000000, NULL,   str_flags,   ARM_ANY,      do_ldrd},
+  {"ldr",   0x04100000, NULL,   ldr_flags,   ARM_ANY,      do_ldrd},
   {"stm",   0x08000000, NULL,   stm_flags,   ARM_ANY,      do_ldmstm},
   {"ldm",   0x08100000, NULL,   ldm_flags,   ARM_ANY,      do_ldmstm},
   {"swi",   0x0f000000, NULL,   NULL,        ARM_ANY,      do_swi},
@@ -942,6 +939,8 @@
   {"mcrr",  0x0c400000, NULL,   NULL,         ARM_EXT_V5E, do_co_reg2c},
   {"mrrc",  0x0c500000, NULL,   NULL,         ARM_EXT_V5E, do_co_reg2c},
 
+  {"pld",   0xf450f000, "",     NULL,         ARM_EXT_V5E, do_pld},
+
   /* Cirrus DSP instructions.  */
   {"cfldrs",	0x0c100400,	NULL,	NULL,	ARM_EXT_MAVERICK, do_c_ldst_1},
   {"cfldrd",	0x0c500400,	NULL,	NULL,	ARM_EXT_MAVERICK, do_c_ldst_2},
@@ -3558,7 +3557,7 @@
     end_of_line (str);
 }
 
-/* Xscale: Preload-Cache
+/* V5E: Preload-Cache
 
     PLD <addr_mode>
 
@@ -3646,7 +3645,7 @@
   end_of_line (str);
 }
 
-/* Xscale load-consecutive (argument parse)
+/* V5E load-consecutive (argument parse)
    Mode is like LDRH.
 
      LDRccD R, mode
@@ -3674,14 +3673,14 @@
       return;
     }
 
-  if ((cpu_variant & ARM_EXT_XSCALE) != ARM_EXT_XSCALE)
+  if ((cpu_variant & ARM_EXT_V5E) != ARM_EXT_V5E)
     {
       static char buff[128];
 
       --str;
       while (ISSPACE (*str))
 	--str;
-      str -= 4;
+      str -= 3;
 
       /* Deny all knowledge.  */
       sprintf (buff, _("bad instruction '%.100s'"), str);



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