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Re: PATCH: Fix the MIPS ISA ELF setting (Re: RedHat 7.1/mips update)
On Fri, Nov 02, 2001 at 05:06:48PM -0800, Eric M. Christopher wrote:
>
> > I thought 4100 implemented MIPS 3 ISA plus a few and MIPS 3 ISA was a super
> > set of MIPS 2 ISA. The main issue is 32bit vs. 64bit. The instructions in
> > MIPS 2 ISA are 32bit. But MIPS 3 ISA is 64bit. I guess the real quetion is
> > how to generate the 32bit vr4100 binary with the proper setting in the ELF
> > header without modifying the source code. I guess "-mgp32 -mfp32" may
> > work. But Jim has to try it.
>
> Right, but the problem lies when it isn't just "plus a few", it's "plus
> a few, minus a few" and then you don't get chips that are anything
> resembling "standard" ISAs.
Well, we don't have solution for this one anyway. When you do
# as -march=4100
it will accept 4100, which is defined as MIPS 3. That means it will
take any MIPS 3 instructions. My proposal
# as -march=4100 -mipsN
allows you change the `isa' field in `struct mips_cpu_info' to a
compatible value at the runtime. It won't accept more instructions
than
# as -march=4100
I don't see anything wrong with that.
H.J.