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[patch RFA] some new MIPS ELF embedded-pic tests.
- From: cgd at broadcom dot com
- To: binutils at sources dot redhat dot com
- Date: 27 Dec 2001 15:19:02 -0800
- Subject: [patch RFA] some new MIPS ELF embedded-pic tests.
Hey folks,
Below are some new MIPS embedded-pic tests, which test the assembler's
generation of, and the linker's handling of, MIPS ELF embedded-pic
R_MIPS_GNU_REL_HI16 / R_MIPS_GNU_REL_LO16 pairs.
We ran into some more corner cases where the assembler and linker get
these wrong, and these tests shed some light on those cases (as well
as provide some more general testing).
A previous attempt to make the HI16 halves of these relocs work was in
http://sources.redhat.com/ml/binutils/2001-10/msg00548.html, but it
wasn't either completely correct _or_ complete. ("it was better than
what was there previously for all but 4 or 8 or 65536 offsets!" 8-)
I now have a patch which does The Right Thing (as far as I can tell),
but I'd like to give it a bit more testing locally before I submit it.
Anyway, now the description of what's expected to be in the
relocations. When you say (for instance):
sym2:
...
la reg, (sym1-sym2)
that gets converted to:
lui reg, pcrel_hi_part(sym1-sym2)
addiu reg, reg, pcrel_lo_part(sym1-sym2)
sym1 - sym2
-> sym1 - sym2 + ._of_LO_part - ._of_LO_part
-> sym1 - ._of_LO_PART + (._of_LO_part - sym2)
(._of_LO_part - sym2) is a constant and is placed into the HI/LO
relocations in the normal way. If sym1 is a symbol in the same
section as the relocations, the relocation is converted to be relative
to the section, and the offset of the symbol into the section (sym1 -
start of section) is added into the HI/LO values.
The interesting thing is that it's not just address of the particular
relocation (as it is with the rest of the MIPS ELF relocations,
AFAICT), it's address _of the low part_, since the whole relocation is
relative to the low part.
That latter point chokes up both the assembler and the linker. 8-)
Of the new tests below, all 3 of the assembler tests and two (of 10)
of the linker tests fail. (I figured it would be good to provide more
than just failing tests for the linker, though, since there's
basically _no_ coverage there right now.)
chris
===
[gas/testsuite/ChangeLog]
2001-12-27 Chris Demetriou <cgd@broadcom.com>
* gas/mips/empic3_e.d: New file to test -membedded-pic
R_MIPS_GNU_REL_HI16 and R_MIPS_GNU_REL_LO16 relocations.
* gas/mips/empic3_e.s: Likewise.
* gas/mips/empic3_g1.d: Likewise.
* gas/mips/empic3_g1.s: Likewise.
* gas/mips/empic3_g2.d: Likewise.
* gas/mips/empic3_g2.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
[ld/testsuite/ChangeLog]
2001-12-27 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/empic1-ln.d: New file to test basic linking of
R_MIPS_GNU_REL_HI16 and R_MIPS_GNU_REL_LO16 relocations.
* ld-mips-elf/empic1-lp.d: Likewise.
* ld-mips-elf/empic1-mn.d: Likewise.
* ld-mips-elf/empic1-mp.d: Likewise.
* ld-mips-elf/empic1-sn.d: Likewise.
* ld-mips-elf/empic1-sp.d: Likewise.
* ld-mips-elf/empic1-ref.s: Likewise.
* ld-mips-elf/empic1-space.s: Likewise.
* ld-mips-elf/empic1-tgt.s: Likewise.
* ld-mips-elf/empic2-fwd-0.d: New file to test
R_MIPS_GNU_REL_HI16 and R_MIPS_GNU_REL_LO16 relocation edge
cases.
* ld-mips-elf/empic2-fwd-1.d: Likewise.
* ld-mips-elf/empic2-rev-0.d: Likewise.
* ld-mips-elf/empic2-rev-1.d: Likewise.
* ld-mips-elf/empic2-ref.s: Likewise.
* ld-mips-elf/empic2-space.s: Likewise.
* ld-mips-elf/empic2-fwd-tgt.s: Likewise.
* ld-mips-elf/empic2-rev-tgt.s: Likewise.
* ld-mips-elf/mips-elf.exp: New file to run MIPS 32-bit ELF
tests (including those above).
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_e.d src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_e.d
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_e.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_e.d Wed Dec 26 16:51:09 2001
@@ -0,0 +1,47 @@
+#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000
+#name: MIPS empic3 (external)
+#as: -membedded-pic -mips3
+
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+.*: +file format elf.*mips.*
+
+Disassembly of section .text:
+ ...
+ ...
+0000fffc <[^>]*> 3c020001 lui v0,0x1
+[ ]*fffc: R_MIPS_GNU_REL_HI16 ext
+00010000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*10000: R_MIPS_GNU_REL_LO16 ext
+ ...
+00017ffc <[^>]*> 3c020001 lui v0,0x1
+[ ]*17ffc: R_MIPS_GNU_REL_HI16 ext
+00018000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*18000: R_MIPS_GNU_REL_LO16 ext
+ ...
+0001fffc <[^>]*> 3c020002 lui v0,0x2
+[ ]*1fffc: R_MIPS_GNU_REL_HI16 ext
+00020000 <[^>]*> 0043102d daddu v0,v0,v1
+00020004 <[^>]*> 64428004 daddiu v0,v0,-32764
+[ ]*20004: R_MIPS_GNU_REL_LO16 ext
+ ...
+00027ffc <[^>]*> 3c020002 lui v0,0x2
+[ ]*27ffc: R_MIPS_GNU_REL_HI16 ext
+00028000 <[^>]*> 0043102d daddu v0,v0,v1
+00028004 <[^>]*> 64420004 daddiu v0,v0,4
+[ ]*28004: R_MIPS_GNU_REL_LO16 ext
+ ...
+0002fff8 <[^>]*> 3c020003 lui v0,0x3
+[ ]*2fff8: R_MIPS_GNU_REL_HI16 ext
+0002fffc <[^>]*> 0043102d daddu v0,v0,v1
+00030000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*30000: R_MIPS_GNU_REL_LO16 ext
+ ...
+00037ff8 <[^>]*> 3c020003 lui v0,0x3
+[ ]*37ff8: R_MIPS_GNU_REL_HI16 ext
+00037ffc <[^>]*> 0043102d daddu v0,v0,v1
+00038000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*38000: R_MIPS_GNU_REL_LO16 ext
+ ...
+ ...
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_e.s src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_e.s
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_e.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_e.s Wed Dec 26 16:51:33 2001
@@ -0,0 +1,46 @@
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+ .text
+ .set noreorder
+
+ SYM_TO_TEST = ext
+
+ .globl ext
+
+ .org 0x00000
+ .globl g1
+g1:
+l1:
+
+ .org 0x08000
+ .globl fn
+ .ent fn
+fn:
+ .org (0x10000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x18000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x20000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x28000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x30000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x38000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .end fn
+
+ .org 0x40000
+ .globl g2
+g2:
+l2:
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 8
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g1.d src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g1.d
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g1.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g1.d Wed Dec 26 16:50:09 2001
@@ -0,0 +1,47 @@
+#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000
+#name: MIPS empic3 (global, negative)
+#as: -membedded-pic -mips3
+
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+.*: +file format elf.*mips.*
+
+Disassembly of section .text:
+ ...
+ ...
+0000fffc <[^>]*> 3c020001 lui v0,0x1
+[ ]*fffc: R_MIPS_GNU_REL_HI16 .text
+00010000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*10000: R_MIPS_GNU_REL_LO16 .text
+ ...
+00017ffc <[^>]*> 3c020001 lui v0,0x1
+[ ]*17ffc: R_MIPS_GNU_REL_HI16 .text
+00018000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*18000: R_MIPS_GNU_REL_LO16 .text
+ ...
+0001fffc <[^>]*> 3c020002 lui v0,0x2
+[ ]*1fffc: R_MIPS_GNU_REL_HI16 .text
+00020000 <[^>]*> 0043102d daddu v0,v0,v1
+00020004 <[^>]*> 64428004 daddiu v0,v0,-32764
+[ ]*20004: R_MIPS_GNU_REL_LO16 .text
+ ...
+00027ffc <[^>]*> 3c020002 lui v0,0x2
+[ ]*27ffc: R_MIPS_GNU_REL_HI16 .text
+00028000 <[^>]*> 0043102d daddu v0,v0,v1
+00028004 <[^>]*> 64420004 daddiu v0,v0,4
+[ ]*28004: R_MIPS_GNU_REL_LO16 .text
+ ...
+0002fff8 <[^>]*> 3c020003 lui v0,0x3
+[ ]*2fff8: R_MIPS_GNU_REL_HI16 .text
+0002fffc <[^>]*> 0043102d daddu v0,v0,v1
+00030000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*30000: R_MIPS_GNU_REL_LO16 .text
+ ...
+00037ff8 <[^>]*> 3c020003 lui v0,0x3
+[ ]*37ff8: R_MIPS_GNU_REL_HI16 .text
+00037ffc <[^>]*> 0043102d daddu v0,v0,v1
+00038000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*38000: R_MIPS_GNU_REL_LO16 .text
+ ...
+ ...
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g1.s src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g1.s
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g1.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g1.s Wed Dec 26 16:52:07 2001
@@ -0,0 +1,46 @@
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+ .text
+ .set noreorder
+
+ SYM_TO_TEST = g1
+
+ .globl ext
+
+ .org 0x00000
+ .globl g1
+g1:
+l1:
+
+ .org 0x08000
+ .globl fn
+ .ent fn
+fn:
+ .org (0x10000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x18000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x20000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x28000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x30000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x38000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .end fn
+
+ .org 0x40000
+ .globl g2
+g2:
+l2:
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 8
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g2.d src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g2.d
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g2.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g2.d Wed Dec 26 23:19:03 2001
@@ -0,0 +1,47 @@
+#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000
+#name: MIPS empic3 (global, positive)
+#as: -membedded-pic -mips3
+
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+.*: +file format elf.*mips.*
+
+Disassembly of section .text:
+ ...
+ ...
+0000fffc <[^>]*> 3c020005 lui v0,0x5
+[ ]*fffc: R_MIPS_GNU_REL_HI16 .text
+00010000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*10000: R_MIPS_GNU_REL_LO16 .text
+ ...
+00017ffc <[^>]*> 3c020005 lui v0,0x5
+[ ]*17ffc: R_MIPS_GNU_REL_HI16 .text
+00018000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*18000: R_MIPS_GNU_REL_LO16 .text
+ ...
+0001fffc <[^>]*> 3c020006 lui v0,0x6
+[ ]*1fffc: R_MIPS_GNU_REL_HI16 .text
+00020000 <[^>]*> 0043102d daddu v0,v0,v1
+00020004 <[^>]*> 64428004 daddiu v0,v0,-32764
+[ ]*20004: R_MIPS_GNU_REL_LO16 .text
+ ...
+00027ffc <[^>]*> 3c020006 lui v0,0x6
+[ ]*27ffc: R_MIPS_GNU_REL_HI16 .text
+00028000 <[^>]*> 0043102d daddu v0,v0,v1
+00028004 <[^>]*> 64420004 daddiu v0,v0,4
+[ ]*28004: R_MIPS_GNU_REL_LO16 .text
+ ...
+0002fff8 <[^>]*> 3c020007 lui v0,0x7
+[ ]*2fff8: R_MIPS_GNU_REL_HI16 .text
+0002fffc <[^>]*> 0043102d daddu v0,v0,v1
+00030000 <[^>]*> 64428000 daddiu v0,v0,-32768
+[ ]*30000: R_MIPS_GNU_REL_LO16 .text
+ ...
+00037ff8 <[^>]*> 3c020007 lui v0,0x7
+[ ]*37ff8: R_MIPS_GNU_REL_HI16 .text
+00037ffc <[^>]*> 0043102d daddu v0,v0,v1
+00038000 <[^>]*> 64420000 daddiu v0,v0,0
+[ ]*38000: R_MIPS_GNU_REL_LO16 .text
+ ...
+ ...
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g2.s src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g2.s
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/empic3_g2.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/empic3_g2.s Wed Dec 26 16:52:17 2001
@@ -0,0 +1,46 @@
+# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and
+# LO are split over a 32K boundary.
+
+ .text
+ .set noreorder
+
+ SYM_TO_TEST = g2
+
+ .globl ext
+
+ .org 0x00000
+ .globl g1
+g1:
+l1:
+
+ .org 0x08000
+ .globl fn
+ .ent fn
+fn:
+ .org (0x10000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x18000 - 4)
+ la $2, SYM_TO_TEST - fn # expands to 2 instructions
+
+ .org (0x20000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x28000 - 4)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x30000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .org (0x38000 - 8)
+ la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions
+
+ .end fn
+
+ .org 0x40000
+ .globl g2
+g2:
+l2:
+
+# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 8
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/mips.exp src.empic-pcrel-tests-only/gas/testsuite/gas/mips/mips.exp
--- src.empic-pcrel-almost-clean/gas/testsuite/gas/mips/mips.exp Fri Nov 16 18:59:06 2001
+++ src.empic-pcrel-tests-only/gas/testsuite/gas/mips/mips.exp Wed Dec 26 16:53:28 2001
@@ -163,6 +163,9 @@ if { [istarget mips*-*-*] } then {
run_dump_test "elf-rel5"
run_dump_test "${tmips}${el}empic"
run_dump_test "empic2"
+ run_dump_test "empic3_e"
+ run_dump_test "empic3_g1"
+ run_dump_test "empic3_g2"
if { !$no_mips16 } {
run_dump_test "${tmips}mips${el}16-e"
run_dump_test "${tmips}mips${el}16-f"
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-ln.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-ln.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-ln.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-ln.d Wed Dec 26 23:14:44 2001
@@ -0,0 +1,27 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-ln (large negative)
+#as: -membedded-pic -mips3
+#source: empic1-tgt.s
+#source: empic1-space.s
+#source: empic1-space.s
+#source: empic1-ref.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+410020 g F .text [0-9a-f]+ foo
+#...
+0+400000 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+ ...
+ ...
+ ...
+0+410020 <[^>]*> 00000000 nop
+0+410024 <[^>]*> 3c02ffff lui v0,0xffff
+0+410028 <[^>]*> 6442ffe0 daddiu v0,v0,-32
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-lp.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-lp.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-lp.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-lp.d Wed Dec 26 23:13:35 2001
@@ -0,0 +1,26 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-lp (large positive)
+#as: -membedded-pic -mips3
+#source: empic1-ref.s
+#source: empic1-space.s
+#source: empic1-space.s
+#source: empic1-tgt.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+400000 g F .text [0-9a-f]+ foo
+#...
+0+410020 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+0+400000 <[^>]*> 00000000 nop
+0+400004 <[^>]*> 3c020001 lui v0,0x1
+0+400008 <[^>]*> 64420020 daddiu v0,v0,32
+ ...
+ ...
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-mn.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-mn.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-mn.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-mn.d Wed Dec 26 23:13:39 2001
@@ -0,0 +1,25 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-mn (medium negative)
+#as: -membedded-pic -mips3
+#source: empic1-tgt.s
+#source: empic1-space.s
+#source: empic1-ref.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+408020 g F .text [0-9a-f]+ foo
+#...
+0+400000 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+ ...
+ ...
+0+408020 <[^>]*> 00000000 nop
+0+408024 <[^>]*> 3c02ffff lui v0,0xffff
+0+408028 <[^>]*> 64427fe0 daddiu v0,v0,32736
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-mp.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-mp.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-mp.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-mp.d Wed Dec 26 23:13:45 2001
@@ -0,0 +1,25 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-mp (medium positive)
+#as: -membedded-pic -mips3
+#source: empic1-ref.s
+#source: empic1-space.s
+#source: empic1-tgt.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+400000 g F .text [0-9a-f]+ foo
+#...
+0+408020 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+0+400000 <[^>]*> 00000000 nop
+0+400004 <[^>]*> 3c020001 lui v0,0x1
+0+400008 <[^>]*> 64428020 daddiu v0,v0,-32736
+ ...
+ ...
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-ref.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-ref.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-ref.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-ref.s Wed Dec 26 17:26:33 2001
@@ -0,0 +1,9 @@
+
+ .globl foo
+ .ent foo
+foo:
+ nop
+ la $2, bar - foo
+ .end foo
+
+ .p2align 5
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-sn.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-sn.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-sn.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-sn.d Wed Dec 26 23:13:51 2001
@@ -0,0 +1,23 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-sn (small negative)
+#as: -membedded-pic -mips3
+#source: empic1-tgt.s
+#source: empic1-ref.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+400020 g F .text [0-9a-f]+ foo
+#...
+0+400000 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+ ...
+0+400020 <[^>]*> 00000000 nop
+0+400024 <[^>]*> 3c020000 lui v0,0x0
+0+400028 <[^>]*> 6442ffe0 daddiu v0,v0,-32
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-sp.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-sp.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-sp.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-sp.d Wed Dec 26 23:13:54 2001
@@ -0,0 +1,23 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #1-sp (small positive)
+#as: -membedded-pic -mips3
+#source: empic1-ref.s
+#source: empic1-tgt.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+SYMBOL TABLE:
+#...
+0+400000 g F .text [0-9a-f]+ foo
+#...
+0+400020 g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+0+400000 <[^>]*> 00000000 nop
+0+400004 <[^>]*> 3c020000 lui v0,0x0
+0+400008 <[^>]*> 64420020 daddiu v0,v0,32
+ ...
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-space.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-space.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-space.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-space.s Wed Dec 26 21:34:25 2001
@@ -0,0 +1,5 @@
+
+ .ent space
+space:
+ .space (32 * 1024)
+ .end space
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-tgt.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-tgt.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic1-tgt.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic1-tgt.s Wed Dec 26 17:26:44 2001
@@ -0,0 +1,8 @@
+
+ .globl bar
+ .ent bar
+bar:
+ nop
+ .end bar
+
+ .p2align 5
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-0.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-0.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-0.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-0.d Wed Dec 26 23:15:00 2001
@@ -0,0 +1,20 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #2-fwd-0 (0x7ffc forward edge case)
+#as: -membedded-pic -mips3
+#source: empic2-ref.s
+#source: empic2-fwd-tgt.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+#...
+0+400000 g F .text [0-9a-f]+ foo
+#...
+0+407ffc g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+0+400000 <[^>]*> 3c020000 lui v0,0x0
+0+400004 <[^>]*> 64427ffc daddiu v0,v0,32764
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-1.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-1.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-1.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-1.d Wed Dec 26 23:14:07 2001
@@ -0,0 +1,21 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #2-fwd-1 (0xfffc forward edge case)
+#as: -membedded-pic -mips3
+#source: empic2-ref.s
+#source: empic2-space.s
+#source: empic2-fwd-tgt.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+#...
+0+400000 g F .text [0-9a-f]+ foo
+#...
+0+40fffc g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+0+400000 <[^>]*> 3c020001 lui v0,0x1
+0+400004 <[^>]*> 6442fffc daddiu v0,v0,-4
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-tgt.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-tgt.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-fwd-tgt.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-fwd-tgt.s Wed Dec 26 22:28:29 2001
@@ -0,0 +1,7 @@
+
+ .space (32768 - 16 - 4) # 16..32764
+
+ .globl bar
+ .ent bar
+bar:
+ .end bar
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-ref.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-ref.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-ref.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-ref.s Wed Dec 26 23:02:01 2001
@@ -0,0 +1,6 @@
+ .globl foo
+ .ent foo
+foo:
+ la $2,bar-foo
+
+ .p2align 4
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-0.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-0.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-0.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-0.d Wed Dec 26 23:14:34 2001
@@ -0,0 +1,22 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #2-rev-0 (0x0004 backward edge case)
+#as: -membedded-pic -mips3
+#source: empic2-rev-tgt.s
+#source: empic2-ref.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+#...
+0+408000 g F .text [0-9a-f]+ foo
+#...
+0+407ffc g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+ ...
+0+407ffc <[^>]*> 00000000 nop
+0+408000 <[^>]*> 3c020000 lui v0,0x0
+0+408004 <[^>]*> 6442fffc daddiu v0,v0,-4
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-1.d src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-1.d
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-1.d Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-1.d Wed Dec 26 23:15:07 2001
@@ -0,0 +1,24 @@
+#name: MIPS 32-bit ELF embedded-pic relocs #2-rev-1 (0x8004 backward edge case)
+#as: -membedded-pic -mips3
+#source: empic2-rev-tgt.s
+#source: empic2-space.s
+#source: empic2-ref.s
+#objdump: --prefix-addresses -tdr --show-raw-insn -mmips:4000
+#ld: -Ttext 0x400000 -e 0x400000
+
+.*: file format elf.*mips.*
+
+#...
+0+410000 g F .text [0-9a-f]+ foo
+#...
+0+407ffc g F .text [0-9a-f]+ bar
+#...
+
+Disassembly of section \.text:
+ ...
+0+407ffc <[^>]*> 00000000 nop
+ ...
+0+410000 <[^>]*> 3c02ffff lui v0,0xffff
+0+410004 <[^>]*> 64427ffc daddiu v0,v0,32764
+ ...
+#pass
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-tgt.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-tgt.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-rev-tgt.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-rev-tgt.s Wed Dec 26 22:36:04 2001
@@ -0,0 +1,8 @@
+
+ .space (32768 - 4)
+
+ .globl bar
+ .ent bar
+bar:
+ .space 4
+ .end bar
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-space.s src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-space.s
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/empic2-space.s Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/empic2-space.s Wed Dec 26 22:21:12 2001
@@ -0,0 +1,5 @@
+
+ .ent space
+space:
+ .space (32 * 1024)
+ .end space
diff -r -x CVS -N -up src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/mips-elf.exp src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/mips-elf.exp
--- src.empic-pcrel-almost-clean/ld/testsuite/ld-mips-elf/mips-elf.exp Wed Dec 31 16:00:00 1969
+++ src.empic-pcrel-tests-only/ld/testsuite/ld-mips-elf/mips-elf.exp Wed Dec 26 23:06:51 2001
@@ -0,0 +1,38 @@
+# Expect script for MIPS ELF linker tests
+# Copyright 2001 Free Software Foundation, Inc.
+#
+# This file is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+#
+
+if { [istarget mips*-*-*] } then {
+
+ # Run embedded-pic tests only if generic ELF.
+ if { [istarget mips*-*-elf] } {
+ # Check basic PC-relative HI/LO relocs.
+ run_dump_test "empic1-ln"
+ run_dump_test "empic1-lp"
+ run_dump_test "empic1-mn"
+ run_dump_test "empic1-mp"
+ run_dump_test "empic1-sn"
+ run_dump_test "empic1-sp"
+
+ # PC-relative HI/LO reloc edge-case regression tests.
+ # As of 2001-12-26, the linker botches the fwd-0 and rev-1 tests.
+ run_dump_test "empic2-fwd-0"
+ run_dump_test "empic2-fwd-1"
+ run_dump_test "empic2-rev-0"
+ run_dump_test "empic2-rev-1"
+ }
+}