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Re: [PATCH] : For SH target, generate warning if Destination register is same for parallel insns
- From: Nick Clifton <nickc at cambridge dot redhat dot com>
- To: "Arati Dikey" <AratiD at kpit dot com>
- Cc: <binutils at sources dot redhat dot com>
- Date: 25 Jan 2002 14:45:19 +0000
- Subject: Re: [PATCH] : For SH target, generate warning if Destination register is same for parallel insns
- References: <97AA06615400F34AB695F23CE3D42E914DC593@sohm.kpit.com>
Hi Arati,
> The SH assembler currently does not generate a warning if the same
> destination register is used in parallel instructions. As this can
> lead to unexpected results, the user needs to be warned as is done
> in other commercial assemblers.
>
> For example,
> PADD X0,Y0,A0 PMULS A1,X0,A0
>
> The following patch generates the warning. I have also verified that
> it does not cause any side effect on other DSP instructions.
Thank you for submitting this patch. Unfortunately since this is a
non-trivial change we cannot consider accepting it without a copyright
assignment on file with the FSF. Please could you fill out the form
below and send it off, so that this process can be started.
Cheers
Nick
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