Re: include/dis-asm.h patch for cgen disassemblers

[Andrew Cagney <ac131313 at cygnus dot com>]

> cagney wrote:
> 
> 
>> The PS2 has a number of ISAs on a single chip.  [...]
> 
> 
> I hope you're not just yanking my chain.  You should realize that
> the PS2 processor chip is more of a system-on-a-chip, with distinct
> processors on one die.  The fact that they are on the same chip
> is a fabrication decision, absurd to contemplate during bfd modelling.


What has a fabrication decision got to do with this?  The PS2 is a 
number of different ISAs that happen to be on a single chip.

I'm contending that this is correctly modeled within BFD as separate 
BFD_ARCH's.  If it isn't then the documentation, at least, for BFD is wrong.

You appear to contend that it is correctly modeled as a single bfd_arch 
and a number of different bfd_machs.  This might be well and good, 
however, it, in my opinion, fundamentally changes the definition of a 
bfd_arch / mach.  In particular a bfd_arch no longer refers to an ISA 
but rather a system.


>> that would be #2 above.  The question is then, is this the most 
>> applicable model and acceptable to BFD/BINUTILS? [...]
> 
> 
> I don't really care -- it has no bearing on the current issue.


It has direct bearing on the current issue.  Your response to the above 
illustrates this.  You appear to suggest that it is absurd to model an 
architecture like the PS2 correctly.  Why?

The objective here is to sort out bfd_architecutre / machine and this 
new thingie of yours and determine exactly how they all relate to each 
other.

Once that is resolved, the field name should just fall out.


> Maybe you are confusing the term "ISA" with the concept of a
> "manual" or "book".  Maybe you are confusing an overall
> architecture by a list of instructions that some implementation
> of some architecture may execute in some modes.  Maybe you are
> confusing my intent of using the "isas" field (to identify subsets
> of the instruction sets implemented by the current arch/mach) with
> some imagined plan to replace arch/mach.


Who knows what you're doing.  You haven't posted any thing updating the 
documentation and clarifying this.


> Please get unconfused, for example by thinking about the
> relationship between arm & thumb instructions.  Hint: a single
> program can contain both.  Such an executable file can be
> marked with a single bfd_arch/mach tag pair.  The processor
> switches its interpretation of instruction memory contents
> based upon internal run-time state.


And?  Try, instruction_subsets then?  I have strong reservations over 
isa as it and bfd_architecture are badly overloaded.

Can I assume, for instance, that INSTRUCTION_SUBSETS, wouldn't be used 
to select orthogonal ISAs that run on different compute engines?

Andrew