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Re: resend: [PATCH] z8k fixes
- From: Nick Clifton <nickc at cambridge dot redhat dot com>
- To: Christian Groessler <cpg at aladdin dot de>
- Cc: binutils at sources dot redhat dot com, chris at groessler dot org
- Date: 25 Apr 2002 12:00:21 +0100
- Subject: Re: resend: [PATCH] z8k fixes
- References: <87ofgc12oq.fsf@power.cnet.aladdin.de>
Hi Christian,
> The patch contains mostly fixes for the disassembler. It also fixes
> a crash of the assembler with some malformed source input.
> Long segmented addresses are now correctly relocated.
> Finally it updates my email address in the MAINTAINERS file.
> bfd/ChangeLog:
> 2002-03-08 Christian Groessler <chris@groessler.org>
>
> * coff-z8k.c (extra_case): Fix R_IMM32 relocations: The
> addresses are 23bit with a special layout, not plain 32bit
> values. Prevent relocation of immediate values.
>
>
> binutils/ChangeLog:
> 2002-03-08 Christian Groessler <chris@groessler.org>
>
> * MAINTAINERS: Changed my email address.
>
>
> gas/ChangeLog:
> 2002-03-08 Christian Groessler <chris@groessler.org>
>
> * config/tc-z8k.c (build_bytes): Add support for new cases:
> CLASS_IGNORE and ARG_NIM4.
> (md_assemble): Prevent destruction of input_line_pointer if
> get_operands returns failure.
>
>
> opcodes/ChangeLog:
> 2002-03-08 Christian Groessler <chris@groessler.org>
>
> * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2
> bytes_per_chunk, 6 bytes_per_line for nicer display of the hex
> codes.
> (z8k_lookup_instr): CLASS_IGNORE case added.
> (output_instr): Don't print hex codes, they are already
> printed.
> (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case
> fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases.
> (unparse_instr): Fix base and indexed addressing disassembly:
> The index is inside the brackets.
> * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines.
> (opt): Fix shift left/right arithmetic/logical byte defines:
> The high byte of the immediate word is ignored by the
> processor.
> Fix n parameter of ldm opcodes: The opcode contains (n-1).
> (args): Fix "n" entry.
> (toks): Add "nim4" and "iiii" entries.
> * z8k-opc.h: Regenerated with new z8kgen.c.
Patch applied.
Note - you failed to provide a patch for simulator to add in support
for CLASS_IGNORE and ARG_NIM4. I am attaching a possible patch below
for your inspection and approval. (I am not familiar with the z8k
architecture, so I do not know if this patch is correct).
Cheers
Nick
Index: sim/z8k/writecode.c
===================================================================
RCS file: /cvs/src/src/sim/z8k/writecode.c,v
retrieving revision 1.1.1.1
diff -c -3 -p -w -r1.1.1.1 writecode.c
*** sim/z8k/writecode.c 16 Apr 1999 01:35:14 -0000 1.1.1.1
--- sim/z8k/writecode.c 25 Apr 2002 10:52:27 -0000
*************** lookup_inst (what)
*** 139,144 ****
--- 139,145 ----
nibl_matched = 0;
break;
+ case CLASS_IGNORE:
case CLASS_BIT:
if (datum_value != instr_nibl)
nibl_matched = 0;
*************** info_args (p)
*** 539,544 ****
--- 540,546 ----
case CLASS_BIT_1OR2:
emit ("register unsigned int imm_src=(<insn_4>& 2)?2:1;\n");
break;
+ case CLASS_IGNORE:
case CLASS_BIT:
/* Just ignore these, we've already decoded this bit */
nibs++;
*************** break;
*** 589,594 ****
--- 591,600 ----
emit ("register unsigned int imm_src=<insn_4>;\n");
nibs++;
break;
+ case ARG_NIM4:
+ emit ("register unsigned int imm_src = - <insn_4>;\n");
+ nibs++;
+ break;
case ARG_IMM2:
emit ("register unsigned int imm_src=<insn_4> & 0x2;\n");
nibs++;
*************** info_len_in_words (o)
*** 1938,1943 ****
--- 1944,1950 ----
{
switch (*p & CLASS_MASK)
{
+ case CLASS_IGNORE:
case CLASS_BIT:
case CLASS_REGN0:
case CLASS_REG:
*************** info_len_in_words (o)
*** 1959,1964 ****
--- 1966,1972 ----
break;
case ARG_IMM2:
case ARG_IMM4:
+ case ARG_NIM4:
case ARG_IMM4M1:
case ARG_IMM_1:
case ARG_IMM_2: