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Re: [PATCH] : For SH target, generate warning if Destination register is same for parallel insns


Arati Dikey wrote:
> 
> Hi !
> 
> The SH assembler currently does not generate a warning if the same
> destination register is used in parallel instructions. As this can lead
> to unexpected results, the user needs to be warned as
> is done in other commercial assemblers.
> 
> For example,
>         PADD X0,Y0,A0 PMULS A1,X0,A0
> The following patch generates the warning. I have also verified that it
> does not cause any
> side effect on other DSP instructions.

Apparently you didn't test a lot of combinations.
> 
> Regards,
> Arati Dikey
> 
> Changelog
> 2002-01-23  Arati Dikey <aratid@kpit.com>
> 
>         * tc-sh.c (get_specific): Generate warning if the same
> destination register is used in                   parallel instructions.

> +   static boolean bIsPPI = false ;
> +   static int nLastDestReg ;
	
This patch is incorrect.  It makes gas complain about using the same
destination register in separate three-operand parallel processing.
Moreover, get_specific is a bad choice for this hack, since it is
used for every instruction, thus you slow down the assembler needlessly.
Please back oput this patch.

A much better place to do this check is in assemble_ppi.  This final
check can be done in the PMUL / if (field_b) case.
The first register can be either decodes from field_b, or stored beforehand
in the PPIC case.

-- 
--------------------------
SuperH
2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ
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