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[mips patch rfa] slight tweak to vr5400 "mul" opcode
- From: cgd at broadcom dot com
- To: binutils at sources dot redhat dot com,echristo at redhat dot com,rsandifo at redhat dot com
- Date: 04 Apr 2003 15:00:46 -0800
- Subject: [mips patch rfa] slight tweak to vr5400 "mul" opcode
I've been going through and trying to do some more testsuite
improvements, and i noticed that the vr5400 3-operand "mul" opcode,
unlike the rest of the "mul" opcode entries, _requires_ 3 operands.
i.e., normally:
mul foo, bar
means the same as:
mul foo, foo, bar
but for vr5400 you _must_ use the latter form. I couldn't find any
documentation to support this requirement.
any reason the following patch shouldn't be applied?
chris
--
2003-04-04 Chris Demetriou <cgd at broadcom dot com>
* mips-opc.c (mips_builtin_opcodes): Change vr5400 "mul"
to allow only two operands to be specified.
Index: mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.43
diff -u -p -r1.43 mips-opc.c
--- mips-opc.c 1 Jan 2003 01:06:13 -0000 1.43
+++ mips-opc.c 4 Apr 2003 22:54:45 -0000
@@ -803,7 +803,7 @@ const struct mips_opcode mips_builtin_op
{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
{"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX },
{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3|N55},
-{"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N54 },
+{"mul", "d,v,t", 0x00000058, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, N54 },
{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
{"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, WR_MACC|RD_S|RD_T|FP_D, MX|SB1 },