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AM33/2.0 support added to mn10300-elf
- From: Alexandre Oliva <aoliva at redhat dot com>
- To: binutils at sources dot redhat dot com
- Date: 09 Jul 2003 23:48:08 -0300
- Subject: AM33/2.0 support added to mn10300-elf
- Organization: GCC Team, Red Hat
This patch introduces AM33/2.0 support in the mn10300-elf toolchain.
AM33/2.0 introduces a single-precision floating point unit to the
original AM33.
This was the first port I did at Red Hat, and it's a shame that it
took me so long to contribute it. I'm checking this in, after testing
it with a i686-pc-linux-gnu-x-mn10300-elf uberbaum build. GCC,
newlib, GDB bits will be posted to the corresponding mailing lists.
Index: include/elf/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (E_MN10300_MACH_AM33_2): Renamed from
E_MN10300_MACH_AM332.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (E_MN10300_MACH_AM332): Defined.
Index: include/elf/mn10300.h
===================================================================
RCS file: /cvs/uberbaum/include/elf/mn10300.h,v
retrieving revision 1.6
diff -u -p -r1.6 mn10300.h
--- include/elf/mn10300.h 14 Mar 2001 02:27:44 -0000 1.6
+++ include/elf/mn10300.h 9 Jul 2003 22:55:28 -0000
@@ -50,4 +50,5 @@ END_RELOC_NUMBERS (R_MN10300_MAX)
#define E_MN10300_MACH_MN10300 0x00810000
#define E_MN10300_MACH_AM33 0x00820000
+#define E_MN10300_MACH_AM33_2 0x00830000
#endif /* _ELF_MN10300_H */
Index: include/opcode/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (AM33_2): Renamed from AM33.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* mn10300.h (AM332, FMT_D3): Defined.
(MN10300_OPERAND_FSREG, MN10300_OPERAND_FDREG): Likewise.
(MN10300_OPERAND_FPCR): Likewise.
Index: include/opcode/mn10300.h
===================================================================
RCS file: /cvs/uberbaum/include/opcode/mn10300.h,v
retrieving revision 1.3
diff -u -p -r1.3 mn10300.h
--- include/opcode/mn10300.h 14 Mar 2001 02:27:44 -0000 1.3
+++ include/opcode/mn10300.h 9 Jul 2003 22:55:53 -0000
@@ -135,6 +135,12 @@ extern const struct mn10300_operand mn10
#define MN10300_OPERAND_24BIT 0x800000
+#define MN10300_OPERAND_FSREG 0x1000000
+
+#define MN10300_OPERAND_FDREG 0x2000000
+
+#define MN10300_OPERAND_FPCR 0x4000000
+
/* Opcode Formats. */
#define FMT_S0 1
#define FMT_S1 2
@@ -151,11 +157,13 @@ extern const struct mn10300_operand mn10
#define FMT_D8 13
#define FMT_D9 14
#define FMT_D10 15
+#define FMT_D3 16
/* Variants of the mn10300 which have additional opcodes. */
#define MN103 300
#define AM30 300
#define AM33 330
+#define AM33_2 332
#endif /* MN10300_H */
Index: bfd/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2001-05-06 Alexandre Oliva <aoliva@redhat.com>
* elf-m10300.c (compute_function_info): Account for AM33
registers in `movm' when computing stack space for `call' when
linking for AM33/2.0 link.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* archures.c (bfd_mach_am33_2): Renamed from bfd_mach_am332.
* bfd-in2.h: Rebuilt.
* cpu-m10300.c (bfd_am33_2_arch): Renamed from bfd_am332_arch.
* elf-m10300.c: Updated.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* archures.c (bfd_mach_am332): Defined.
* bfd-in2.h: Rebuilt.
* cpu-m10300.c (bfd_am332_arch): Defined.
(bfd_am33_arch): Chained with am33-2.
* elf-m10300.c (elf_mn10300_mach): Handle am332.
(_bfd_mn10300_elf_final_write_processing): Likewise.
Index: bfd/archures.c
===================================================================
RCS file: /cvs/uberbaum/bfd/archures.c,v
retrieving revision 1.77
diff -u -p -r1.77 archures.c
--- bfd/archures.c 29 Jun 2003 10:06:39 -0000 1.77
+++ bfd/archures.c 9 Jul 2003 22:56:20 -0000
@@ -264,6 +264,7 @@ DESCRIPTION
. bfd_arch_mn10300, {* Matsushita MN10300 *}
.#define bfd_mach_mn10300 300
.#define bfd_mach_am33 330
+.#define bfd_mach_am33_2 332
. bfd_arch_fr30,
.#define bfd_mach_fr30 0x46523330
. bfd_arch_frv,
Index: bfd/bfd-in2.h
===================================================================
RCS file: /cvs/uberbaum/bfd/bfd-in2.h,v
retrieving revision 1.226
diff -u -p -r1.226 bfd-in2.h
--- bfd/bfd-in2.h 1 Jul 2003 14:44:59 -0000 1.226
+++ bfd/bfd-in2.h 9 Jul 2003 22:56:27 -0000
@@ -1690,6 +1690,7 @@ enum bfd_architecture
bfd_arch_mn10300, /* Matsushita MN10300 */
#define bfd_mach_mn10300 300
#define bfd_mach_am33 330
+#define bfd_mach_am33_2 332
bfd_arch_fr30,
#define bfd_mach_fr30 0x46523330
bfd_arch_frv,
Index: bfd/cpu-m10300.c
===================================================================
RCS file: /cvs/uberbaum/bfd/cpu-m10300.c,v
retrieving revision 1.6
diff -u -p -r1.6 cpu-m10300.c
--- bfd/cpu-m10300.c 30 Nov 2002 08:39:36 -0000 1.6
+++ bfd/cpu-m10300.c 9 Jul 2003 22:56:27 -0000
@@ -21,6 +21,22 @@ Foundation, Inc., 59 Temple Place - Suit
#include "sysdep.h"
#include "libbfd.h"
+const bfd_arch_info_type bfd_am33_2_arch =
+ {
+ 32, /* 32 bits in a word */
+ 32, /* 32 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_mn10300,
+ 332,
+ "am33_2",
+ "am33-2",
+ 2,
+ FALSE,
+ bfd_default_compatible,
+ bfd_default_scan,
+ 0,
+ };
+
const bfd_arch_info_type bfd_am33_arch =
{
32, /* 32 bits in a word */
@@ -34,7 +50,7 @@ const bfd_arch_info_type bfd_am33_arch =
FALSE,
bfd_default_compatible,
bfd_default_scan,
- 0,
+ &bfd_am33_2_arch,
};
const bfd_arch_info_type bfd_mn10300_arch =
Index: bfd/elf-m10300.c
===================================================================
RCS file: /cvs/uberbaum/bfd/elf-m10300.c,v
retrieving revision 1.34
diff -u -p -r1.34 elf-m10300.c
--- bfd/elf-m10300.c 25 Jun 2003 06:40:19 -0000 1.34
+++ bfd/elf-m10300.c 9 Jul 2003 22:56:31 -0000
@@ -2370,7 +2370,8 @@ compute_function_info (abfd, hash, addr,
if (hash->movm_args & 0x08)
hash->movm_stack_size += 8 * 4;
- if (bfd_get_mach (abfd) == bfd_mach_am33)
+ if (bfd_get_mach (abfd) == bfd_mach_am33
+ || bfd_get_mach (abfd) == bfd_mach_am33_2)
{
/* "exother" space. e0, e1, mdrq, mcrh, mcrl, mcvf */
if (hash->movm_args & 0x1)
@@ -2750,6 +2751,9 @@ elf_mn10300_mach (flags)
case E_MN10300_MACH_AM33:
return bfd_mach_am33;
+
+ case E_MN10300_MACH_AM33_2:
+ return bfd_mach_am33_2;
}
}
@@ -2773,6 +2777,10 @@ _bfd_mn10300_elf_final_write_processing
case bfd_mach_am33:
val = E_MN10300_MACH_AM33;
+ break;
+
+ case bfd_mach_am33_2:
+ val = E_MN10300_MACH_AM33_2;
break;
}
Index: opcodes/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands. Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr. Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3. Print out FP register names.
Index: opcodes/m10300-dis.c
===================================================================
RCS file: /cvs/uberbaum/opcodes/m10300-dis.c,v
retrieving revision 1.8
diff -u -p -r1.8 m10300-dis.c
--- opcodes/m10300-dis.c 24 Jul 2001 04:10:19 -0000 1.8
+++ opcodes/m10300-dis.c 9 Jul 2003 22:56:37 -0000
@@ -26,7 +26,8 @@ Foundation, Inc., 59 Temple Place - Suit
static void disassemble PARAMS ((bfd_vma, struct disassemble_info *,
unsigned long insn, unsigned int));
-#define HAVE_AM33 (info->mach == AM33)
+#define HAVE_AM33_2 (info->mach == AM33_2)
+#define HAVE_AM33 (info->mach == AM33 || HAVE_AM33_2)
#define HAVE_AM30 (info->mach == AM30)
int
@@ -200,6 +201,9 @@ print_insn_mn10300 (memaddr, info)
insn = bfd_getb32 (buffer);
consume = 7;
+ /* Handle the 5-byte extended instruction codes. */
+ if ((insn & 0xfff80000) == 0xfe800000)
+ consume = 5;
}
disassemble (memaddr, info, insn, consume);
@@ -237,6 +241,8 @@ disassemble (memaddr, info, insn, size)
mysize = 5;
else if (op->format == FMT_D2)
mysize = 4;
+ else if (op->format == FMT_D3)
+ mysize = 5;
else if (op->format == FMT_D4)
mysize = 6;
else if (op->format == FMT_D6)
@@ -253,6 +259,7 @@ disassemble (memaddr, info, insn, size)
if ((op->mask & insn) == op->opcode
&& size == (unsigned int) mysize
&& (op->machine == 0
+ || (op->machine == AM33_2 && HAVE_AM33_2)
|| (op->machine == AM33 && HAVE_AM33)
|| (op->machine == AM30 && HAVE_AM30)))
{
@@ -343,6 +350,25 @@ disassemble (memaddr, info, insn, size)
insn |= (temp & 0xffffff00) >> 8;
extension = temp & 0xff;
}
+ else if (size == 5 && op->format == FMT_D3)
+ {
+ status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info);
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, memaddr, info);
+ return;
+ }
+ insn &= 0xffff0000;
+ insn |= bfd_getl16 (buffer);
+
+ status = (*info->read_memory_func) (memaddr + 4, buffer, 1, info);
+ if (status != 0)
+ {
+ (*info->memory_error_func) (status, memaddr, info);
+ return;
+ }
+ extension = *(unsigned char *) buffer;
+ }
else if (size == 5)
{
unsigned long temp = 0;
@@ -498,6 +524,52 @@ disassemble (memaddr, info, insn, size)
if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
value = ((value & 0xffffff) ^ 0x800000) - 0x800000;
}
+ else if ((operand->flags & (MN10300_OPERAND_FSREG
+ | MN10300_OPERAND_FDREG)))
+ {
+ /* See m10300-opc.c just before #define FSM0 for an
+ explanation of these variables. Note that
+ FMT-implied shifts are not taken into account for
+ FP registers. */
+ unsigned long mask_low, mask_high;
+ int shl_low, shr_high, shl_high;
+
+ switch (operand->bits)
+ {
+ case 5:
+ /* Handle regular FP registers. */
+ if (operand->shift >= 0)
+ {
+ /* This is an `m' register. */
+ shl_low = operand->shift;
+ shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
+ }
+ else
+ {
+ /* This is an `n' register. */
+ shl_low = -operand->shift;
+ shl_high = shl_low / 4;
+ }
+ mask_low = 0x0f;
+ mask_high = 0x10;
+ shr_high = 4;
+ break;
+
+ case 3:
+ /* Handle accumulators. */
+ shl_low = -operand->shift;
+ shl_high = 0;
+ mask_low = 0x03;
+ mask_high = 0x04;
+ shr_high = 2;
+ break;
+
+ default:
+ abort ();
+ }
+ value = ((((insn >> shl_high) << shr_high) & mask_high)
+ | ((insn >> shl_low) & mask_low));
+ }
else if ((operand->flags & MN10300_OPERAND_EXTENDED) != 0)
{
value = ((extension >> (operand->shift))
@@ -566,6 +638,15 @@ disassemble (memaddr, info, insn, size)
else
(*info->fprintf_func) (info->stream, "xr%d", (int) value);
}
+
+ else if ((operand->flags & MN10300_OPERAND_FSREG) != 0)
+ (*info->fprintf_func) (info->stream, "fs%d", (int) value);
+
+ else if ((operand->flags & MN10300_OPERAND_FDREG) != 0)
+ (*info->fprintf_func) (info->stream, "fd%d", (int) value);
+
+ else if ((operand->flags & MN10300_OPERAND_FPCR) != 0)
+ (*info->fprintf_func) (info->stream, "fpcr");
else if ((operand->flags & MN10300_OPERAND_USP) != 0)
(*info->fprintf_func) (info->stream, "usp");
Index: opcodes/m10300-opc.c
===================================================================
RCS file: /cvs/uberbaum/opcodes/m10300-opc.c,v
retrieving revision 1.8
diff -u -p -r1.8 m10300-opc.c
--- opcodes/m10300-opc.c 16 Jun 2001 16:00:46 -0000 1.8
+++ opcodes/m10300-opc.c 9 Jul 2003 22:56:41 -0000
@@ -338,6 +338,85 @@ const struct mn10300_operand mn10300_ope
#define SIMM4_6 (SIMM4_2+1)
{4, 12, MN10300_OPERAND_SIGNED},
+#define FPCR (SIMM4_6+1)
+ {0, 0, MN10300_OPERAND_FPCR},
+
+/* We call f[sd]m registers those whose most significant bit is stored
+ * within the opcode half-word, i.e., in a bit on the left of the 4
+ * least significant bits, and f[sd]n registers those whose most
+ * significant bit is stored at the end of the full word, after the 4
+ * least significant bits. They're not numbered after their position
+ * in the mnemonic asm instruction, but after their position in the
+ * opcode word, i.e., depending on the amount of shift they need.
+ *
+ * The additional bit is shifted as follows: for `n' registers, it
+ * will be shifted by (|shift|/4); for `m' registers, it will be
+ * shifted by (8+(8&shift)+(shift&4)/4); for accumulator, whose
+ * specifications are only 3-bits long, the two least-significant bits
+ * are shifted by 16, and the most-significant bit is shifted by -2
+ * (i.e., it's stored in the least significant bit of the full
+ * word). */
+
+/* fsm register in the first register operand position. */
+#define FSM0 (FPCR+1)
+ {5, 0, MN10300_OPERAND_FSREG },
+
+/* fsm register in the second register operand position. */
+#define FSM1 (FSM0+1)
+ {5, 4, MN10300_OPERAND_FSREG },
+
+/* fsm register in the third register operand position. */
+#define FSM2 (FSM1+1)
+ {5, 8, MN10300_OPERAND_FSREG },
+
+/* fsm register in the fourth register operand position. */
+#define FSM3 (FSM2+1)
+ {5, 12, MN10300_OPERAND_FSREG },
+
+/* fsn register in the first register operand position. */
+#define FSN1 (FSM3+1)
+ {5, -4, MN10300_OPERAND_FSREG },
+
+/* fsn register in the second register operand position. */
+#define FSN2 (FSN1+1)
+ {5, -8, MN10300_OPERAND_FSREG },
+
+/* fsm register in the third register operand position. */
+#define FSN3 (FSN2+1)
+ {5, -12, MN10300_OPERAND_FSREG },
+
+/* fsm accumulator, in the fourth register operand position. */
+#define FSACC (FSN3+1)
+ {3, -16, MN10300_OPERAND_FSREG },
+
+/* fdm register in the first register operand position. */
+#define FDM0 (FSACC+1)
+ {5, 0, MN10300_OPERAND_FDREG },
+
+/* fdm register in the second register operand position. */
+#define FDM1 (FDM0+1)
+ {5, 4, MN10300_OPERAND_FDREG },
+
+/* fdm register in the third register operand position. */
+#define FDM2 (FDM1+1)
+ {5, 8, MN10300_OPERAND_FDREG },
+
+/* fdm register in the fourth register operand position. */
+#define FDM3 (FDM2+1)
+ {5, 12, MN10300_OPERAND_FDREG },
+
+/* fdn register in the first register operand position. */
+#define FDN1 (FDM3+1)
+ {5, -4, MN10300_OPERAND_FDREG },
+
+/* fdn register in the second register operand position. */
+#define FDN2 (FDN1+1)
+ {5, -8, MN10300_OPERAND_FDREG },
+
+/* fdn register in the third register operand position. */
+#define FDN3 (FDN2+1)
+ {5, -12, MN10300_OPERAND_FDREG },
+
} ;
#define MEM(ADDR) PAREN, ADDR, PAREN
@@ -810,14 +889,17 @@ const struct mn10300_opcode mn10300_opco
{ "btst", 0xfbe90000, 0xffff0000, 0, FMT_D7, AM33, {IMM8, RN02}},
{ "btst", 0xfde90000, 0xffff0000, 0, FMT_D8, AM33, {IMM24, RN02}},
{ "btst", 0xfee90000, 0xffff0000, 0, FMT_D9, AM33, {IMM32_HIGH8, RN02}},
+{ "btst", 0xfe820000, 0xffff0000, 0, FMT_D3, AM33_2, {IMM8E, MEM(IMM16_MEM)}},
{ "btst", 0xfe020000, 0xffff0000, 0, FMT_D5, 0, {IMM8E, MEM(IMM32_LOWSHIFT8)}},
{ "btst", 0xfaf80000, 0xfffc0000, 0, FMT_D2, 0, {IMM8, MEM2(SD8N_SHIFT8, AN0)}},
{ "bset", 0xf080, 0xfff0, 0, FMT_D0, 0, {DM1, MEM(AN0)}},
+{ "bset", 0xfe800000, 0xffff0000, 0, FMT_D3, AM33_2, {IMM8E, MEM(IMM16_MEM)}},
{ "bset", 0xfe000000, 0xffff0000, 0, FMT_D5, 0, {IMM8E, MEM(IMM32_LOWSHIFT8)}},
{ "bset", 0xfaf00000, 0xfffc0000, 0, FMT_D2, 0, {IMM8, MEM2(SD8N_SHIFT8, AN0)}},
{ "bclr", 0xf090, 0xfff0, 0, FMT_D0, 0, {DM1, MEM(AN0)}},
+{ "bclr", 0xfe810000, 0xffff0000, 0, FMT_D3, AM33_2, {IMM8E, MEM(IMM16_MEM)}},
{ "bclr", 0xfe010000, 0xffff0000, 0, FMT_D5, 0, {IMM8E, MEM(IMM32_LOWSHIFT8)}},
{ "bclr", 0xfaf40000, 0xfffc0000, 0, FMT_D2, 0, {IMM8, MEM2(SD8N_SHIFT8,AN0)}},
@@ -889,6 +971,36 @@ const struct mn10300_opcode mn10300_opco
{ "lra", 0xda, 0xff, 0, FMT_S0, 0, {UNUSED}},
{ "setlb", 0xdb, 0xff, 0, FMT_S0, 0, {UNUSED}},
+{ "fbeq", 0xf8d000, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbne", 0xf8d100, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbgt", 0xf8d200, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbge", 0xf8d300, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fblt", 0xf8d400, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fble", 0xf8d500, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbuo", 0xf8d600, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fblg", 0xf8d700, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbleg", 0xf8d800, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbug", 0xf8d900, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbuge", 0xf8da00, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbul", 0xf8db00, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbule", 0xf8dc00, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+{ "fbue", 0xf8dd00, 0xffff00, 0, FMT_D1, AM33_2, {SD8N_PCREL}},
+
+{ "fleq", 0xf0d0, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flne", 0xf0d1, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flgt", 0xf0d2, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flge", 0xf0d3, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "fllt", 0xf0d4, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flle", 0xf0d5, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "fluo", 0xf0d6, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "fllg", 0xf0d7, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flleg", 0xf0d8, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flug", 0xf0d9, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "fluge", 0xf0da, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flul", 0xf0db, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flule", 0xf0dc, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+{ "flue", 0xf0dd, 0xffff, 0, FMT_D0, AM33_2, {UNUSED}},
+
{ "jmp", 0xf0f4, 0xfffc, 0, FMT_D0, 0, {PAREN,AN0,PAREN}},
{ "jmp", 0xcc0000, 0xff0000, 0, FMT_S2, 0, {IMM16_PCREL}},
{ "jmp", 0xdc000000, 0xff000000, 0, FMT_S4, 0, {IMM32_HIGH24}},
@@ -905,6 +1017,141 @@ const struct mn10300_opcode mn10300_opco
{ "trap", 0xf0fe, 0xffff, 0, FMT_D0, 0, {UNUSED}},
{ "rtm", 0xf0ff, 0xffff, 0, FMT_D0, 0, {UNUSED}},
{ "nop", 0xcb, 0xff, 0, FMT_S0, 0, {UNUSED}},
+
+{ "dcpf", 0xf9a600, 0xffff0f, 0, FMT_D6, AM33_2, {MEM (RM2)}},
+{ "dcpf", 0xf9a700, 0xffffff, 0, FMT_D6, AM33_2, {MEM (SP)}},
+{ "dcpf", 0xfba60000, 0xffff00ff, 0, FMT_D7, AM33_2, {MEM2 (RI,RM0)}},
+{ "dcpf", 0xfba70000, 0xffff0f00, 0, FMT_D7, AM33_2, {MEM2 (SD8,RM2)}},
+{ "dcpf", 0xfda70000, 0xffff0f00, 0, FMT_D8, AM33_2, {MEM2 (SD24,RM2)}},
+{ "dcpf", 0xfe460000, 0xffff0f00, 0, FMT_D9, AM33_2, {MEM2 (IMM32_HIGH8,RM2)}},
+
+{ "fmov", 0xf92000, 0xfffe00, 0, FMT_D6, AM33_2, {MEM (RM2), FSM0}},
+{ "fmov", 0xf92200, 0xfffe00, 0, FMT_D6, AM33_2, {MEMINC (RM2), FSM0}},
+{ "fmov", 0xf92400, 0xfffef0, 0, FMT_D6, AM33_2, {MEM (SP), FSM0}},
+{ "fmov", 0xf92600, 0xfffe00, 0, FMT_D6, AM33_2, {RM2, FSM0}},
+{ "fmov", 0xf93000, 0xfffd00, 0, FMT_D6, AM33_2, {FSM1, MEM (RM0)}},
+{ "fmov", 0xf93100, 0xfffd00, 0, FMT_D6, AM33_2, {FSM1, MEMINC (RM0)}},
+{ "fmov", 0xf93400, 0xfffd0f, 0, FMT_D6, AM33_2, {FSM1, MEM (SP)}},
+{ "fmov", 0xf93500, 0xfffd00, 0, FMT_D6, AM33_2, {FSM1, RM0}},
+{ "fmov", 0xf94000, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fmov", 0xf9a000, 0xfffe01, 0, FMT_D6, AM33_2, {MEM (RM2), FDM0}},
+{ "fmov", 0xf9a200, 0xfffe01, 0, FMT_D6, AM33_2, {MEMINC (RM2), FDM0}},
+{ "fmov", 0xf9a400, 0xfffef1, 0, FMT_D6, AM33_2, {MEM (SP), FDM0}},
+{ "fmov", 0xf9b000, 0xfffd10, 0, FMT_D6, AM33_2, {FDM1, MEM (RM0)}},
+{ "fmov", 0xf9b100, 0xfffd10, 0, FMT_D6, AM33_2, {FDM1, MEMINC (RM0)}},
+{ "fmov", 0xf9b400, 0xfffd1f, 0, FMT_D6, AM33_2, {FDM1, MEM (SP)}},
+{ "fmov", 0xf9b500, 0xffff0f, 0, FMT_D6, AM33_2, {RM2, FPCR}},
+{ "fmov", 0xf9b700, 0xfffff0, 0, FMT_D6, AM33_2, {FPCR, RM0}},
+{ "fmov", 0xf9c000, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fmov", 0xfb200000, 0xfffe0000, 0, FMT_D7, AM33_2, {MEM2 (SD8, RM2), FSM2}},
+{ "fmov", 0xfb220000, 0xfffe0000, 0, FMT_D7, AM33_2, {MEMINC2 (RM2, SIMM8), FSM2}},
+{ "fmov", 0xfb240000, 0xfffef000, 0, FMT_D7, AM33_2, {MEM2 (IMM8, SP), FSM2}},
+{ "fmov", 0xfb270000, 0xffff000d, 0, FMT_D7, AM33_2, {MEM2 (RI, RM0), FSN1}},
+{ "fmov", 0xfb300000, 0xfffd0000, 0, FMT_D7, AM33_2, {FSM3, MEM2 (SD8, RM0)}},
+{ "fmov", 0xfb310000, 0xfffd0000, 0, FMT_D7, AM33_2, {FSM3, MEMINC2 (RM0, SIMM8)}},
+{ "fmov", 0xfb340000, 0xfffd0f00, 0, FMT_D7, AM33_2, {FSM3, MEM2 (IMM8, SP)}},
+{ "fmov", 0xfb370000, 0xffff000d, 0, FMT_D7, AM33_2, {FSN1, MEM2(RI, RM0)}},
+ /* FIXME: the spec doesn't say the fd register must be even for the
+ * next two insns. Assuming it was a mistake in the spec. */
+{ "fmov", 0xfb470000, 0xffff001d, 0, FMT_D7, AM33_2, {MEM2 (RI, RM0), FDN1}},
+{ "fmov", 0xfb570000, 0xffff001d, 0, FMT_D7, AM33_2, {FDN1, MEM2(RI, RM0)}},
+ /* END of FIXME */
+{ "fmov", 0xfba00000, 0xfffe0100, 0, FMT_D7, AM33_2, {MEM2 (SD8, RM2), FDM2}},
+{ "fmov", 0xfba20000, 0xfffe0100, 0, FMT_D7, AM33_2, {MEMINC2 (RM2, SIMM8), FDM2}},
+{ "fmov", 0xfba40000, 0xfffef100, 0, FMT_D7, AM33_2, {MEM2 (IMM8, SP), FDM2}},
+{ "fmov", 0xfbb00000, 0xfffd1000, 0, FMT_D7, AM33_2, {FDM3, MEM2 (SD8, RM0)}},
+{ "fmov", 0xfbb10000, 0xfffd1000, 0, FMT_D7, AM33_2, {FDM3, MEMINC2 (RM0, SIMM8)}},
+{ "fmov", 0xfbb40000, 0xfffd1f00, 0, FMT_D7, AM33_2, {FDM3, MEM2 (IMM8, SP)}},
+{ "fmov", 0xfd200000, 0xfffe0000, 0, FMT_D8, AM33_2, {MEM2 (SIMM24, RM2), FSM2}},
+{ "fmov", 0xfd220000, 0xfffe0000, 0, FMT_D8, AM33_2, {MEMINC2 (RM2, SIMM24), FSM2}},
+{ "fmov", 0xfd240000, 0xfffef000, 0, FMT_D8, AM33_2, {MEM2 (IMM24, SP), FSM2}},
+{ "fmov", 0xfd300000, 0xfffd0000, 0, FMT_D8, AM33_2, {FSM3, MEM2 (SIMM24, RM0)}},
+{ "fmov", 0xfd310000, 0xfffd0000, 0, FMT_D8, AM33_2, {FSM3, MEMINC2 (RM0, SIMM24)}},
+{ "fmov", 0xfd340000, 0xfffd0f00, 0, FMT_D8, AM33_2, {FSM3, MEM2 (IMM24, SP)}},
+{ "fmov", 0xfda00000, 0xfffe0100, 0, FMT_D8, AM33_2, {MEM2 (SIMM24, RM2), FDM2}},
+{ "fmov", 0xfda20000, 0xfffe0100, 0, FMT_D8, AM33_2, {MEMINC2 (RM2, SIMM24), FDM2}},
+{ "fmov", 0xfda40000, 0xfffef100, 0, FMT_D8, AM33_2, {MEM2 (IMM24, SP), FDM2}},
+{ "fmov", 0xfdb00000, 0xfffd1000, 0, FMT_D8, AM33_2, {FDM3, MEM2 (SIMM24, RM0)}},
+{ "fmov", 0xfdb10000, 0xfffd1000, 0, FMT_D8, AM33_2, {FDM3, MEMINC2 (RM0, SIMM24)}},
+{ "fmov", 0xfdb40000, 0xfffd1f00, 0, FMT_D8, AM33_2, {FDM3, MEM2 (IMM24, SP)}},
+{ "fmov", 0xfdb50000, 0xffff0000, 0, FMT_D4, AM33_2, {IMM32, FPCR}},
+{ "fmov", 0xfe200000, 0xfffe0000, 0, FMT_D9, AM33_2, {MEM2 (IMM32_HIGH8, RM2), FSM2}},
+{ "fmov", 0xfe220000, 0xfffe0000, 0, FMT_D9, AM33_2, {MEMINC2 (RM2, IMM32_HIGH8), FSM2}},
+{ "fmov", 0xfe240000, 0xfffef000, 0, FMT_D9, AM33_2, {MEM2 (IMM32_HIGH8, SP), FSM2}},
+{ "fmov", 0xfe260000, 0xfffef000, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM2}},
+{ "fmov", 0xfe300000, 0xfffd0000, 0, FMT_D9, AM33_2, {FSM3, MEM2 (IMM32_HIGH8, RM0)}},
+{ "fmov", 0xfe310000, 0xfffd0000, 0, FMT_D9, AM33_2, {FSM3, MEMINC2 (RM0, IMM32_HIGH8)}},
+{ "fmov", 0xfe340000, 0xfffd0f00, 0, FMT_D9, AM33_2, {FSM3, MEM2 (IMM32_HIGH8, SP)}},
+{ "fmov", 0xfe400000, 0xfffe0100, 0, FMT_D9, AM33_2, {MEM2 (IMM32_HIGH8, RM2), FDM2}},
+{ "fmov", 0xfe420000, 0xfffe0100, 0, FMT_D9, AM33_2, {MEMINC2 (RM2, IMM32_HIGH8), FDM2}},
+{ "fmov", 0xfe440000, 0xfffef100, 0, FMT_D9, AM33_2, {MEM2 (IMM32_HIGH8, SP), FDM2}},
+{ "fmov", 0xfe500000, 0xfffd1000, 0, FMT_D9, AM33_2, {FDM3, MEM2 (IMM32_HIGH8, RM0)}},
+{ "fmov", 0xfe510000, 0xfffd1000, 0, FMT_D9, AM33_2, {FDM3, MEMINC2 (RM0, IMM32_HIGH8)}},
+{ "fmov", 0xfe540000, 0xfffd1f00, 0, FMT_D9, AM33_2, {FDM3, MEM2 (IMM32_HIGH8, SP)}},
+
+ /* FIXME: these are documented in the instruction bitmap, but not in
+ * the instruction manual. */
+{ "ftoi", 0xfb400000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "itof", 0xfb420000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "ftod", 0xfb520000, 0xffff0f15, 0, FMT_D10,AM33_2, {FSN3, FDN1}},
+{ "dtof", 0xfb560000, 0xffff1f05, 0, FMT_D10,AM33_2, {FDN3, FSN1}},
+ /* END of FIXME */
+
+{ "fabs", 0xfb440000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "fabs", 0xfbc40000, 0xffff1f15, 0, FMT_D10,AM33_2, {FDN3, FDN1}},
+{ "fabs", 0xf94400, 0xfffef0, 0, FMT_D6, AM33_2, {FSM0}},
+{ "fabs", 0xf9c400, 0xfffef1, 0, FMT_D6, AM33_2, {FDM0}},
+
+{ "fneg", 0xfb460000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "fneg", 0xfbc60000, 0xffff1f15, 0, FMT_D10,AM33_2, {FDN3, FDN1}},
+{ "fneg", 0xf94600, 0xfffef0, 0, FMT_D6, AM33_2, {FSM0}},
+{ "fneg", 0xf9c600, 0xfffef1, 0, FMT_D6, AM33_2, {FDM0}},
+
+{ "frsqrt", 0xfb500000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "frsqrt", 0xfbd00000, 0xffff1f15, 0, FMT_D10,AM33_2, {FDN3, FDN1}},
+{ "frsqrt", 0xf95000, 0xfffef0, 0, FMT_D6, AM33_2, {FSM0}},
+{ "frsqrt", 0xf9d000, 0xfffef1, 0, FMT_D6, AM33_2, {FDM0}},
+
+ /* FIXME: this is documented in the instruction bitmap, but not in
+ * the instruction manual. */
+{ "fsqrt", 0xfb540000, 0xffff0f05, 0, FMT_D10,AM33_2, {FSN3, FSN1}},
+{ "fsqrt", 0xfbd40000, 0xffff1f15, 0, FMT_D10,AM33_2, {FDN3, FDN1}},
+{ "fsqrt", 0xf95200, 0xfffef0, 0, FMT_D6, AM33_2, {FSM0}},
+{ "fsqrt", 0xf9d200, 0xfffef1, 0, FMT_D6, AM33_2, {FDM0}},
+ /* END of FIXME */
+
+{ "fcmp", 0xf95400, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fcmp", 0xf9d400, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fcmp", 0xfe350000, 0xfffd0f00, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM3}},
+
+{ "fadd", 0xfb600000, 0xffff0001, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1}},
+{ "fadd", 0xfbe00000, 0xffff1111, 0, FMT_D10,AM33_2, {FDN3, FDN2, FDN1}},
+{ "fadd", 0xf96000, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fadd", 0xf9e000, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fadd", 0xfe600000, 0xfffc0000, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM3, FSM2}},
+
+{ "fsub", 0xfb640000, 0xffff0001, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1}},
+{ "fsub", 0xfbe40000, 0xffff1111, 0, FMT_D10,AM33_2, {FDN3, FDN2, FDN1}},
+{ "fsub", 0xf96400, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fsub", 0xf9e400, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fsub", 0xfe640000, 0xfffc0000, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM3, FSM2}},
+
+{ "fmul", 0xfb700000, 0xffff0001, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1}},
+{ "fmul", 0xfbf00000, 0xffff1111, 0, FMT_D10,AM33_2, {FDN3, FDN2, FDN1}},
+{ "fmul", 0xf97000, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fmul", 0xf9f000, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fmul", 0xfe700000, 0xfffc0000, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM3, FSM2}},
+
+{ "fdiv", 0xfb740000, 0xffff0001, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1}},
+{ "fdiv", 0xfbf40000, 0xffff1111, 0, FMT_D10,AM33_2, {FDN3, FDN2, FDN1}},
+{ "fdiv", 0xf97400, 0xfffc00, 0, FMT_D6, AM33_2, {FSM1, FSM0}},
+{ "fdiv", 0xf9f400, 0xfffc11, 0, FMT_D6, AM33_2, {FDM1, FDM0}},
+{ "fdiv", 0xfe740000, 0xfffc0000, 0, FMT_D9, AM33_2, {IMM32_HIGH8, FSM3, FSM2}},
+
+{ "fmadd", 0xfb800000, 0xfffc0000, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1, FSACC}},
+{ "fmsub", 0xfb840000, 0xfffc0000, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1, FSACC}},
+{ "fnmadd", 0xfb900000, 0xfffc0000, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1, FSACC}},
+{ "fnmsub", 0xfb940000, 0xfffc0000, 0, FMT_D10,AM33_2, {FSN3, FSN2, FSN1, FSACC}},
/* UDF instructions. */
{ "udf00", 0xf600, 0xfff0, 0, FMT_D0, 0, {DM1, DN0}},
Index: gas/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2000-05-25 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (mn10300_insert_operand): Negate negative
accumulator's shift.
2000-05-08 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_relax_table, md_convert_frag,
md_assemble, md_estimate_size_before_relax): Handle fbCC.
2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (HAVE_AM33): Redefine in terms of
HAVE_AM33_2.
2000-04-03 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_pseudo_table): Use AM33_2 constant.
(HAVE_AM33): Match AM33_2 too.
(HAVE_AM33_2): New macro.
(md_assemble): Use it. Match 2.0 registers only if HAVE_AM33_2.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* config/tc-mn10300.c (md_pseudo_table): Added `am33_2'.
(float_registers, double_registers): New variables.
(float_register_name, double_register_name): New functions.
(md_assemble): Recognize FP registers. Implement FMT_D3.
(mn10300_insert_operand): Support FP registers.
Index: gas/config/tc-mn10300.c
===================================================================
RCS file: /cvs/uberbaum/gas/config/tc-mn10300.c,v
retrieving revision 1.42
diff -u -p -r1.42 tc-mn10300.c
--- gas/config/tc-mn10300.c 21 May 2003 12:07:55 -0000 1.42
+++ gas/config/tc-mn10300.c 9 Jul 2003 22:56:52 -0000
@@ -78,6 +78,11 @@ const relax_typeS md_relax_table[] = {
{0x7fff, -0x8000, 3, 12},
{0x7fffffff, -0x80000000, 5, 0},
+ /* fbCC relaxing */
+ {0x7f, -0x80, 3, 14},
+ {0x7fff, -0x8000, 6, 15},
+ {0x7fffffff, -0x80000000, 8, 0},
+
};
/* Local functions. */
@@ -127,11 +132,13 @@ const pseudo_typeS md_pseudo_table[] =
{
{ "am30", set_arch_mach, AM30 },
{ "am33", set_arch_mach, AM33 },
+ { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
{ "mn10300", set_arch_mach, MN103 },
{NULL, 0, 0}
};
-#define HAVE_AM33 (current_machine == AM33)
+#define HAVE_AM33_2 (current_machine == AM33_2)
+#define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
#define HAVE_AM30 (current_machine == AM30)
/* Opcode hash table. */
@@ -251,6 +258,69 @@ static const struct reg_name other_regis
#define OTHER_REG_NAME_CNT \
(sizeof (other_registers) / sizeof (struct reg_name))
+static const struct reg_name float_registers[] =
+{
+ { "fs0", 0 },
+ { "fs1", 1 },
+ { "fs10", 10 },
+ { "fs11", 11 },
+ { "fs12", 12 },
+ { "fs13", 13 },
+ { "fs14", 14 },
+ { "fs15", 15 },
+ { "fs16", 16 },
+ { "fs17", 17 },
+ { "fs18", 18 },
+ { "fs19", 19 },
+ { "fs2", 2 },
+ { "fs20", 20 },
+ { "fs21", 21 },
+ { "fs22", 22 },
+ { "fs23", 23 },
+ { "fs24", 24 },
+ { "fs25", 25 },
+ { "fs26", 26 },
+ { "fs27", 27 },
+ { "fs28", 28 },
+ { "fs29", 29 },
+ { "fs3", 3 },
+ { "fs30", 30 },
+ { "fs31", 31 },
+ { "fs4", 4 },
+ { "fs5", 5 },
+ { "fs6", 6 },
+ { "fs7", 7 },
+ { "fs8", 8 },
+ { "fs9", 9 },
+};
+
+#define FLOAT_REG_NAME_CNT \
+ (sizeof (float_registers) / sizeof (struct reg_name))
+
+static const struct reg_name double_registers[] =
+{
+ { "fd0", 0 },
+ { "fd10", 10 },
+ { "fd12", 12 },
+ { "fd14", 14 },
+ { "fd16", 16 },
+ { "fd18", 18 },
+ { "fd2", 2 },
+ { "fd20", 20 },
+ { "fd22", 22 },
+ { "fd24", 24 },
+ { "fd26", 26 },
+ { "fd28", 28 },
+ { "fd30", 30 },
+ { "fd4", 4 },
+ { "fd6", 6 },
+ { "fd8", 8 },
+};
+
+#define DOUBLE_REG_NAME_CNT \
+ (sizeof (double_registers) / sizeof (struct reg_name))
+
+
/* reg_name_search does a binary search of the given register table
to see if "name" is a valid regiter name. Returns the register
number from the array on success, or -1 on failure. */
@@ -518,6 +588,101 @@ other_register_name (expressionP)
return FALSE;
}
+static bfd_boolean double_register_name PARAMS ((expressionS *));
+static bfd_boolean float_register_name PARAMS ((expressionS *));
+
+/* Summary of float_register_name:
+
+ in: Input_line_pointer points to 1st char of operand.
+
+ out: A expressionS.
+ The operand may have been a register: in this case, X_op == O_register,
+ X_add_number is set to the register number, and truth is returned.
+ Input_line_pointer->(next non-blank) char after operand, or is in
+ its original state. */
+
+static bfd_boolean
+float_register_name (expressionP)
+ expressionS *expressionP;
+{
+ int reg_number;
+ char *name;
+ char *start;
+ char c;
+
+ /* Find the spelling of the operand. */
+ start = name = input_line_pointer;
+
+ c = get_symbol_end ();
+ reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
+
+ /* Put back the delimiting char. */
+ * input_line_pointer = c;
+
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
+ {
+ expressionP->X_op = O_register;
+ expressionP->X_add_number = reg_number;
+
+ /* Make the rest nice. */
+ expressionP->X_add_symbol = NULL;
+ expressionP->X_op_symbol = NULL;
+
+ return TRUE;
+ }
+
+ /* Reset the line as if we had not done anything. */
+ input_line_pointer = start;
+ return FALSE;
+}
+
+/* Summary of double_register_name:
+
+ in: Input_line_pointer points to 1st char of operand.
+
+ out: A expressionS.
+ The operand may have been a register: in this case, X_op == O_register,
+ X_add_number is set to the register number, and truth is returned.
+ Input_line_pointer->(next non-blank) char after operand, or is in
+ its original state. */
+
+static bfd_boolean
+double_register_name (expressionP)
+ expressionS *expressionP;
+{
+ int reg_number;
+ char *name;
+ char *start;
+ char c;
+
+ /* Find the spelling of the operand. */
+ start = name = input_line_pointer;
+
+ c = get_symbol_end ();
+ reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
+
+ /* Put back the delimiting char. */
+ * input_line_pointer = c;
+
+ /* Look to see if it's in the register table. */
+ if (reg_number >= 0)
+ {
+ expressionP->X_op = O_register;
+ expressionP->X_add_number = reg_number;
+
+ /* Make the rest nice. */
+ expressionP->X_add_symbol = NULL;
+ expressionP->X_op_symbol = NULL;
+
+ return TRUE;
+ }
+
+ /* Reset the line as if we had not done anything. */
+ input_line_pointer = start;
+ return FALSE;
+}
+
void
md_show_usage (stream)
FILE *stream;
@@ -865,6 +1030,151 @@ md_convert_frag (abfd, sec, fragP)
fragP->fr_var = 0;
fragP->fr_fix += 5;
}
+ else if (fragP->fr_subtype == 13)
+ {
+ fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
+ fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
+ fragP->fr_var = 0;
+ fragP->fr_fix += 3;
+ }
+ else if (fragP->fr_subtype == 14)
+ {
+ /* Reverse the condition of the first branch. */
+ int offset = fragP->fr_fix;
+ int opcode = fragP->fr_literal[offset + 1] & 0xff;
+
+ switch (opcode)
+ {
+ case 0xd0:
+ opcode = 0xd1;
+ break;
+ case 0xd1:
+ opcode = 0xd0;
+ break;
+ case 0xd2:
+ opcode = 0xdc;
+ break;
+ case 0xd3:
+ opcode = 0xdb;
+ break;
+ case 0xd4:
+ opcode = 0xda;
+ break;
+ case 0xd5:
+ opcode = 0xd9;
+ break;
+ case 0xd6:
+ opcode = 0xd8;
+ break;
+ case 0xd7:
+ opcode = 0xdd;
+ break;
+ case 0xd8:
+ opcode = 0xd6;
+ break;
+ case 0xd9:
+ opcode = 0xd5;
+ break;
+ case 0xda:
+ opcode = 0xd4;
+ break;
+ case 0xdb:
+ opcode = 0xd3;
+ break;
+ case 0xdc:
+ opcode = 0xd2;
+ break;
+ case 0xdd:
+ opcode = 0xd7;
+ break;
+ default:
+ abort ();
+ }
+ fragP->fr_literal[offset + 1] = opcode;
+
+ /* Create a fixup for the reversed conditional branch. */
+ sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
+ fix_new (fragP, fragP->fr_fix + 2, 1,
+ symbol_new (buf, sec, 0, fragP->fr_next),
+ fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
+
+ /* Now create the unconditional branch + fixup to the
+ final target. */
+ fragP->fr_literal[offset + 3] = 0xcc;
+ fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
+ fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
+ fragP->fr_var = 0;
+ fragP->fr_fix += 6;
+ }
+ else if (fragP->fr_subtype == 15)
+ {
+ /* Reverse the condition of the first branch. */
+ int offset = fragP->fr_fix;
+ int opcode = fragP->fr_literal[offset + 1] & 0xff;
+
+ switch (opcode)
+ {
+ case 0xd0:
+ opcode = 0xd1;
+ break;
+ case 0xd1:
+ opcode = 0xd0;
+ break;
+ case 0xd2:
+ opcode = 0xdc;
+ break;
+ case 0xd3:
+ opcode = 0xdb;
+ break;
+ case 0xd4:
+ opcode = 0xda;
+ break;
+ case 0xd5:
+ opcode = 0xd9;
+ break;
+ case 0xd6:
+ opcode = 0xd8;
+ break;
+ case 0xd7:
+ opcode = 0xdd;
+ break;
+ case 0xd8:
+ opcode = 0xd6;
+ break;
+ case 0xd9:
+ opcode = 0xd5;
+ break;
+ case 0xda:
+ opcode = 0xd4;
+ break;
+ case 0xdb:
+ opcode = 0xd3;
+ break;
+ case 0xdc:
+ opcode = 0xd2;
+ break;
+ case 0xdd:
+ opcode = 0xd7;
+ break;
+ default:
+ abort ();
+ }
+ fragP->fr_literal[offset + 1] = opcode;
+
+ /* Create a fixup for the reversed conditional branch. */
+ sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
+ fix_new (fragP, fragP->fr_fix + 2, 1,
+ symbol_new (buf, sec, 0, fragP->fr_next),
+ fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
+
+ /* Now create the unconditional branch + fixup to the
+ final target. */
+ fragP->fr_literal[offset + 3] = 0xdc;
+ fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
+ fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
+ fragP->fr_var = 0;
+ fragP->fr_fix += 8;
+ }
else
abort ();
}
@@ -965,6 +1275,7 @@ md_assemble (str)
/* If the instruction is not available on the current machine
then it can not possibly match. */
if (opcode->machine
+ && !(opcode->machine == AM33_2 && HAVE_AM33_2)
&& !(opcode->machine == AM33 && HAVE_AM33)
&& !(opcode->machine == AM30 && HAVE_AM30))
goto error;
@@ -1059,6 +1370,39 @@ md_assemble (str)
goto error;
}
}
+ else if (operand->flags & MN10300_OPERAND_FSREG)
+ {
+ if (!float_register_name (&ex))
+ {
+ input_line_pointer = hold;
+ str = hold;
+ goto error;
+ }
+ }
+ else if (operand->flags & MN10300_OPERAND_FDREG)
+ {
+ if (!double_register_name (&ex))
+ {
+ input_line_pointer = hold;
+ str = hold;
+ goto error;
+ }
+ }
+ else if (operand->flags & MN10300_OPERAND_FPCR)
+ {
+ char *start = input_line_pointer;
+ char c = get_symbol_end ();
+
+ if (strcasecmp (start, "fpcr") != 0)
+ {
+ *input_line_pointer = c;
+ input_line_pointer = hold;
+ str = hold;
+ goto error;
+ }
+ *input_line_pointer = c;
+ goto keep_going;
+ }
else if (operand->flags & MN10300_OPERAND_USP)
{
char *start = input_line_pointer;
@@ -1298,6 +1642,18 @@ md_assemble (str)
str = hold;
goto error;
}
+ else if (HAVE_AM33_2 && float_register_name (&ex))
+ {
+ input_line_pointer = hold;
+ str = hold;
+ goto error;
+ }
+ else if (HAVE_AM33_2 && double_register_name (&ex))
+ {
+ input_line_pointer = hold;
+ str = hold;
+ goto error;
+ }
else if (*str == ')' || *str == '(')
{
input_line_pointer = hold;
@@ -1324,6 +1680,8 @@ md_assemble (str)
mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
if (HAVE_AM33)
mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
+ if (HAVE_AM33_2)
+ mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
if ((operand->flags & mask) == 0)
{
input_line_pointer = hold;
@@ -1491,6 +1849,9 @@ keep_going:
if (opcode->format == FMT_D2)
size = 4;
+ if (opcode->format == FMT_D3)
+ size = 5;
+
if (opcode->format == FMT_D4)
size = 6;
@@ -1529,6 +1890,8 @@ keep_going:
/* jmp */
else if (size == 3 && opcode->opcode == 0xcc0000)
type = 10;
+ else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
+ type = 13;
/* bCC (uncommon cases) */
else
type = 3;
@@ -1635,6 +1998,12 @@ keep_going:
is really two 8bit immediates. */
number_to_chars_bigendian (f, insn, 4);
}
+ else if (opcode->format == FMT_D3)
+ {
+ number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
+ number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
+ number_to_chars_bigendian (f + 4, extension & 0xff, 1);
+ }
else if (opcode->format == FMT_D4)
{
unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
@@ -1897,6 +2266,8 @@ md_estimate_size_before_relax (fragp, se
|| seg != S_GET_SEGMENT (fragp->fr_symbol)))
fragp->fr_subtype = 12;
+ if (fragp->fr_subtype == 13)
+ return 3;
if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
abort ();
@@ -2074,6 +2445,51 @@ mn10300_insert_operand (insnp, extension
*insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
*extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
<< operand->shift);
+ }
+ else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
+ {
+ /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
+ explanation of these variables. Note that FMT-implied shifts
+ are not taken into account for FP registers. */
+ unsigned long mask_low, mask_high;
+ int shl_low, shr_high, shl_high;
+
+ switch (operand->bits)
+ {
+ case 5:
+ /* Handle regular FP registers. */
+ if (operand->shift >= 0)
+ {
+ /* This is an `m' register. */
+ shl_low = operand->shift;
+ shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
+ }
+ else
+ {
+ /* This is an `n' register. */
+ shl_low = -operand->shift;
+ shl_high = shl_low / 4;
+ }
+
+ mask_low = 0x0f;
+ mask_high = 0x10;
+ shr_high = 4;
+ break;
+
+ case 3:
+ /* Handle accumulators. */
+ shl_low = -operand->shift;
+ shl_high = 0;
+ mask_low = 0x03;
+ mask_high = 0x04;
+ shr_high = 2;
+ break;
+
+ default:
+ abort ();
+ }
+ *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
+ | ((val & mask_low) << shl_low));
}
else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
{
Index: gas/testsuite/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
2002-02-20 Alexandre Oliva <aoliva@redhat.com>
* gas/mn10300/am33-2.c (d8pcsec): PC-relative relocations within
text sections don't decay to section+offset.
* gas/mn10300/am33-2.d: Rebuilt.
2000-08-15 Eric Christopher <echristo@cygnus.com>
* gas/mn10300/am33-2.c (d8pcsec): New Function
(condjmp): Adjust testcase for TC_LINKRELAX_FIXUP
functionality.
* gas/mn10300/am33-2.d: Regenerate
2000-05-24 Alexandre Oliva <aoliva@cygnus.com>
* gas/mn10300/am33-2.c (d8pcoff): Likewise.
* gas/mn10300/am33-2.d: Rebuilt.
2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
* gas/mn10300/am33-2.c (main): Changed `.am332' to `.am33_2'.
Replaced `AM33 2.0' with `AM33/2.0'.
* gas/mn10300/am33-2.d, gas/mn10300/am33-2.s: Rebuilt.
2000-03-31 Alexandre Oliva <aoliva@cygnus.com>
* gas/mn10300/am33-2.c: New file, that generated...
* gas/mn10300/am33-2.s, gas/mn10300/am33-2.d: New files.
* gas/mn10300/basic.exp: Test am33-2.
Index: gas/testsuite/gas/mn10300/am33-2.c
===================================================================
RCS file: gas/testsuite/gas/mn10300/am33-2.c
diff -N gas/testsuite/gas/mn10300/am33-2.c
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/mn10300/am33-2.c 9 Jul 2003 22:57:04 -0000
@@ -0,0 +1,745 @@
+/* Copyright (C) 2000, 2002 Free Software Foundation
+ * Contributed by Alexandre Oliva <aoliva@redhat.com>
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/* Generator of tests for insns introduced in AM33 2.0. */
+
+#define INSN_REPEAT 11
+
+/* See the following file for usage and documentation. */
+#include "../all/test-gen.c"
+
+/* These are the AM33 registers. */
+const char *am33_regs[] = {
+ /* These are the canonical names, i.e., those printed by the
+ * disassembler. */
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "a0", "a1", "a2", "a3", "d0", "d1", "d2", "d3",
+ /* These are aliases that the assembler should also recognize. */
+ "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
+};
+
+/* Signed constants of the given sizes. */
+#define d8(shift) signed_constant( 8, shift, 1)
+#define d16(shift) signed_constant(16, shift, 1)
+#define d24(shift) signed_constant(24, shift, 1)
+#define d32(shift) signed_constant(32, shift, 1)
+#define u8(shift) unsigned_constant( 8, shift, 1)
+#define u24(shift) unsigned_constant(24, shift, 1)
+#define a16(shift) absolute_address(16, shift, 1)
+
+/* Emit an AM33 register shifted by these many words. */
+#define amreg(shift) reg_r (am33_regs, shift, 15, mk_get_bits (5u))
+#define spreg literal ("sp")
+#define fcreg literal ("fpcr")
+
+/* Emit an AM33-2 FP single-precision register, with the 4 least
+ * significant bits shifted by shiftlow and the most significant bit
+ * shifted by shifthigh. */
+int
+freg (func_arg *arg, insn_data *data)
+#define freg(shiftlow, shifthigh) { freg, { i1: shiftlow, i2: shifthigh } }
+{
+ unsigned val = get_bits (5u);
+
+ data->as_in = data->dis_out = (char*)malloc (3 + ulen (val, 10));
+ sprintf (data->as_in, "fs%u", val);
+ data->bits = val;
+ data->bits = ((data->bits & 15) << arg->i1) | ((data->bits >> 4) << arg->i2);
+
+ return 0;
+}
+
+/* Emit an AM33-2 FP single-precision register in the ``accumulator''
+ * range, with the 2 least significant bits shifted by shiftlow and
+ * the most significant bit shifted by shifthigh. */
+int
+areg (func_arg *arg, insn_data *data)
+#define areg(shiftlow, shifthigh) { areg, { i1: shiftlow, i2: shifthigh } }
+{
+ unsigned val = get_bits (3u);
+
+ data->as_in = data->dis_out = (char*)malloc (4);
+ sprintf (data->as_in, "fs%u", val);
+ data->bits = val;
+ data->bits = ((data->bits & 3) << arg->i1) | ((data->bits >> 2) << arg->i2);
+
+ return 0;
+}
+
+/* Emit an AM33-2 FP double-precision register, with the 4 least
+ * significant bits shifted by shiftlow and the most significant bit
+ * shifted by shifthigh. */
+int
+dreg (func_arg *arg, insn_data *data)
+#define dreg(shiftlow, shifthigh) { dreg, { i1: shiftlow, i2: shifthigh } }
+{
+ unsigned val = 2 * get_bits (4u);
+
+ data->as_in = data->dis_out = (char*)malloc (3 + ulen (val, 10));
+ sprintf (data->as_in, "fd%u", val);
+ data->bits = val;
+ data->bits = ((data->bits & 15) << arg->i1) | ((data->bits >> 4) << arg->i2);
+
+ return 0;
+}
+
+/* Emit a signed 8-bit PC-relative offset from the current insn to the
+ * last emitted label. */
+int
+d8pcoff (func_arg *arg, insn_data *data)
+#define d8pcoff(shift) { d8pcoff, { p1: shift } }
+{
+ int diff = insn_size - arg->i1/8 - 1;
+ int displacement = current_offset - last_label_offset;
+ char *current_address = malloc (strlen (last_label_name) + 4
+ + ulen (displacement, 16) + 1);
+
+ /* Make sure we're not too far from the target. */
+ if (displacement > 128)
+ abort ();
+
+ data->as_in = strdup (last_label_name);
+
+ /* Calculate the address that will be printed by the disassembler as
+ the target of the jump. Since it won't take relocations into
+ account, it will be the insn's own address. */
+ if (current_offset == last_label_offset)
+ strcpy (current_address, last_label_name);
+ else
+ sprintf (current_address, "%s\\+0x%x", last_label_name, displacement);
+
+ /* Compute the complete label, including the relocation message
+ printed as an additional message. The relocation will point us
+ to the intended target label plus an offset equal to the offset
+ of the displacement within the current insn. We do not account
+ for the case in which this displacement is zero, since it doesn't
+ come up on this platform. */
+ data->dis_out = malloc (8 + 2 + strlen (current_address) + 2
+ + 3 + ulen (current_offset + diff, 16) + 19
+ + strlen (last_label_name) + 4
+ + ulen (diff, 16) + 1);
+ sprintf (data->dis_out, "0*%x <%s>\n"
+ "\t\t\t%x: R_MN10300_PCREL8\t%s\\+0x%x",
+ current_offset, current_address,
+ current_offset + diff, last_label_name, diff);
+
+ free (current_address);
+
+ return 0;
+}
+
+/* Emit a signed 8-bit PC-relative offset from the current insn to the
+ * current section. */
+int
+d8pcsec (func_arg *arg, insn_data *data)
+#define d8pcsec(shift) { d8pcsec, { p1: shift } }
+{
+ int diff = insn_size - arg->i1/8 - 1;
+ int displacement = current_offset - last_label_offset;
+ char *current_address = malloc (strlen (last_label_name) + 4
+ + ulen (displacement, 16) + 1);
+
+ /* Make sure we're not too far from the target. */
+ if (displacement > 128)
+ abort ();
+
+ data->as_in = strdup (last_label_name);
+
+ /* Calculate the address that will be printed by the disassembler as
+ the target of the jump. Since it won't take relocations into
+ account, it will be the insn's own address. */
+
+ if (current_offset == last_label_offset)
+ strcpy (current_address, last_label_name);
+ else
+ sprintf (current_address, "%s\\+0x%x", last_label_name, displacement);
+
+
+ /* Compute the complete label, including the relocation message
+ printed as an additional message. The relocation will point us
+ to the intended target label plus an offset equal to the offset
+ of the displacement within the current insn. We do not account
+ for the case in which this displacement is zero, since it doesn't
+ come up on this platform. */
+ data->dis_out = malloc (8 + 2 + strlen (current_address) + 2
+ + 3 + ulen (current_offset + diff, 16) + 33);
+ sprintf (data->dis_out, "0*%x <%s>\n"
+ "\t\t\t%x: R_MN10300_PCREL8\tcondjmp\\+0x2",
+ current_offset, current_address,
+ current_offset + diff);
+
+ free (current_address);
+
+ return 0;
+}
+
+/* Convenience wrapper to define_insn. */
+#define def_am_insn(insname, variant, size, word, funcs...) \
+ define_insn(insname ## _ ## variant, \
+ insn_size_bits (insname, size, \
+ ((unsigned long long)word) << 8*(size-2)), \
+ tab, \
+ ## funcs)
+#define am_insn(insname, variant) insn (insname ## _ ## variant)
+
+#define def_bit_insn(insname, word) \
+ def_am_insn (insname, i8a16, 5, word, \
+ u8(0), comma, lparen, a16 (8), rparen, tick_random);
+#define bit_insn(insname) insn (insname ## _ ## i8a16)
+
+/* Data cache pre-fetch insns. */
+def_am_insn (dcpf, r, 3, 0xf9a6, lparen, amreg (4), rparen);
+def_am_insn (dcpf, sp, 3, 0xf9a7, lparen, spreg, rparen);
+def_am_insn (dcpf, rr, 4, 0xfba6,
+ lparen, amreg(12), comma, amreg (8), rparen, tick_random);
+def_am_insn (dcpf, d8r, 4, 0xfba7,
+ lparen, d8 (0), comma, amreg (12), rparen, tick_random);
+def_am_insn (dcpf, d24r, 6, 0xfda7,
+ lparen, d24(0), comma, amreg (28), rparen, tick_random);
+def_am_insn (dcpf, d32r, 7, 0xfe46,
+ lparen, d32(0), comma, amreg (36), rparen, tick_random);
+
+/* Define the group of data cache pre-fetch insns. */
+func *dcpf_insns[] = {
+ am_insn (dcpf, r),
+ am_insn (dcpf, sp),
+ am_insn (dcpf, rr),
+ am_insn (dcpf, d8r),
+ am_insn (dcpf, d24r),
+ am_insn (dcpf, d32r),
+ 0
+};
+
+/* Bit operations. */
+def_bit_insn (bset, 0xfe80);
+def_bit_insn (bclr, 0xfe81);
+def_bit_insn (btst, 0xfe82);
+
+/* Define the group of bit insns. */
+func *bit_insns[] = {
+ bit_insn (bset),
+ bit_insn (bclr),
+ bit_insn (btst),
+ 0
+};
+
+/* Define the single-precision FP move insns. */
+def_am_insn (fmov, irfs, 3, 0xf920,
+ lparen, amreg (4), rparen, comma,
+ freg (0, 8), tick_random);
+def_am_insn (fmov, rpfs, 3, 0xf922,
+ lparen, amreg (4), plus, rparen, comma,
+ freg (0, 8), tick_random);
+def_am_insn (fmov, spfs, 3, 0xf924,
+ lparen, spreg, rparen, comma, freg (0, 8));
+def_am_insn (fmov, vrfs, 3, 0xf926,
+ amreg (4), comma, freg (0, 8), tick_random);
+def_am_insn (fmov, fsir, 3, 0xf930,
+ freg (4, 9), comma, lparen, amreg (0), rparen, tick_random);
+def_am_insn (fmov, fsrp, 3, 0xf931,
+ freg (4, 9), comma, lparen, amreg (0), plus, rparen, tick_random);
+def_am_insn (fmov, fssp, 3, 0xf934,
+ freg (4, 9), comma, lparen, spreg, rparen);
+def_am_insn (fmov, fsvr, 3, 0xf935,
+ freg (4, 9), comma, amreg (0), tick_random);
+def_am_insn (fmov, fsfs, 3, 0xf940,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fmov, d8rfs, 4, 0xfb20,
+ lparen, d8 (0), comma, amreg (12), rparen, comma,
+ freg (8, 16));
+def_am_insn (fmov, rpi8fs, 4, 0xfb22,
+ lparen, amreg (12), plus, comma, d8 (0), rparen, comma,
+ freg (8, 16));
+def_am_insn (fmov, d8spfs, 4, 0xfb24,
+ lparen, u8 (0), comma, spreg, rparen, comma, freg (8, 16),
+ tick_random);
+def_am_insn (fmov, irrfs, 4, 0xfb27,
+ lparen, amreg (12), comma, amreg (8), rparen, comma,
+ freg (4, 1));
+def_am_insn (fmov, fsd8r, 4, 0xfb30,
+ freg (12, 17), comma, lparen, d8 (0), comma, amreg (8), rparen);
+def_am_insn (fmov, fsrpi8, 4, 0xfb31,
+ freg (12, 17), comma,
+ lparen, amreg (8), plus, comma, d8 (0), rparen);
+def_am_insn (fmov, fsd8sp, 4, 0xfb34,
+ freg (12, 17), comma,
+ lparen, u8 (0), comma, spreg, rparen, tick_random);
+def_am_insn (fmov, fsirr, 4, 0xfb37,
+ freg (4, 1), comma,
+ lparen, amreg (12), comma, amreg (8), rparen);
+def_am_insn (fmov, d24rfs, 6, 0xfd20,
+ lparen, d24 (0), comma, amreg (28), rparen, comma, freg (24, 32));
+def_am_insn (fmov, rpi24fs, 6, 0xfd22,
+ lparen, amreg (28), plus, comma, d24 (0), rparen, comma,
+ freg (24, 32));
+def_am_insn (fmov, d24spfs, 6, 0xfd24,
+ lparen, u24 (0), comma, spreg, rparen, comma,
+ freg (24, 32), tick_random);
+def_am_insn (fmov, fsd24r, 6, 0xfd30,
+ freg (28, 33), comma, lparen, d24 (0), comma, amreg (24), rparen);
+def_am_insn (fmov, fsrpi24, 6, 0xfd31,
+ freg (28, 33), comma,
+ lparen, amreg (24), plus, comma, d24 (0), rparen);
+def_am_insn (fmov, fsd24sp, 6, 0xfd34,
+ freg (28, 33), comma,
+ lparen, u24 (0), comma, spreg, rparen, tick_random);
+def_am_insn (fmov, d32rfs, 7, 0xfe20,
+ lparen, d32 (0), comma, amreg (36), rparen, comma, freg (32, 40));
+def_am_insn (fmov, rpi32fs, 7, 0xfe22,
+ lparen, amreg (36), plus, comma, d32 (0), rparen, comma,
+ freg (32, 40));
+def_am_insn (fmov, d32spfs, 7, 0xfe24,
+ lparen, d32 (0), comma, spreg, rparen, comma,
+ freg (32, 40), tick_random);
+def_am_insn (fmov, i32fs, 7, 0xfe26,
+ d32 (0), comma, freg (32, 40), tick_random);
+def_am_insn (fmov, fsd32r, 7, 0xfe30,
+ freg (36, 41), comma, lparen, d32 (0), comma, amreg (32), rparen);
+def_am_insn (fmov, fsrpi32, 7, 0xfe31,
+ freg (36, 41), comma,
+ lparen, amreg (32), plus, comma, d32 (0), rparen);
+def_am_insn (fmov, fsd32sp, 7, 0xfe34,
+ freg (36, 41), comma,
+ lparen, d32 (0), comma, spreg, rparen, tick_random);
+
+/* Define the group of single-precision FP move insns. */
+func *fmovs_insns[] = {
+ am_insn (fmov, irfs),
+ am_insn (fmov, rpfs),
+ am_insn (fmov, spfs),
+ am_insn (fmov, vrfs),
+ am_insn (fmov, fsir),
+ am_insn (fmov, fsrp),
+ am_insn (fmov, fssp),
+ am_insn (fmov, fsvr),
+ am_insn (fmov, fsfs),
+ am_insn (fmov, d8rfs),
+ am_insn (fmov, rpi8fs),
+ am_insn (fmov, d8spfs),
+ am_insn (fmov, irrfs),
+ am_insn (fmov, fsd8r),
+ am_insn (fmov, fsrpi8),
+ am_insn (fmov, fsd8sp),
+ am_insn (fmov, fsirr),
+ am_insn (fmov, d24rfs),
+ am_insn (fmov, rpi24fs),
+ am_insn (fmov, d24spfs),
+ am_insn (fmov, fsd24r),
+ am_insn (fmov, fsrpi24),
+ am_insn (fmov, fsd24sp),
+ am_insn (fmov, d32rfs),
+ am_insn (fmov, rpi32fs),
+ am_insn (fmov, d32spfs),
+ am_insn (fmov, i32fs),
+ am_insn (fmov, fsd32r),
+ am_insn (fmov, fsrpi32),
+ am_insn (fmov, fsd32sp),
+ 0
+};
+
+/* Define the double-precision FP move insns. */
+def_am_insn (fmov, irfd, 3, 0xf9a0,
+ lparen, amreg (4), rparen, comma, dreg (0, 8), tick_random);
+def_am_insn (fmov, rpfd, 3, 0xf9a2,
+ lparen, amreg (4), plus, rparen, comma, dreg (0, 8), tick_random);
+def_am_insn (fmov, spfd, 3, 0xf9a4,
+ lparen, spreg, rparen, comma, dreg (0, 8));
+def_am_insn (fmov, fdir, 3, 0xf9b0,
+ dreg (4, 9), comma, lparen, amreg (0), rparen, tick_random);
+def_am_insn (fmov, fdrp, 3, 0xf9b1,
+ dreg (4, 9), comma, lparen, amreg (0), plus, rparen, tick_random);
+def_am_insn (fmov, fdsp, 3, 0xf9b4,
+ dreg (4, 9), comma, lparen, spreg, rparen);
+def_am_insn (fmov, fdfd, 3, 0xf9c0,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fmov, irrfd, 4, 0xfb47,
+ lparen, amreg (12), comma, amreg (8), rparen, comma, dreg (4, 1));
+def_am_insn (fmov, fdirr, 4, 0xfb57,
+ dreg (4, 1), comma, lparen, amreg (12), comma, amreg (8), rparen);
+def_am_insn (fmov, d8rfd, 4, 0xfba0,
+ lparen, d8 (0), comma, amreg (12), rparen, comma, dreg (8, 16));
+def_am_insn (fmov, rpi8fd, 4, 0xfba2,
+ lparen, amreg (12), plus, comma, d8 (0), rparen, comma,
+ dreg (8, 16));
+def_am_insn (fmov, d8spfd, 4, 0xfba4,
+ lparen, u8 (0), comma, spreg, rparen, comma,
+ dreg (8, 16), tick_random);
+def_am_insn (fmov, fdd8r, 4, 0xfbb0,
+ dreg (12, 17), comma, lparen, d8 (0), comma, amreg (8), rparen);
+def_am_insn (fmov, fdrpi8, 4, 0xfbb1,
+ dreg (12, 17), comma,
+ lparen, amreg (8), plus, comma, d8 (0), rparen);
+def_am_insn (fmov, fdi8sp, 4, 0xfbb4,
+ dreg (12, 17), comma,
+ lparen, u8 (0), comma, spreg, rparen, tick_random);
+def_am_insn (fmov, d24rfd, 6, 0xfda0,
+ lparen, d24 (0), comma, amreg (28), rparen, comma, dreg (24, 32));
+def_am_insn (fmov, rpi24fd, 6, 0xfda2,
+ lparen, amreg (28), plus, comma, d24 (0), rparen, comma,
+ dreg (24, 32));
+def_am_insn (fmov, d24spfd, 6, 0xfda4,
+ lparen, u24 (0), comma, spreg, rparen, comma,
+ dreg (24, 32), tick_random);
+def_am_insn (fmov, fdd24r, 6, 0xfdb0,
+ dreg (28, 33), comma,
+ lparen, d24 (0), comma, amreg (24), rparen);
+def_am_insn (fmov, fdrpi24, 6, 0xfdb1,
+ dreg (28, 33), comma,
+ lparen, amreg (24), plus, comma, d24 (0), rparen);
+def_am_insn (fmov, fdd24sp, 6, 0xfdb4,
+ dreg (28, 33), comma,
+ lparen, u24 (0), comma, spreg, rparen, tick_random);
+def_am_insn (fmov, d32rfd, 7, 0xfe40,
+ lparen, d32 (0), comma, amreg (36), rparen, comma, dreg (32, 40));
+def_am_insn (fmov, rpi32fd, 7, 0xfe42,
+ lparen, amreg (36), plus, comma, d32 (0), rparen, comma,
+ dreg (32, 40));
+def_am_insn (fmov, d32spfd, 7, 0xfe44,
+ lparen, d32 (0), comma, spreg, rparen, comma,
+ dreg (32, 40), tick_random);
+def_am_insn (fmov, fdd32r, 7, 0xfe50,
+ dreg (36, 41), comma,
+ lparen, d32 (0), comma, amreg (32), rparen);
+def_am_insn (fmov, fdrpi32, 7, 0xfe51,
+ dreg (36, 41), comma,
+ lparen, amreg (32), plus, comma, d32 (0), rparen);
+def_am_insn (fmov, fdd32sp, 7, 0xfe54,
+ dreg (36, 41), comma,
+ lparen, d32 (0), comma, spreg, rparen, tick_random);
+
+/* Define the group of double-precision FP move insns. */
+func *fmovd_insns[] = {
+ am_insn (fmov, irfd),
+ am_insn (fmov, rpfd),
+ am_insn (fmov, spfd),
+ am_insn (fmov, fdir),
+ am_insn (fmov, fdrp),
+ am_insn (fmov, fdsp),
+ am_insn (fmov, fdfd),
+ am_insn (fmov, irrfd),
+ am_insn (fmov, fdirr),
+ am_insn (fmov, d8rfd),
+ am_insn (fmov, rpi8fd),
+ am_insn (fmov, d8spfd),
+ am_insn (fmov, fdd8r),
+ am_insn (fmov, fdrpi8),
+ am_insn (fmov, fdi8sp),
+ am_insn (fmov, d24rfd),
+ am_insn (fmov, rpi24fd),
+ am_insn (fmov, d24spfd),
+ am_insn (fmov, fdd24r),
+ am_insn (fmov, fdrpi24),
+ am_insn (fmov, fdd24sp),
+ am_insn (fmov, d32rfd),
+ am_insn (fmov, rpi32fd),
+ am_insn (fmov, d32spfd),
+ am_insn (fmov, fdd32r),
+ am_insn (fmov, fdrpi32),
+ am_insn (fmov, fdd32sp),
+ 0
+};
+
+/* Define fmov FPCR insns. */
+def_am_insn (fmov, vrfc, 3, 0xf9b5,
+ amreg (4), comma, fcreg);
+def_am_insn (fmov, fcvr, 3, 0xf9b7,
+ fcreg, comma, amreg (0));
+def_am_insn (fmov, i32fc, 6, 0xfdb5,
+ d32 (0), comma, fcreg);
+
+/* Define the group of FPCR move insns. */
+func *fmovc_insns[] = {
+ am_insn (fmov, vrfc),
+ am_insn (fmov, fcvr),
+ am_insn (fmov, i32fc),
+ 0
+};
+
+/* Define single-precision floating-point arithmetic insns. */
+def_am_insn (fabs, fs, 3, 0xf944, freg (0, 8));
+def_am_insn (fabs, fsfs, 4, 0xfb44,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (fneg, fs, 3, 0xf946, freg (0, 8));
+def_am_insn (fneg, fsfs, 4, 0xfb46,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (frsqrt, fs, 3, 0xf950, freg (0, 8));
+def_am_insn (frsqrt, fsfs, 4, 0xfb50,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (fsqrt, fs, 3, 0xf952, freg (0, 8));
+def_am_insn (fsqrt, fsfs, 4, 0xfb54,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (fcmp, fsfs, 3, 0xf954,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fcmp, i32fs, 7, 0xfe35,
+ d32 (0), comma, freg (36, 41), tick_random);
+def_am_insn (fadd, fsfs, 3, 0xf960,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fadd, fsfsfs, 4, 0xfb60,
+ freg (12, 3), comma, freg (8, 2), comma, freg (4, 1));
+def_am_insn (fadd, i32fsfs, 7, 0xfe60,
+ d32 (0), comma, freg (36, 41), comma, freg (32, 40));
+def_am_insn (fsub, fsfs, 3, 0xf964,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fsub, fsfsfs, 4, 0xfb64,
+ freg (12, 3), comma, freg (8, 2), comma, freg (4, 1));
+def_am_insn (fsub, i32fsfs, 7, 0xfe64,
+ d32 (0), comma, freg (36, 41), comma, freg (32, 40));
+def_am_insn (fmul, fsfs, 3, 0xf970,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fmul, fsfsfs, 4, 0xfb70,
+ freg (12, 3), comma, freg (8, 2), comma, freg (4, 1));
+def_am_insn (fmul, i32fsfs, 7, 0xfe70,
+ d32 (0), comma, freg (36, 41), comma, freg (32, 40));
+def_am_insn (fdiv, fsfs, 3, 0xf974,
+ freg (4, 9), comma, freg (0, 8), tick_random);
+def_am_insn (fdiv, fsfsfs, 4, 0xfb74,
+ freg (12, 3), comma, freg (8, 2), comma, freg (4, 1));
+def_am_insn (fdiv, i32fsfs, 7, 0xfe74,
+ d32 (0), comma, freg (36, 41), comma, freg (32, 40));
+
+/* Define the group of single-precision floating-point arithmetic insns. */
+func *sfparith_insns[] = {
+ am_insn (fabs, fs),
+ am_insn (fabs, fsfs),
+ am_insn (fneg, fs),
+ am_insn (fneg, fsfs),
+ am_insn (frsqrt, fs),
+ am_insn (frsqrt, fsfs),
+ am_insn (fsqrt, fs),
+ am_insn (fsqrt, fsfs),
+ am_insn (fcmp, fsfs),
+ am_insn (fcmp, i32fs),
+ am_insn (fadd, fsfs),
+ am_insn (fadd, fsfsfs),
+ am_insn (fadd, i32fsfs),
+ am_insn (fsub, fsfs),
+ am_insn (fsub, fsfsfs),
+ am_insn (fsub, i32fsfs),
+ am_insn (fmul, fsfs),
+ am_insn (fmul, fsfsfs),
+ am_insn (fmul, i32fsfs),
+ am_insn (fdiv, fsfs),
+ am_insn (fdiv, fsfsfs),
+ am_insn (fdiv, i32fsfs),
+ 0
+};
+
+/* Define floating-point accumulator arithmetic insns. */
+def_am_insn (fmadd, , 4, 0xfb80,
+ freg (12, 3), comma, freg (8, 2), comma,
+ freg (4, 1), comma, areg (16, 0), tick_random);
+def_am_insn (fmsub, , 4, 0xfb84,
+ freg (12, 3), comma, freg (8, 2), comma,
+ freg (4, 1), comma, areg (16, 0), tick_random);
+def_am_insn (fnmadd, , 4, 0xfb90,
+ freg (12, 3), comma, freg (8, 2), comma,
+ freg (4, 1), comma, areg (16, 0), tick_random);
+def_am_insn (fnmsub, , 4, 0xfb94,
+ freg (12, 3), comma, freg (8, 2), comma,
+ freg (4, 1), comma, areg (16, 0), tick_random);
+
+/* Define the group of floating-point accumulator arithmetic insns. */
+func *fpacc_insns[] = {
+ am_insn (fmadd, ),
+ am_insn (fmsub, ),
+ am_insn (fnmadd, ),
+ am_insn (fnmsub, ),
+ 0
+};
+
+/* Define double-precision floating-point arithmetic insns. */
+def_am_insn (fabs, fd, 3, 0xf9c4, dreg (0, 8));
+def_am_insn (fabs, fdfd, 4, 0xfbc4,
+ dreg (12, 3), comma, dreg (4, 1), tick_random);
+def_am_insn (fneg, fd, 3, 0xf9c6, dreg (0, 8));
+def_am_insn (fneg, fdfd, 4, 0xfbc6,
+ dreg (12, 3), comma, dreg (4, 1), tick_random);
+def_am_insn (frsqrt, fd, 3, 0xf9d0, dreg (0, 8));
+def_am_insn (frsqrt, fdfd, 4, 0xfbd0,
+ dreg (12, 3), comma, dreg (4, 1), tick_random);
+def_am_insn (fsqrt, fd, 3, 0xf9d2, dreg (0, 8));
+def_am_insn (fsqrt, fdfd, 4, 0xfbd4,
+ dreg (12, 3), comma, dreg (4, 1), tick_random);
+def_am_insn (fcmp, fdfd, 3, 0xf9d4,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fadd, fdfd, 3, 0xf9e0,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fadd, fdfdfd, 4, 0xfbe0,
+ dreg (12, 3), comma, dreg (8, 2), comma, dreg (4, 1));
+def_am_insn (fsub, fdfd, 3, 0xf9e4,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fsub, fdfdfd, 4, 0xfbe4,
+ dreg (12, 3), comma, dreg (8, 2), comma, dreg (4, 1));
+def_am_insn (fmul, fdfd, 3, 0xf9f0,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fmul, fdfdfd, 4, 0xfbf0,
+ dreg (12, 3), comma, dreg (8, 2), comma, dreg (4, 1));
+def_am_insn (fdiv, fdfd, 3, 0xf9f4,
+ dreg (4, 9), comma, dreg (0, 8), tick_random);
+def_am_insn (fdiv, fdfdfd, 4, 0xfbf4,
+ dreg (12, 3), comma, dreg (8, 2), comma, dreg (4, 1));
+
+/* Define the group of double-precision floating-point arithmetic insns. */
+func *dfparith_insns[] = {
+ am_insn (fabs, fd),
+ am_insn (fabs, fdfd),
+ am_insn (fneg, fd),
+ am_insn (fneg, fdfd),
+ am_insn (frsqrt, fd),
+ am_insn (frsqrt, fdfd),
+ am_insn (fsqrt, fd),
+ am_insn (fsqrt, fdfd),
+ am_insn (fcmp, fdfd),
+ am_insn (fadd, fdfd),
+ am_insn (fadd, fdfdfd),
+ am_insn (fsub, fdfd),
+ am_insn (fsub, fdfdfd),
+ am_insn (fmul, fdfd),
+ am_insn (fmul, fdfdfd),
+ am_insn (fdiv, fdfd),
+ am_insn (fdiv, fdfdfd),
+ 0
+};
+
+/* Define floating-point conversion insns. */
+def_am_insn (ftoi, fsfs, 4, 0xfb40,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (itof, fsfs, 4, 0xfb42,
+ freg (12, 3), comma, freg (4, 1), tick_random);
+def_am_insn (ftod, fsfd, 4, 0xfb52,
+ freg (12, 3), comma, dreg (4, 1), tick_random);
+def_am_insn (dtof, fdfs, 4, 0xfb56,
+ dreg (12, 3), comma, freg (4, 1), tick_random);
+
+/* Define the group of floating-point conversion insns. */
+func *fpconv_insns[] = {
+ am_insn (ftoi, fsfs),
+ am_insn (itof, fsfs),
+ am_insn (ftod, fsfd),
+ am_insn (dtof, fdfs),
+ 0
+};
+
+/* Define conditional jump insns. */
+def_am_insn (fbeq, , 3, 0xf8d0, d8pcsec (0));
+def_am_insn (fbne, , 3, 0xf8d1, d8pcsec (0));
+def_am_insn (fbgt, , 3, 0xf8d2, d8pcsec (0));
+def_am_insn (fbge, , 3, 0xf8d3, d8pcsec (0));
+def_am_insn (fblt, , 3, 0xf8d4, d8pcsec (0));
+def_am_insn (fble, , 3, 0xf8d5, d8pcsec (0));
+def_am_insn (fbuo, , 3, 0xf8d6, d8pcsec (0));
+def_am_insn (fblg, , 3, 0xf8d7, d8pcsec (0));
+def_am_insn (fbleg,, 3, 0xf8d8, d8pcsec (0));
+def_am_insn (fbug, , 3, 0xf8d9, d8pcsec (0));
+def_am_insn (fbuge,, 3, 0xf8da, d8pcsec (0));
+def_am_insn (fbul, , 3, 0xf8db, d8pcsec (0));
+def_am_insn (fbule,, 3, 0xf8dc, d8pcsec (0));
+def_am_insn (fbue, , 3, 0xf8dd, d8pcsec (0));
+def_am_insn (fleq, , 2, 0xf0d0, nothing);
+def_am_insn (flne, , 2, 0xf0d1, nothing);
+def_am_insn (flgt, , 2, 0xf0d2, nothing);
+def_am_insn (flge, , 2, 0xf0d3, nothing);
+def_am_insn (fllt, , 2, 0xf0d4, nothing);
+def_am_insn (flle, , 2, 0xf0d5, nothing);
+def_am_insn (fluo, , 2, 0xf0d6, nothing);
+def_am_insn (fllg, , 2, 0xf0d7, nothing);
+def_am_insn (flleg,, 2, 0xf0d8, nothing);
+def_am_insn (flug, , 2, 0xf0d9, nothing);
+def_am_insn (fluge,, 2, 0xf0da, nothing);
+def_am_insn (flul, , 2, 0xf0db, nothing);
+def_am_insn (flule,, 2, 0xf0dc, nothing);
+def_am_insn (flue, , 2, 0xf0dd, nothing);
+
+/* Define the group of conditional jump insns. */
+func *condjmp_insns[] = {
+ am_insn (fbeq, ),
+ am_insn (fbne, ),
+ am_insn (fbgt, ),
+ am_insn (fbge, ),
+ am_insn (fblt, ),
+ am_insn (fble, ),
+ am_insn (fbuo, ),
+ am_insn (fblg, ),
+ am_insn (fbleg, ),
+ am_insn (fbug, ),
+ am_insn (fbuge, ),
+ am_insn (fbul, ),
+ am_insn (fbule, ),
+ am_insn (fbue, ),
+ am_insn (fleq, ),
+ am_insn (flne, ),
+ am_insn (flgt, ),
+ am_insn (flge, ),
+ am_insn (fllt, ),
+ am_insn (flle, ),
+ am_insn (fluo, ),
+ am_insn (fllg, ),
+ am_insn (flleg, ),
+ am_insn (flug, ),
+ am_insn (fluge, ),
+ am_insn (flul, ),
+ am_insn (flule, ),
+ am_insn (flue, ),
+ 0
+};
+
+/* Define the set of all groups. */
+group_t
+groups[] = {
+ { "dcpf", dcpf_insns },
+ { "bit", bit_insns },
+ { "fmovs", fmovs_insns },
+ { "fmovd", fmovd_insns },
+ { "fmovc", fmovc_insns },
+ { "sfparith", sfparith_insns },
+ { "fpacc", fpacc_insns },
+ { "dfparith", dfparith_insns },
+ { "fpconv", fpconv_insns },
+ { "condjmp", condjmp_insns },
+ { 0 }
+};
+
+int
+main(int argc, char *argv[])
+{
+ FILE *as_in = stdout, *dis_out = stderr;
+
+ /* Check whether we're filtering insns. */
+ if (argc > 1)
+ skip_list = argv + 1;
+
+ /* Output assembler header. */
+ fputs ("\t.text\n"
+ "\t.am33_2\n",
+ as_in);
+ /* Output comments for the testsuite-driver and the initial
+ * disassembler output. */
+ fputs ("#objdump: -dr --prefix-address --show-raw-insn\n"
+ "#name: AM33/2.0\n"
+ "\n"
+ ".*: +file format.*elf32-mn10300.*\n"
+ "\n"
+ "Disassembly of section .text:\n",
+ dis_out);
+
+ /* Now emit all (selected) insns. */
+ output_groups (groups, as_in, dis_out);
+
+ exit (0);
+}
Index: gas/testsuite/gas/mn10300/am33-2.d
===================================================================
RCS file: gas/testsuite/gas/mn10300/am33-2.d
diff -N gas/testsuite/gas/mn10300/am33-2.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/mn10300/am33-2.d 9 Jul 2003 22:57:06 -0000
@@ -0,0 +1,1324 @@
+#objdump: -dr --prefix-address --show-raw-insn
+#name: AM33/2.0
+
+.*: +file format.*elf32-mn10300.*
+
+Disassembly of section .text:
+# dcpf:
+0*0 <dcpf> f9 ?a6 ?00 ? * dcpf \(r0\)
+0*3 <dcpf\+0x3> f9 ?a6 ?a0 ? * dcpf \(a2\)
+0*6 <dcpf\+0x6> f9 ?a6 ?d0 ? * dcpf \(d1\)
+0*9 <dcpf\+0x9> f9 ?a6 ?70 ? * dcpf \(r7\)
+0*c <dcpf\+0xc> f9 ?a6 ?40 ? * dcpf \(r4\)
+0*f <dcpf\+0xf> f9 ?a6 ?e0 ? * dcpf \(d2\)
+0*12 <dcpf\+0x12> f9 ?a6 ?10 ? * dcpf \(r1\)
+0*15 <dcpf\+0x15> f9 ?a6 ?b0 ? * dcpf \(a3\)
+0*18 <dcpf\+0x18> f9 ?a6 ?80 ? * dcpf \(a0\)
+0*1b <dcpf\+0x1b> f9 ?a6 ?20 ? * dcpf \(r2\)
+0*1e <dcpf\+0x1e> f9 ?a6 ?50 ? * dcpf \(r5\)
+0*21 <dcpf\+0x21> f9 ?a7 ?00 ? * dcpf \(sp\)
+0*24 <dcpf\+0x24> fb ?a6 ?fc ?00 ? * dcpf \(d3, ?d0\)
+0*28 <dcpf\+0x28> fb ?a6 ?93 ?00 ? * dcpf \(a1, ?r3\)
+0*2c <dcpf\+0x2c> fb ?a6 ?ad ?00 ? * dcpf \(a2, ?d1\)
+0*30 <dcpf\+0x30> fb ?a6 ?4e ?00 ? * dcpf \(r4, ?d2\)
+0*34 <dcpf\+0x34> fb ?a6 ?b8 ?00 ? * dcpf \(a3, ?a0\)
+0*38 <dcpf\+0x38> fb ?a6 ?5f ?00 ? * dcpf \(r5, ?d3\)
+0*3c <dcpf\+0x3c> fb ?a6 ?69 ?00 ? * dcpf \(r6, ?a1\)
+0*40 <dcpf\+0x40> fb ?a6 ?0a ?00 ? * dcpf \(r0, ?a2\)
+0*44 <dcpf\+0x44> fb ?a6 ?74 ?00 ? * dcpf \(r7, ?r4\)
+0*48 <dcpf\+0x48> fb ?a6 ?1b ?00 ? * dcpf \(r1, ?a3\)
+0*4c <dcpf\+0x4c> fb ?a6 ?25 ?00 ? * dcpf \(r2, ?r5\)
+0*50 <dcpf\+0x50> fb ?a7 ?60 ?68 ? * dcpf \(104, ?r6\)
+0*54 <dcpf\+0x54> fb ?a7 ?00 ?01 ? * dcpf \(1, ?r0\)
+0*58 <dcpf\+0x58> fb ?a7 ?70 ?80 ? * dcpf \(-128, ?r7\)
+0*5c <dcpf\+0x5c> fb ?a7 ?10 ?20 ? * dcpf \(32, ?r1\)
+0*60 <dcpf\+0x60> fb ?a7 ?20 ?49 ? * dcpf \(73, ?r2\)
+0*64 <dcpf\+0x64> fb ?a7 ?c0 ?21 ? * dcpf \(33, ?d0\)
+0*68 <dcpf\+0x68> fb ?a7 ?30 ?bb ? * dcpf \(-69, ?r3\)
+0*6c <dcpf\+0x6c> fb ?a7 ?d0 ?ff ? * dcpf \(-1, ?d1\)
+0*70 <dcpf\+0x70> fb ?a7 ?e0 ?e0 ? * dcpf \(-32, ?d2\)
+0*74 <dcpf\+0x74> fb ?a7 ?80 ?ec ? * dcpf \(-20, ?a0\)
+0*78 <dcpf\+0x78> fb ?a7 ?f0 ?a1 ? * dcpf \(-95, ?d3\)
+0*7c <dcpf\+0x7c> fd ?a7 ?90 ?43 ?65 ?87 ? * dcpf \(-7903933, ?a1\)
+0*82 <dcpf\+0x82> fd ?a7 ?a0 ?00 ?00 ?80 ? * dcpf \(-8388608, ?a2\)
+0*88 <dcpf\+0x88> fd ?a7 ?40 ?10 ?20 ?40 ? * dcpf \(4202512, ?r4\)
+0*8e <dcpf\+0x8e> fd ?a7 ?b0 ?80 ?ff ?01 ? * dcpf \(130944, ?a3\)
+0*94 <dcpf\+0x94> fd ?a7 ?50 ?00 ?00 ?40 ? * dcpf \(4194304, ?r5\)
+0*9a <dcpf\+0x9a> fd ?a7 ?60 ?56 ?34 ?12 ? * dcpf \(1193046, ?r6\)
+0*a0 <dcpf\+0xa0> fd ?a7 ?00 ?01 ?ff ?80 ? * dcpf \(-8323327, ?r0\)
+0*a6 <dcpf\+0xa6> fd ?a7 ?70 ?10 ?20 ?c0 ? * dcpf \(-4186096, ?r7\)
+0*ac <dcpf\+0xac> fd ?a7 ?10 ?43 ?65 ?87 ? * dcpf \(-7903933, ?r1\)
+0*b2 <dcpf\+0xb2> fd ?a7 ?20 ?00 ?00 ?80 ? * dcpf \(-8388608, ?r2\)
+0*b8 <dcpf\+0xb8> fd ?a7 ?c0 ?10 ?20 ?40 ? * dcpf \(4202512, ?d0\)
+0*be <dcpf\+0xbe> fe ?46 ?30 ?80 ?ff ?ff ?01 ? * dcpf \(33554304, ?r3\)
+0*c5 <dcpf\+0xc5> fe ?46 ?d0 ?00 ?00 ?00 ?40 ? * dcpf \(1073741824, ?d1\)
+0*cc <dcpf\+0xcc> fe ?46 ?e0 ?78 ?56 ?34 ?12 ? * dcpf \(305419896, ?d2\)
+0*d3 <dcpf\+0xd3> fe ?46 ?80 ?01 ?ff ?ff ?80 ? * dcpf \(-2130706687, ?a0\)
+0*da <dcpf\+0xda> fe ?46 ?f0 ?08 ?10 ?20 ?c0 ? * dcpf \(-1071640568, ?d3\)
+0*e1 <dcpf\+0xe1> fe ?46 ?90 ?21 ?43 ?65 ?87 ? * dcpf \(-2023406815, ?a1\)
+0*e8 <dcpf\+0xe8> fe ?46 ?a0 ?00 ?00 ?00 ?80 ? * dcpf \(-2147483648, ?a2\)
+0*ef <dcpf\+0xef> fe ?46 ?40 ?08 ?10 ?20 ?40 ? * dcpf \(1075843080, ?r4\)
+0*f6 <dcpf\+0xf6> fe ?46 ?b0 ?80 ?ff ?ff ?01 ? * dcpf \(33554304, ?a3\)
+0*fd <dcpf\+0xfd> fe ?46 ?50 ?00 ?00 ?00 ?40 ? * dcpf \(1073741824, ?r5\)
+0*104 <dcpf\+0x104> fe ?46 ?60 ?78 ?56 ?34 ?12 ? * dcpf \(305419896, ?r6\)
+# bit:
+0*10b <bit> fe ?80 ?00 ?80 ?01 ? * bset 1, ?\(0*8000 <[^>]*>\)
+0*110 <bit\+0x5> fe ?80 ?20 ?40 ?80 ? * bset 128, ?\(0*4020 <[^>]*>\)
+0*115 <bit\+0xa> fe ?80 ?80 ?01 ?20 ? * bset 32, ?\(0*0180 <[^>]*>\)
+0*11a <bit\+0xf> fe ?80 ?ff ?7f ?49 ? * bset 73, ?\(0*7fff <[^>]*>\)
+0*11f <bit\+0x14> fe ?80 ?34 ?12 ?21 ? * bset 33, ?\(0*1234 <[^>]*>\)
+0*124 <bit\+0x19> fe ?80 ?01 ?80 ?bb ? * bset 187, ?\(0*8001 <[^>]*>\)
+0*129 <bit\+0x1e> fe ?80 ?20 ?c0 ?ff ? * bset 255, ?\(0*c020 <[^>]*>\)
+0*12e <bit\+0x23> fe ?80 ?65 ?87 ?e0 ? * bset 224, ?\(0*8765 <[^>]*>\)
+0*133 <bit\+0x28> fe ?80 ?00 ?80 ?ec ? * bset 236, ?\(0*8000 <[^>]*>\)
+0*138 <bit\+0x2d> fe ?80 ?20 ?40 ?a1 ? * bset 161, ?\(0*4020 <[^>]*>\)
+0*13d <bit\+0x32> fe ?80 ?80 ?01 ?fe ? * bset 254, ?\(0*0180 <[^>]*>\)
+0*142 <bit\+0x37> fe ?81 ?ff ?7f ?00 ? * bclr 0, ?\(0*7fff <[^>]*>\)
+0*147 <bit\+0x3c> fe ?81 ?34 ?12 ?7f ? * bclr 127, ?\(0*1234 <[^>]*>\)
+0*14c <bit\+0x41> fe ?81 ?01 ?80 ?18 ? * bclr 24, ?\(0*8001 <[^>]*>\)
+0*151 <bit\+0x46> fe ?81 ?20 ?c0 ?e5 ? * bclr 229, ?\(0*c020 <[^>]*>\)
+0*156 <bit\+0x4b> fe ?81 ?65 ?87 ?68 ? * bclr 104, ?\(0*8765 <[^>]*>\)
+0*15b <bit\+0x50> fe ?81 ?00 ?80 ?01 ? * bclr 1, ?\(0*8000 <[^>]*>\)
+0*160 <bit\+0x55> fe ?81 ?20 ?40 ?80 ? * bclr 128, ?\(0*4020 <[^>]*>\)
+0*165 <bit\+0x5a> fe ?81 ?80 ?01 ?20 ? * bclr 32, ?\(0*0180 <[^>]*>\)
+0*16a <bit\+0x5f> fe ?81 ?ff ?7f ?49 ? * bclr 73, ?\(0*7fff <[^>]*>\)
+0*16f <bit\+0x64> fe ?81 ?34 ?12 ?21 ? * bclr 33, ?\(0*1234 <[^>]*>\)
+0*174 <bit\+0x69> fe ?81 ?01 ?80 ?bb ? * bclr 187, ?\(0*8001 <[^>]*>\)
+0*179 <bit\+0x6e> fe ?82 ?20 ?c0 ?ff ? * btst 255, ?\(0*c020 <[^>]*>\)
+0*17e <bit\+0x73> fe ?82 ?65 ?87 ?e0 ? * btst 224, ?\(0*8765 <[^>]*>\)
+0*183 <bit\+0x78> fe ?82 ?00 ?80 ?ec ? * btst 236, ?\(0*8000 <[^>]*>\)
+0*188 <bit\+0x7d> fe ?82 ?20 ?40 ?a1 ? * btst 161, ?\(0*4020 <[^>]*>\)
+0*18d <bit\+0x82> fe ?82 ?80 ?01 ?fe ? * btst 254, ?\(0*0180 <[^>]*>\)
+0*192 <bit\+0x87> fe ?82 ?ff ?7f ?00 ? * btst 0, ?\(0*7fff <[^>]*>\)
+0*197 <bit\+0x8c> fe ?82 ?34 ?12 ?7f ? * btst 127, ?\(0*1234 <[^>]*>\)
+0*19c <bit\+0x91> fe ?82 ?01 ?80 ?18 ? * btst 24, ?\(0*8001 <[^>]*>\)
+0*1a1 <bit\+0x96> fe ?82 ?20 ?c0 ?e5 ? * btst 229, ?\(0*c020 <[^>]*>\)
+0*1a6 <bit\+0x9b> fe ?82 ?65 ?87 ?68 ? * btst 104, ?\(0*8765 <[^>]*>\)
+0*1ab <bit\+0xa0> fe ?82 ?00 ?80 ?01 ? * btst 1, ?\(0*8000 <[^>]*>\)
+# fmovs:
+0*1b0 <fmovs> f9 ?21 ?d7 ? * fmov \(d1\), ?fs23
+0*1b3 <fmovs\+0x3> f9 ?21 ?e1 ? * fmov \(d2\), ?fs17
+0*1b6 <fmovs\+0x6> f9 ?21 ?82 ? * fmov \(a0\), ?fs18
+0*1b9 <fmovs\+0x9> f9 ?20 ?fc ? * fmov \(d3\), ?fs12
+0*1bc <fmovs\+0xc> f9 ?21 ?93 ? * fmov \(a1\), ?fs19
+0*1bf <fmovs\+0xf> f9 ?20 ?ad ? * fmov \(a2\), ?fs13
+0*1c2 <fmovs\+0x12> f9 ?20 ?4e ? * fmov \(r4\), ?fs14
+0*1c5 <fmovs\+0x15> f9 ?20 ?b8 ? * fmov \(a3\), ?fs8
+0*1c8 <fmovs\+0x18> f9 ?20 ?5f ? * fmov \(r5\), ?fs15
+0*1cb <fmovs\+0x1b> f9 ?20 ?69 ? * fmov \(r6\), ?fs9
+0*1ce <fmovs\+0x1e> f9 ?20 ?0a ? * fmov \(r0\), ?fs10
+0*1d1 <fmovs\+0x21> f9 ?22 ?74 ? * fmov \(r7\+\), ?fs4
+0*1d4 <fmovs\+0x24> f9 ?22 ?1b ? * fmov \(r1\+\), ?fs11
+0*1d7 <fmovs\+0x27> f9 ?22 ?25 ? * fmov \(r2\+\), ?fs5
+0*1da <fmovs\+0x2a> f9 ?22 ?c6 ? * fmov \(d0\+\), ?fs6
+0*1dd <fmovs\+0x2d> f9 ?22 ?30 ? * fmov \(r3\+\), ?fs0
+0*1e0 <fmovs\+0x30> f9 ?22 ?d7 ? * fmov \(d1\+\), ?fs7
+0*1e3 <fmovs\+0x33> f9 ?22 ?e1 ? * fmov \(d2\+\), ?fs1
+0*1e6 <fmovs\+0x36> f9 ?22 ?82 ? * fmov \(a0\+\), ?fs2
+0*1e9 <fmovs\+0x39> f9 ?23 ?fc ? * fmov \(d3\+\), ?fs28
+0*1ec <fmovs\+0x3c> f9 ?22 ?93 ? * fmov \(a1\+\), ?fs3
+0*1ef <fmovs\+0x3f> f9 ?23 ?ad ? * fmov \(a2\+\), ?fs29
+0*1f2 <fmovs\+0x42> f9 ?24 ?04 ? * fmov \(sp\), ?fs4
+0*1f5 <fmovs\+0x45> f9 ?25 ?0e ? * fmov \(sp\), ?fs30
+0*1f8 <fmovs\+0x48> f9 ?25 ?01 ? * fmov \(sp\), ?fs17
+0*1fb <fmovs\+0x4b> f9 ?24 ?0b ? * fmov \(sp\), ?fs11
+0*1fe <fmovs\+0x4e> f9 ?25 ?08 ? * fmov \(sp\), ?fs24
+0*201 <fmovs\+0x51> f9 ?25 ?02 ? * fmov \(sp\), ?fs18
+0*204 <fmovs\+0x54> f9 ?24 ?05 ? * fmov \(sp\), ?fs5
+0*207 <fmovs\+0x57> f9 ?25 ?0f ? * fmov \(sp\), ?fs31
+0*20a <fmovs\+0x5a> f9 ?24 ?0c ? * fmov \(sp\), ?fs12
+0*20d <fmovs\+0x5d> f9 ?24 ?06 ? * fmov \(sp\), ?fs6
+0*210 <fmovs\+0x60> f9 ?25 ?09 ? * fmov \(sp\), ?fs25
+0*213 <fmovs\+0x63> f9 ?26 ?30 ? * fmov r3, ?fs0
+0*216 <fmovs\+0x66> f9 ?26 ?d7 ? * fmov d1, ?fs7
+0*219 <fmovs\+0x69> f9 ?26 ?e1 ? * fmov d2, ?fs1
+0*21c <fmovs\+0x6c> f9 ?26 ?82 ? * fmov a0, ?fs2
+0*21f <fmovs\+0x6f> f9 ?27 ?fc ? * fmov d3, ?fs28
+0*222 <fmovs\+0x72> f9 ?26 ?93 ? * fmov a1, ?fs3
+0*225 <fmovs\+0x75> f9 ?27 ?ad ? * fmov a2, ?fs29
+0*228 <fmovs\+0x78> f9 ?27 ?4e ? * fmov r4, ?fs30
+0*22b <fmovs\+0x7b> f9 ?27 ?b8 ? * fmov a3, ?fs24
+0*22e <fmovs\+0x7e> f9 ?27 ?5f ? * fmov r5, ?fs31
+0*231 <fmovs\+0x81> f9 ?27 ?69 ? * fmov r6, ?fs25
+0*234 <fmovs\+0x84> f9 ?30 ?0a ? * fmov fs0, ?\(a2\)
+0*237 <fmovs\+0x87> f9 ?30 ?74 ? * fmov fs7, ?\(r4\)
+0*23a <fmovs\+0x8a> f9 ?30 ?1b ? * fmov fs1, ?\(a3\)
+0*23d <fmovs\+0x8d> f9 ?30 ?25 ? * fmov fs2, ?\(r5\)
+0*240 <fmovs\+0x90> f9 ?32 ?c6 ? * fmov fs28, ?\(r6\)
+0*243 <fmovs\+0x93> f9 ?30 ?30 ? * fmov fs3, ?\(r0\)
+0*246 <fmovs\+0x96> f9 ?32 ?d7 ? * fmov fs29, ?\(r7\)
+0*249 <fmovs\+0x99> f9 ?32 ?e1 ? * fmov fs30, ?\(r1\)
+0*24c <fmovs\+0x9c> f9 ?32 ?82 ? * fmov fs24, ?\(r2\)
+0*24f <fmovs\+0x9f> f9 ?32 ?fc ? * fmov fs31, ?\(d0\)
+0*252 <fmovs\+0xa2> f9 ?32 ?93 ? * fmov fs25, ?\(r3\)
+0*255 <fmovs\+0xa5> f9 ?33 ?ad ? * fmov fs26, ?\(d1\+\)
+0*258 <fmovs\+0xa8> f9 ?33 ?4e ? * fmov fs20, ?\(d2\+\)
+0*25b <fmovs\+0xab> f9 ?33 ?b8 ? * fmov fs27, ?\(a0\+\)
+0*25e <fmovs\+0xae> f9 ?33 ?5f ? * fmov fs21, ?\(d3\+\)
+0*261 <fmovs\+0xb1> f9 ?33 ?69 ? * fmov fs22, ?\(a1\+\)
+0*264 <fmovs\+0xb4> f9 ?33 ?0a ? * fmov fs16, ?\(a2\+\)
+0*267 <fmovs\+0xb7> f9 ?33 ?74 ? * fmov fs23, ?\(r4\+\)
+0*26a <fmovs\+0xba> f9 ?33 ?1b ? * fmov fs17, ?\(a3\+\)
+0*26d <fmovs\+0xbd> f9 ?33 ?25 ? * fmov fs18, ?\(r5\+\)
+0*270 <fmovs\+0xc0> f9 ?31 ?c6 ? * fmov fs12, ?\(r6\+\)
+0*273 <fmovs\+0xc3> f9 ?33 ?30 ? * fmov fs19, ?\(r0\+\)
+0*276 <fmovs\+0xc6> f9 ?34 ?d0 ? * fmov fs13, ?\(sp\)
+0*279 <fmovs\+0xc9> f9 ?34 ?70 ? * fmov fs7, ?\(sp\)
+0*27c <fmovs\+0xcc> f9 ?36 ?40 ? * fmov fs20, ?\(sp\)
+0*27f <fmovs\+0xcf> f9 ?34 ?e0 ? * fmov fs14, ?\(sp\)
+0*282 <fmovs\+0xd2> f9 ?34 ?10 ? * fmov fs1, ?\(sp\)
+0*285 <fmovs\+0xd5> f9 ?36 ?b0 ? * fmov fs27, ?\(sp\)
+0*288 <fmovs\+0xd8> f9 ?34 ?80 ? * fmov fs8, ?\(sp\)
+0*28b <fmovs\+0xdb> f9 ?34 ?20 ? * fmov fs2, ?\(sp\)
+0*28e <fmovs\+0xde> f9 ?36 ?50 ? * fmov fs21, ?\(sp\)
+0*291 <fmovs\+0xe1> f9 ?34 ?f0 ? * fmov fs15, ?\(sp\)
+0*294 <fmovs\+0xe4> f9 ?36 ?c0 ? * fmov fs28, ?\(sp\)
+0*297 <fmovs\+0xe7> f9 ?37 ?69 ? * fmov fs22, ?a1
+0*29a <fmovs\+0xea> f9 ?37 ?0a ? * fmov fs16, ?a2
+0*29d <fmovs\+0xed> f9 ?37 ?74 ? * fmov fs23, ?r4
+0*2a0 <fmovs\+0xf0> f9 ?37 ?1b ? * fmov fs17, ?a3
+0*2a3 <fmovs\+0xf3> f9 ?37 ?25 ? * fmov fs18, ?r5
+0*2a6 <fmovs\+0xf6> f9 ?35 ?c6 ? * fmov fs12, ?r6
+0*2a9 <fmovs\+0xf9> f9 ?37 ?30 ? * fmov fs19, ?r0
+0*2ac <fmovs\+0xfc> f9 ?35 ?d7 ? * fmov fs13, ?r7
+0*2af <fmovs\+0xff> f9 ?35 ?e1 ? * fmov fs14, ?r1
+0*2b2 <fmovs\+0x102> f9 ?35 ?82 ? * fmov fs8, ?r2
+0*2b5 <fmovs\+0x105> f9 ?35 ?fc ? * fmov fs15, ?d0
+0*2b8 <fmovs\+0x108> f9 ?40 ?93 ? * fmov fs9, ?fs3
+0*2bb <fmovs\+0x10b> f9 ?41 ?ad ? * fmov fs10, ?fs29
+0*2be <fmovs\+0x10e> f9 ?41 ?4e ? * fmov fs4, ?fs30
+0*2c1 <fmovs\+0x111> f9 ?41 ?b8 ? * fmov fs11, ?fs24
+0*2c4 <fmovs\+0x114> f9 ?41 ?5f ? * fmov fs5, ?fs31
+0*2c7 <fmovs\+0x117> f9 ?41 ?69 ? * fmov fs6, ?fs25
+0*2ca <fmovs\+0x11a> f9 ?41 ?0a ? * fmov fs0, ?fs26
+0*2cd <fmovs\+0x11d> f9 ?41 ?74 ? * fmov fs7, ?fs20
+0*2d0 <fmovs\+0x120> f9 ?41 ?1b ? * fmov fs1, ?fs27
+0*2d3 <fmovs\+0x123> f9 ?41 ?25 ? * fmov fs2, ?fs21
+0*2d6 <fmovs\+0x126> f9 ?43 ?c6 ? * fmov fs28, ?fs22
+0*2d9 <fmovs\+0x129> fb ?20 ?0a ?01 ? * fmov \(1, ?r0\), ?fs10
+0*2dd <fmovs\+0x12d> fb ?20 ?74 ?80 ? * fmov \(-128, ?r7\), ?fs4
+0*2e1 <fmovs\+0x131> fb ?20 ?1b ?20 ? * fmov \(32, ?r1\), ?fs11
+0*2e5 <fmovs\+0x135> fb ?20 ?25 ?49 ? * fmov \(73, ?r2\), ?fs5
+0*2e9 <fmovs\+0x139> fb ?20 ?c6 ?21 ? * fmov \(33, ?d0\), ?fs6
+0*2ed <fmovs\+0x13d> fb ?20 ?30 ?bb ? * fmov \(-69, ?r3\), ?fs0
+0*2f1 <fmovs\+0x141> fb ?20 ?d7 ?ff ? * fmov \(-1, ?d1\), ?fs7
+0*2f5 <fmovs\+0x145> fb ?20 ?e1 ?e0 ? * fmov \(-32, ?d2\), ?fs1
+0*2f9 <fmovs\+0x149> fb ?20 ?82 ?ec ? * fmov \(-20, ?a0\), ?fs2
+0*2fd <fmovs\+0x14d> fb ?21 ?fc ?a1 ? * fmov \(-95, ?d3\), ?fs28
+0*301 <fmovs\+0x151> fb ?20 ?93 ?fe ? * fmov \(-2, ?a1\), ?fs3
+0*305 <fmovs\+0x155> fb ?23 ?0d ?ff ? * fmov \(r0\+, ?-1\), ?fs29
+0*309 <fmovs\+0x159> fb ?23 ?7e ?e0 ? * fmov \(r7\+, ?-32\), ?fs30
+0*30d <fmovs\+0x15d> fb ?23 ?18 ?ec ? * fmov \(r1\+, ?-20\), ?fs24
+0*311 <fmovs\+0x161> fb ?23 ?2f ?a1 ? * fmov \(r2\+, ?-95\), ?fs31
+0*315 <fmovs\+0x165> fb ?23 ?c9 ?fe ? * fmov \(d0\+, ?-2\), ?fs25
+0*319 <fmovs\+0x169> fb ?23 ?3a ?00 ? * fmov \(r3\+, ?0\), ?fs26
+0*31d <fmovs\+0x16d> fb ?23 ?d4 ?7f ? * fmov \(d1\+, ?127\), ?fs20
+0*321 <fmovs\+0x171> fb ?23 ?eb ?18 ? * fmov \(d2\+, ?24\), ?fs27
+0*325 <fmovs\+0x175> fb ?23 ?85 ?e5 ? * fmov \(a0\+, ?-27\), ?fs21
+0*329 <fmovs\+0x179> fb ?23 ?f6 ?68 ? * fmov \(d3\+, ?104\), ?fs22
+0*32d <fmovs\+0x17d> fb ?23 ?90 ?01 ? * fmov \(a1\+, ?1\), ?fs16
+0*331 <fmovs\+0x181> fb ?25 ?0d ?ff ? * fmov \(255, ?sp\), ?fs29
+0*335 <fmovs\+0x185> fb ?25 ?0e ?e0 ? * fmov \(224, ?sp\), ?fs30
+0*339 <fmovs\+0x189> fb ?25 ?08 ?ec ? * fmov \(236, ?sp\), ?fs24
+0*33d <fmovs\+0x18d> fb ?25 ?0f ?a1 ? * fmov \(161, ?sp\), ?fs31
+0*341 <fmovs\+0x191> fb ?25 ?09 ?fe ? * fmov \(254, ?sp\), ?fs25
+0*345 <fmovs\+0x195> fb ?25 ?0a ?00 ? * fmov \(0, ?sp\), ?fs26
+0*349 <fmovs\+0x199> fb ?25 ?04 ?7f ? * fmov \(127, ?sp\), ?fs20
+0*34d <fmovs\+0x19d> fb ?25 ?0b ?18 ? * fmov \(24, ?sp\), ?fs27
+0*351 <fmovs\+0x1a1> fb ?25 ?05 ?e5 ? * fmov \(229, ?sp\), ?fs21
+0*355 <fmovs\+0x1a5> fb ?25 ?06 ?68 ? * fmov \(104, ?sp\), ?fs22
+0*359 <fmovs\+0x1a9> fb ?25 ?00 ?01 ? * fmov \(1, ?sp\), ?fs16
+0*35d <fmovs\+0x1ad> fb ?27 ?d7 ?40 ? * fmov \(d1, ?r7\), ?fs4
+0*361 <fmovs\+0x1b1> fb ?27 ?e1 ?b0 ? * fmov \(d2, ?r1\), ?fs11
+0*365 <fmovs\+0x1b5> fb ?27 ?82 ?50 ? * fmov \(a0, ?r2\), ?fs5
+0*369 <fmovs\+0x1b9> fb ?27 ?fc ?60 ? * fmov \(d3, ?d0\), ?fs6
+0*36d <fmovs\+0x1bd> fb ?27 ?93 ?00 ? * fmov \(a1, ?r3\), ?fs0
+0*371 <fmovs\+0x1c1> fb ?27 ?ad ?70 ? * fmov \(a2, ?d1\), ?fs7
+0*375 <fmovs\+0x1c5> fb ?27 ?4e ?10 ? * fmov \(r4, ?d2\), ?fs1
+0*379 <fmovs\+0x1c9> fb ?27 ?b8 ?20 ? * fmov \(a3, ?a0\), ?fs2
+0*37d <fmovs\+0x1cd> fb ?27 ?5f ?c2 ? * fmov \(r5, ?d3\), ?fs28
+0*381 <fmovs\+0x1d1> fb ?27 ?69 ?30 ? * fmov \(r6, ?a1\), ?fs3
+0*385 <fmovs\+0x1d5> fb ?27 ?0a ?d2 ? * fmov \(r0, ?a2\), ?fs29
+0*389 <fmovs\+0x1d9> fb ?32 ?7e ?e0 ? * fmov fs23, ?\(-32, ?d2\)
+0*38d <fmovs\+0x1dd> fb ?32 ?18 ?ec ? * fmov fs17, ?\(-20, ?a0\)
+0*391 <fmovs\+0x1e1> fb ?32 ?2f ?a1 ? * fmov fs18, ?\(-95, ?d3\)
+0*395 <fmovs\+0x1e5> fb ?30 ?c9 ?fe ? * fmov fs12, ?\(-2, ?a1\)
+0*399 <fmovs\+0x1e9> fb ?32 ?3a ?00 ? * fmov fs19, ?\(0, ?a2\)
+0*39d <fmovs\+0x1ed> fb ?30 ?d4 ?7f ? * fmov fs13, ?\(127, ?r4\)
+0*3a1 <fmovs\+0x1f1> fb ?30 ?eb ?18 ? * fmov fs14, ?\(24, ?a3\)
+0*3a5 <fmovs\+0x1f5> fb ?30 ?85 ?e5 ? * fmov fs8, ?\(-27, ?r5\)
+0*3a9 <fmovs\+0x1f9> fb ?30 ?f6 ?68 ? * fmov fs15, ?\(104, ?r6\)
+0*3ad <fmovs\+0x1fd> fb ?30 ?90 ?01 ? * fmov fs9, ?\(1, ?r0\)
+0*3b1 <fmovs\+0x201> fb ?30 ?a7 ?80 ? * fmov fs10, ?\(-128, ?r7\)
+0*3b5 <fmovs\+0x205> fb ?31 ?4e ?18 ? * fmov fs4, ?\(d2\+, ?24\)
+0*3b9 <fmovs\+0x209> fb ?31 ?b8 ?e5 ? * fmov fs11, ?\(a0\+, ?-27\)
+0*3bd <fmovs\+0x20d> fb ?31 ?5f ?68 ? * fmov fs5, ?\(d3\+, ?104\)
+0*3c1 <fmovs\+0x211> fb ?31 ?69 ?01 ? * fmov fs6, ?\(a1\+, ?1\)
+0*3c5 <fmovs\+0x215> fb ?31 ?0a ?80 ? * fmov fs0, ?\(a2\+, ?-128\)
+0*3c9 <fmovs\+0x219> fb ?31 ?74 ?20 ? * fmov fs7, ?\(r4\+, ?32\)
+0*3cd <fmovs\+0x21d> fb ?31 ?1b ?49 ? * fmov fs1, ?\(a3\+, ?73\)
+0*3d1 <fmovs\+0x221> fb ?31 ?25 ?21 ? * fmov fs2, ?\(r5\+, ?33\)
+0*3d5 <fmovs\+0x225> fb ?33 ?c6 ?bb ? * fmov fs28, ?\(r6\+, ?-69\)
+0*3d9 <fmovs\+0x229> fb ?31 ?30 ?ff ? * fmov fs3, ?\(r0\+, ?-1\)
+0*3dd <fmovs\+0x22d> fb ?33 ?d7 ?e0 ? * fmov fs29, ?\(r7\+, ?-32\)
+0*3e1 <fmovs\+0x231> fb ?36 ?e0 ?18 ? * fmov fs30, ?\(24, ?sp\)
+0*3e5 <fmovs\+0x235> fb ?36 ?80 ?e5 ? * fmov fs24, ?\(229, ?sp\)
+0*3e9 <fmovs\+0x239> fb ?36 ?f0 ?68 ? * fmov fs31, ?\(104, ?sp\)
+0*3ed <fmovs\+0x23d> fb ?36 ?90 ?01 ? * fmov fs25, ?\(1, ?sp\)
+0*3f1 <fmovs\+0x241> fb ?36 ?a0 ?80 ? * fmov fs26, ?\(128, ?sp\)
+0*3f5 <fmovs\+0x245> fb ?36 ?40 ?20 ? * fmov fs20, ?\(32, ?sp\)
+0*3f9 <fmovs\+0x249> fb ?36 ?b0 ?49 ? * fmov fs27, ?\(73, ?sp\)
+0*3fd <fmovs\+0x24d> fb ?36 ?50 ?21 ? * fmov fs21, ?\(33, ?sp\)
+0*401 <fmovs\+0x251> fb ?36 ?60 ?bb ? * fmov fs22, ?\(187, ?sp\)
+0*405 <fmovs\+0x255> fb ?36 ?00 ?ff ? * fmov fs16, ?\(255, ?sp\)
+0*409 <fmovs\+0x259> fb ?36 ?70 ?e0 ? * fmov fs23, ?\(224, ?sp\)
+0*40d <fmovs\+0x25d> fb ?37 ?b8 ?12 ? * fmov fs17, ?\(a3, ?a0\)
+0*411 <fmovs\+0x261> fb ?37 ?5f ?22 ? * fmov fs18, ?\(r5, ?d3\)
+0*415 <fmovs\+0x265> fb ?37 ?69 ?c0 ? * fmov fs12, ?\(r6, ?a1\)
+0*419 <fmovs\+0x269> fb ?37 ?0a ?32 ? * fmov fs19, ?\(r0, ?a2\)
+0*41d <fmovs\+0x26d> fb ?37 ?74 ?d0 ? * fmov fs13, ?\(r7, ?r4\)
+0*421 <fmovs\+0x271> fb ?37 ?1b ?e0 ? * fmov fs14, ?\(r1, ?a3\)
+0*425 <fmovs\+0x275> fb ?37 ?25 ?80 ? * fmov fs8, ?\(r2, ?r5\)
+0*429 <fmovs\+0x279> fb ?37 ?c6 ?f0 ? * fmov fs15, ?\(d0, ?r6\)
+0*42d <fmovs\+0x27d> fb ?37 ?30 ?90 ? * fmov fs9, ?\(r3, ?r0\)
+0*431 <fmovs\+0x281> fb ?37 ?d7 ?a0 ? * fmov fs10, ?\(d1, ?r7\)
+0*435 <fmovs\+0x285> fb ?37 ?e1 ?40 ? * fmov fs4, ?\(d2, ?r1\)
+0*439 <fmovs\+0x289> fd ?21 ?82 ?01 ?ff ?80 ? * fmov \(-8323327, ?a0\), ?fs18
+0*43f <fmovs\+0x28f> fd ?20 ?fc ?10 ?20 ?c0 ? * fmov \(-4186096, ?d3\), ?fs12
+0*445 <fmovs\+0x295> fd ?21 ?93 ?43 ?65 ?87 ? * fmov \(-7903933, ?a1\), ?fs19
+0*44b <fmovs\+0x29b> fd ?20 ?ad ?00 ?00 ?80 ? * fmov \(-8388608, ?a2\), ?fs13
+0*451 <fmovs\+0x2a1> fd ?20 ?4e ?10 ?20 ?40 ? * fmov \(4202512, ?r4\), ?fs14
+0*457 <fmovs\+0x2a7> fd ?20 ?b8 ?80 ?ff ?01 ? * fmov \(130944, ?a3\), ?fs8
+0*45d <fmovs\+0x2ad> fd ?20 ?5f ?00 ?00 ?40 ? * fmov \(4194304, ?r5\), ?fs15
+0*463 <fmovs\+0x2b3> fd ?20 ?69 ?56 ?34 ?12 ? * fmov \(1193046, ?r6\), ?fs9
+0*469 <fmovs\+0x2b9> fd ?20 ?0a ?01 ?ff ?80 ? * fmov \(-8323327, ?r0\), ?fs10
+0*46f <fmovs\+0x2bf> fd ?20 ?74 ?10 ?20 ?c0 ? * fmov \(-4186096, ?r7\), ?fs4
+0*475 <fmovs\+0x2c5> fd ?20 ?1b ?43 ?65 ?87 ? * fmov \(-7903933, ?r1\), ?fs11
+0*47b <fmovs\+0x2cb> fd ?22 ?85 ?00 ?00 ?40 ? * fmov \(a0\+, ?4194304\), ?fs5
+0*481 <fmovs\+0x2d1> fd ?22 ?f6 ?56 ?34 ?12 ? * fmov \(d3\+, ?1193046\), ?fs6
+0*487 <fmovs\+0x2d7> fd ?22 ?90 ?01 ?ff ?80 ? * fmov \(a1\+, ?-8323327\), ?fs0
+0*48d <fmovs\+0x2dd> fd ?22 ?a7 ?10 ?20 ?c0 ? * fmov \(a2\+, ?-4186096\), ?fs7
+0*493 <fmovs\+0x2e3> fd ?22 ?41 ?43 ?65 ?87 ? * fmov \(r4\+, ?-7903933\), ?fs1
+0*499 <fmovs\+0x2e9> fd ?22 ?b2 ?00 ?00 ?80 ? * fmov \(a3\+, ?-8388608\), ?fs2
+0*49f <fmovs\+0x2ef> fd ?23 ?5c ?10 ?20 ?40 ? * fmov \(r5\+, ?4202512\), ?fs28
+0*4a5 <fmovs\+0x2f5> fd ?22 ?63 ?80 ?ff ?01 ? * fmov \(r6\+, ?130944\), ?fs3
+0*4ab <fmovs\+0x2fb> fd ?23 ?0d ?00 ?00 ?40 ? * fmov \(r0\+, ?4194304\), ?fs29
+0*4b1 <fmovs\+0x301> fd ?23 ?7e ?56 ?34 ?12 ? * fmov \(r7\+, ?1193046\), ?fs30
+0*4b7 <fmovs\+0x307> fd ?23 ?18 ?01 ?ff ?80 ? * fmov \(r1\+, ?-8323327\), ?fs24
+0*4bd <fmovs\+0x30d> fd ?24 ?05 ?00 ?00 ?40 ? * fmov \(4194304, ?sp\), ?fs5
+0*4c3 <fmovs\+0x313> fd ?24 ?06 ?56 ?34 ?12 ? * fmov \(1193046, ?sp\), ?fs6
+0*4c9 <fmovs\+0x319> fd ?24 ?00 ?01 ?ff ?80 ? * fmov \(8453889, ?sp\), ?fs0
+0*4cf <fmovs\+0x31f> fd ?24 ?07 ?10 ?20 ?c0 ? * fmov \(12591120, ?sp\), ?fs7
+0*4d5 <fmovs\+0x325> fd ?24 ?01 ?43 ?65 ?87 ? * fmov \(8873283, ?sp\), ?fs1
+0*4db <fmovs\+0x32b> fd ?24 ?02 ?00 ?00 ?80 ? * fmov \(8388608, ?sp\), ?fs2
+0*4e1 <fmovs\+0x331> fd ?25 ?0c ?10 ?20 ?40 ? * fmov \(4202512, ?sp\), ?fs28
+0*4e7 <fmovs\+0x337> fd ?24 ?03 ?80 ?ff ?01 ? * fmov \(130944, ?sp\), ?fs3
+0*4ed <fmovs\+0x33d> fd ?25 ?0d ?00 ?00 ?40 ? * fmov \(4194304, ?sp\), ?fs29
+0*4f3 <fmovs\+0x343> fd ?25 ?0e ?56 ?34 ?12 ? * fmov \(1193046, ?sp\), ?fs30
+0*4f9 <fmovs\+0x349> fd ?25 ?08 ?01 ?ff ?80 ? * fmov \(8453889, ?sp\), ?fs24
+0*4ff <fmovs\+0x34f> fd ?30 ?5c ?10 ?20 ?40 ? * fmov fs5, ?\(4202512, ?d0\)
+0*505 <fmovs\+0x355> fd ?30 ?63 ?80 ?ff ?01 ? * fmov fs6, ?\(130944, ?r3\)
+0*50b <fmovs\+0x35b> fd ?30 ?0d ?00 ?00 ?40 ? * fmov fs0, ?\(4194304, ?d1\)
+0*511 <fmovs\+0x361> fd ?30 ?7e ?56 ?34 ?12 ? * fmov fs7, ?\(1193046, ?d2\)
+0*517 <fmovs\+0x367> fd ?30 ?18 ?01 ?ff ?80 ? * fmov fs1, ?\(-8323327, ?a0\)
+0*51d <fmovs\+0x36d> fd ?30 ?2f ?10 ?20 ?c0 ? * fmov fs2, ?\(-4186096, ?d3\)
+0*523 <fmovs\+0x373> fd ?32 ?c9 ?43 ?65 ?87 ? * fmov fs28, ?\(-7903933, ?a1\)
+0*529 <fmovs\+0x379> fd ?30 ?3a ?00 ?00 ?80 ? * fmov fs3, ?\(-8388608, ?a2\)
+0*52f <fmovs\+0x37f> fd ?32 ?d4 ?10 ?20 ?40 ? * fmov fs29, ?\(4202512, ?r4\)
+0*535 <fmovs\+0x385> fd ?32 ?eb ?80 ?ff ?01 ? * fmov fs30, ?\(130944, ?a3\)
+0*53b <fmovs\+0x38b> fd ?32 ?85 ?00 ?00 ?40 ? * fmov fs24, ?\(4194304, ?r5\)
+0*541 <fmovs\+0x391> fd ?33 ?fc ?43 ?65 ?87 ? * fmov fs31, ?\(d0\+, ?-7903933\)
+0*547 <fmovs\+0x397> fd ?33 ?93 ?00 ?00 ?80 ? * fmov fs25, ?\(r3\+, ?-8388608\)
+0*54d <fmovs\+0x39d> fd ?33 ?ad ?10 ?20 ?40 ? * fmov fs26, ?\(d1\+, ?4202512\)
+0*553 <fmovs\+0x3a3> fd ?33 ?4e ?80 ?ff ?01 ? * fmov fs20, ?\(d2\+, ?130944\)
+0*559 <fmovs\+0x3a9> fd ?33 ?b8 ?00 ?00 ?40 ? * fmov fs27, ?\(a0\+, ?4194304\)
+0*55f <fmovs\+0x3af> fd ?33 ?5f ?56 ?34 ?12 ? * fmov fs21, ?\(d3\+, ?1193046\)
+0*565 <fmovs\+0x3b5> fd ?33 ?69 ?01 ?ff ?80 ? * fmov fs22, ?\(a1\+, ?-8323327\)
+0*56b <fmovs\+0x3bb> fd ?33 ?0a ?10 ?20 ?c0 ? * fmov fs16, ?\(a2\+, ?-4186096\)
+0*571 <fmovs\+0x3c1> fd ?33 ?74 ?43 ?65 ?87 ? * fmov fs23, ?\(r4\+, ?-7903933\)
+0*577 <fmovs\+0x3c7> fd ?33 ?1b ?00 ?00 ?80 ? * fmov fs17, ?\(a3\+, ?-8388608\)
+0*57d <fmovs\+0x3cd> fd ?33 ?25 ?10 ?20 ?40 ? * fmov fs18, ?\(r5\+, ?4202512\)
+0*583 <fmovs\+0x3d3> fd ?34 ?c0 ?43 ?65 ?87 ? * fmov fs12, ?\(8873283, ?sp\)
+0*589 <fmovs\+0x3d9> fd ?36 ?30 ?00 ?00 ?80 ? * fmov fs19, ?\(8388608, ?sp\)
+0*58f <fmovs\+0x3df> fd ?34 ?d0 ?10 ?20 ?40 ? * fmov fs13, ?\(4202512, ?sp\)
+0*595 <fmovs\+0x3e5> fd ?34 ?e0 ?80 ?ff ?01 ? * fmov fs14, ?\(130944, ?sp\)
+0*59b <fmovs\+0x3eb> fd ?34 ?80 ?00 ?00 ?40 ? * fmov fs8, ?\(4194304, ?sp\)
+0*5a1 <fmovs\+0x3f1> fd ?34 ?f0 ?56 ?34 ?12 ? * fmov fs15, ?\(1193046, ?sp\)
+0*5a7 <fmovs\+0x3f7> fd ?34 ?90 ?01 ?ff ?80 ? * fmov fs9, ?\(8453889, ?sp\)
+0*5ad <fmovs\+0x3fd> fd ?34 ?a0 ?10 ?20 ?c0 ? * fmov fs10, ?\(12591120, ?sp\)
+0*5b3 <fmovs\+0x403> fd ?34 ?40 ?43 ?65 ?87 ? * fmov fs4, ?\(8873283, ?sp\)
+0*5b9 <fmovs\+0x409> fd ?34 ?b0 ?00 ?00 ?80 ? * fmov fs11, ?\(8388608, ?sp\)
+0*5bf <fmovs\+0x40f> fd ?34 ?50 ?10 ?20 ?40 ? * fmov fs5, ?\(4202512, ?sp\)
+0*5c5 <fmovs\+0x415> fe ?21 ?93 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?a1\), ?fs19
+0*5cc <fmovs\+0x41c> fe ?20 ?ad ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?a2\), ?fs13
+0*5d3 <fmovs\+0x423> fe ?20 ?4e ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?r4\), ?fs14
+0*5da <fmovs\+0x42a> fe ?20 ?b8 ?80 ?ff ?ff ?01 ? * fmov \(33554304, ?a3\), ?fs8
+0*5e1 <fmovs\+0x431> fe ?20 ?5f ?00 ?00 ?00 ?40 ? * fmov \(1073741824, ?r5\), ?fs15
+0*5e8 <fmovs\+0x438> fe ?20 ?69 ?78 ?56 ?34 ?12 ? * fmov \(305419896, ?r6\), ?fs9
+0*5ef <fmovs\+0x43f> fe ?20 ?0a ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?r0\), ?fs10
+0*5f6 <fmovs\+0x446> fe ?20 ?74 ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?r7\), ?fs4
+0*5fd <fmovs\+0x44d> fe ?20 ?1b ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?r1\), ?fs11
+0*604 <fmovs\+0x454> fe ?20 ?25 ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?r2\), ?fs5
+0*60b <fmovs\+0x45b> fe ?20 ?c6 ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?d0\), ?fs6
+0*612 <fmovs\+0x462> fe ?22 ?90 ?01 ?ff ?ff ?80 ? * fmov \(a1\+, ?-2130706687\), ?fs0
+0*619 <fmovs\+0x469> fe ?22 ?a7 ?08 ?10 ?20 ?c0 ? * fmov \(a2\+, ?-1071640568\), ?fs7
+0*620 <fmovs\+0x470> fe ?22 ?41 ?21 ?43 ?65 ?87 ? * fmov \(r4\+, ?-2023406815\), ?fs1
+0*627 <fmovs\+0x477> fe ?22 ?b2 ?00 ?00 ?00 ?80 ? * fmov \(a3\+, ?-2147483648\), ?fs2
+0*62e <fmovs\+0x47e> fe ?23 ?5c ?08 ?10 ?20 ?40 ? * fmov \(r5\+, ?1075843080\), ?fs28
+0*635 <fmovs\+0x485> fe ?22 ?63 ?80 ?ff ?ff ?01 ? * fmov \(r6\+, ?33554304\), ?fs3
+0*63c <fmovs\+0x48c> fe ?23 ?0d ?00 ?00 ?00 ?40 ? * fmov \(r0\+, ?1073741824\), ?fs29
+0*643 <fmovs\+0x493> fe ?23 ?7e ?78 ?56 ?34 ?12 ? * fmov \(r7\+, ?305419896\), ?fs30
+0*64a <fmovs\+0x49a> fe ?23 ?18 ?01 ?ff ?ff ?80 ? * fmov \(r1\+, ?-2130706687\), ?fs24
+0*651 <fmovs\+0x4a1> fe ?23 ?2f ?08 ?10 ?20 ?c0 ? * fmov \(r2\+, ?-1071640568\), ?fs31
+0*658 <fmovs\+0x4a8> fe ?23 ?c9 ?21 ?43 ?65 ?87 ? * fmov \(d0\+, ?-2023406815\), ?fs25
+0*65f <fmovs\+0x4af> fe ?24 ?00 ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?sp\), ?fs0
+0*666 <fmovs\+0x4b6> fe ?24 ?07 ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?sp\), ?fs7
+0*66d <fmovs\+0x4bd> fe ?24 ?01 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?sp\), ?fs1
+0*674 <fmovs\+0x4c4> fe ?24 ?02 ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?sp\), ?fs2
+0*67b <fmovs\+0x4cb> fe ?25 ?0c ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?sp\), ?fs28
+0*682 <fmovs\+0x4d2> fe ?24 ?03 ?80 ?ff ?ff ?01 ? * fmov \(33554304, ?sp\), ?fs3
+0*689 <fmovs\+0x4d9> fe ?25 ?0d ?00 ?00 ?00 ?40 ? * fmov \(1073741824, ?sp\), ?fs29
+0*690 <fmovs\+0x4e0> fe ?25 ?0e ?78 ?56 ?34 ?12 ? * fmov \(305419896, ?sp\), ?fs30
+0*697 <fmovs\+0x4e7> fe ?25 ?08 ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?sp\), ?fs24
+0*69e <fmovs\+0x4ee> fe ?25 ?0f ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?sp\), ?fs31
+0*6a5 <fmovs\+0x4f5> fe ?25 ?09 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?sp\), ?fs25
+0*6ac <fmovs\+0x4fc> fe ?27 ?0a ?00 ?00 ?00 ?80 ? * fmov -2147483648, ?fs26
+0*6b3 <fmovs\+0x503> fe ?27 ?04 ?08 ?10 ?20 ?40 ? * fmov 1075843080, ?fs20
+0*6ba <fmovs\+0x50a> fe ?27 ?0b ?80 ?ff ?ff ?01 ? * fmov 33554304, ?fs27
+0*6c1 <fmovs\+0x511> fe ?27 ?05 ?00 ?00 ?00 ?40 ? * fmov 1073741824, ?fs21
+0*6c8 <fmovs\+0x518> fe ?27 ?06 ?78 ?56 ?34 ?12 ? * fmov 305419896, ?fs22
+0*6cf <fmovs\+0x51f> fe ?27 ?00 ?01 ?ff ?ff ?80 ? * fmov -2130706687, ?fs16
+0*6d6 <fmovs\+0x526> fe ?27 ?07 ?08 ?10 ?20 ?c0 ? * fmov -1071640568, ?fs23
+0*6dd <fmovs\+0x52d> fe ?27 ?01 ?21 ?43 ?65 ?87 ? * fmov -2023406815, ?fs17
+0*6e4 <fmovs\+0x534> fe ?27 ?02 ?00 ?00 ?00 ?80 ? * fmov -2147483648, ?fs18
+0*6eb <fmovs\+0x53b> fe ?26 ?0c ?08 ?10 ?20 ?40 ? * fmov 1075843080, ?fs12
+0*6f2 <fmovs\+0x542> fe ?27 ?03 ?80 ?ff ?ff ?01 ? * fmov 33554304, ?fs19
+0*6f9 <fmovs\+0x549> fe ?32 ?a7 ?08 ?10 ?20 ?c0 ? * fmov fs26, ?\(-1071640568, ?r7\)
+0*700 <fmovs\+0x550> fe ?32 ?41 ?21 ?43 ?65 ?87 ? * fmov fs20, ?\(-2023406815, ?r1\)
+0*707 <fmovs\+0x557> fe ?32 ?b2 ?00 ?00 ?00 ?80 ? * fmov fs27, ?\(-2147483648, ?r2\)
+0*70e <fmovs\+0x55e> fe ?32 ?5c ?08 ?10 ?20 ?40 ? * fmov fs21, ?\(1075843080, ?d0\)
+0*715 <fmovs\+0x565> fe ?32 ?63 ?80 ?ff ?ff ?01 ? * fmov fs22, ?\(33554304, ?r3\)
+0*71c <fmovs\+0x56c> fe ?32 ?0d ?00 ?00 ?00 ?40 ? * fmov fs16, ?\(1073741824, ?d1\)
+0*723 <fmovs\+0x573> fe ?32 ?7e ?78 ?56 ?34 ?12 ? * fmov fs23, ?\(305419896, ?d2\)
+0*72a <fmovs\+0x57a> fe ?32 ?18 ?01 ?ff ?ff ?80 ? * fmov fs17, ?\(-2130706687, ?a0\)
+0*731 <fmovs\+0x581> fe ?32 ?2f ?08 ?10 ?20 ?c0 ? * fmov fs18, ?\(-1071640568, ?d3\)
+0*738 <fmovs\+0x588> fe ?30 ?c9 ?21 ?43 ?65 ?87 ? * fmov fs12, ?\(-2023406815, ?a1\)
+0*73f <fmovs\+0x58f> fe ?32 ?3a ?00 ?00 ?00 ?80 ? * fmov fs19, ?\(-2147483648, ?a2\)
+0*746 <fmovs\+0x596> fe ?31 ?d7 ?78 ?56 ?34 ?12 ? * fmov fs13, ?\(r7\+, ?305419896\)
+0*74d <fmovs\+0x59d> fe ?31 ?e1 ?01 ?ff ?ff ?80 ? * fmov fs14, ?\(r1\+, ?-2130706687\)
+0*754 <fmovs\+0x5a4> fe ?31 ?82 ?08 ?10 ?20 ?c0 ? * fmov fs8, ?\(r2\+, ?-1071640568\)
+0*75b <fmovs\+0x5ab> fe ?31 ?fc ?21 ?43 ?65 ?87 ? * fmov fs15, ?\(d0\+, ?-2023406815\)
+0*762 <fmovs\+0x5b2> fe ?31 ?93 ?00 ?00 ?00 ?80 ? * fmov fs9, ?\(r3\+, ?-2147483648\)
+0*769 <fmovs\+0x5b9> fe ?31 ?ad ?08 ?10 ?20 ?40 ? * fmov fs10, ?\(d1\+, ?1075843080\)
+0*770 <fmovs\+0x5c0> fe ?31 ?4e ?80 ?ff ?ff ?01 ? * fmov fs4, ?\(d2\+, ?33554304\)
+0*777 <fmovs\+0x5c7> fe ?31 ?b8 ?00 ?00 ?00 ?40 ? * fmov fs11, ?\(a0\+, ?1073741824\)
+0*77e <fmovs\+0x5ce> fe ?31 ?5f ?78 ?56 ?34 ?12 ? * fmov fs5, ?\(d3\+, ?305419896\)
+0*785 <fmovs\+0x5d5> fe ?31 ?69 ?01 ?ff ?ff ?80 ? * fmov fs6, ?\(a1\+, ?-2130706687\)
+0*78c <fmovs\+0x5dc> fe ?31 ?0a ?08 ?10 ?20 ?c0 ? * fmov fs0, ?\(a2\+, ?-1071640568\)
+0*793 <fmovs\+0x5e3> fe ?34 ?70 ?78 ?56 ?34 ?12 ? * fmov fs7, ?\(305419896, ?sp\)
+0*79a <fmovs\+0x5ea> fe ?34 ?10 ?01 ?ff ?ff ?80 ? * fmov fs1, ?\(-2130706687, ?sp\)
+0*7a1 <fmovs\+0x5f1> fe ?34 ?20 ?08 ?10 ?20 ?c0 ? * fmov fs2, ?\(-1071640568, ?sp\)
+0*7a8 <fmovs\+0x5f8> fe ?36 ?c0 ?21 ?43 ?65 ?87 ? * fmov fs28, ?\(-2023406815, ?sp\)
+0*7af <fmovs\+0x5ff> fe ?34 ?30 ?00 ?00 ?00 ?80 ? * fmov fs3, ?\(-2147483648, ?sp\)
+0*7b6 <fmovs\+0x606> fe ?36 ?d0 ?08 ?10 ?20 ?40 ? * fmov fs29, ?\(1075843080, ?sp\)
+0*7bd <fmovs\+0x60d> fe ?36 ?e0 ?80 ?ff ?ff ?01 ? * fmov fs30, ?\(33554304, ?sp\)
+0*7c4 <fmovs\+0x614> fe ?36 ?80 ?00 ?00 ?00 ?40 ? * fmov fs24, ?\(1073741824, ?sp\)
+0*7cb <fmovs\+0x61b> fe ?36 ?f0 ?78 ?56 ?34 ?12 ? * fmov fs31, ?\(305419896, ?sp\)
+0*7d2 <fmovs\+0x622> fe ?36 ?90 ?01 ?ff ?ff ?80 ? * fmov fs25, ?\(-2130706687, ?sp\)
+0*7d9 <fmovs\+0x629> fe ?36 ?a0 ?08 ?10 ?20 ?c0 ? * fmov fs26, ?\(-1071640568, ?sp\)
+# fmovd:
+0*7e0 <fmovd> f9 ?a0 ?48 ? * fmov \(r4\), ?fd8
+0*7e3 <fmovd\+0x3> f9 ?a1 ?b0 ? * fmov \(a3\), ?fd16
+0*7e6 <fmovd\+0x6> f9 ?a0 ?54 ? * fmov \(r5\), ?fd4
+0*7e9 <fmovd\+0x9> f9 ?a0 ?6c ? * fmov \(r6\), ?fd12
+0*7ec <fmovd\+0xc> f9 ?a0 ?0e ? * fmov \(r0\), ?fd14
+0*7ef <fmovd\+0xf> f9 ?a0 ?76 ? * fmov \(r7\), ?fd6
+0*7f2 <fmovd\+0x12> f9 ?a0 ?12 ? * fmov \(r1\), ?fd2
+0*7f5 <fmovd\+0x15> f9 ?a1 ?2a ? * fmov \(r2\), ?fd26
+0*7f8 <fmovd\+0x18> f9 ?a0 ?c8 ? * fmov \(d0\), ?fd8
+0*7fb <fmovd\+0x1b> f9 ?a0 ?30 ? * fmov \(r3\), ?fd0
+0*7fe <fmovd\+0x1e> f9 ?a1 ?d4 ? * fmov \(d1\), ?fd20
+0*801 <fmovd\+0x21> f9 ?a3 ?ec ? * fmov \(d2\+\), ?fd28
+0*804 <fmovd\+0x24> f9 ?a3 ?8a ? * fmov \(a0\+\), ?fd26
+0*807 <fmovd\+0x27> f9 ?a2 ?f2 ? * fmov \(d3\+\), ?fd2
+0*80a <fmovd\+0x2a> f9 ?a3 ?96 ? * fmov \(a1\+\), ?fd22
+0*80d <fmovd\+0x2d> f9 ?a2 ?aa ? * fmov \(a2\+\), ?fd10
+0*810 <fmovd\+0x30> f9 ?a3 ?48 ? * fmov \(r4\+\), ?fd24
+0*813 <fmovd\+0x33> f9 ?a3 ?b0 ? * fmov \(a3\+\), ?fd16
+0*816 <fmovd\+0x36> f9 ?a2 ?5c ? * fmov \(r5\+\), ?fd12
+0*819 <fmovd\+0x39> f9 ?a2 ?64 ? * fmov \(r6\+\), ?fd4
+0*81c <fmovd\+0x3c> f9 ?a2 ?0a ? * fmov \(r0\+\), ?fd10
+0*81f <fmovd\+0x3f> f9 ?a3 ?72 ? * fmov \(r7\+\), ?fd18
+0*822 <fmovd\+0x42> f9 ?a5 ?0c ? * fmov \(sp\), ?fd28
+0*825 <fmovd\+0x45> f9 ?a4 ?06 ? * fmov \(sp\), ?fd6
+0*828 <fmovd\+0x48> f9 ?a5 ?00 ? * fmov \(sp\), ?fd16
+0*82b <fmovd\+0x4b> f9 ?a5 ?0a ? * fmov \(sp\), ?fd26
+0*82e <fmovd\+0x4e> f9 ?a4 ?0e ? * fmov \(sp\), ?fd14
+0*831 <fmovd\+0x51> f9 ?a4 ?04 ? * fmov \(sp\), ?fd4
+0*834 <fmovd\+0x54> f9 ?a4 ?02 ? * fmov \(sp\), ?fd2
+0*837 <fmovd\+0x57> f9 ?a5 ?08 ? * fmov \(sp\), ?fd24
+0*83a <fmovd\+0x5a> f9 ?a4 ?0c ? * fmov \(sp\), ?fd12
+0*83d <fmovd\+0x5d> f9 ?a5 ?06 ? * fmov \(sp\), ?fd22
+0*840 <fmovd\+0x60> f9 ?a4 ?00 ? * fmov \(sp\), ?fd0
+0*843 <fmovd\+0x63> f9 ?b0 ?ed ? * fmov fd14, ?\(d1\)
+0*846 <fmovd\+0x66> f9 ?b0 ?6e ? * fmov fd6, ?\(d2\)
+0*849 <fmovd\+0x69> f9 ?b0 ?28 ? * fmov fd2, ?\(a0\)
+0*84c <fmovd\+0x6c> f9 ?b2 ?af ? * fmov fd26, ?\(d3\)
+0*84f <fmovd\+0x6f> f9 ?b0 ?89 ? * fmov fd8, ?\(a1\)
+0*852 <fmovd\+0x72> f9 ?b0 ?0a ? * fmov fd0, ?\(a2\)
+0*855 <fmovd\+0x75> f9 ?b2 ?44 ? * fmov fd20, ?\(r4\)
+0*858 <fmovd\+0x78> f9 ?b2 ?cb ? * fmov fd28, ?\(a3\)
+0*85b <fmovd\+0x7b> f9 ?b2 ?a5 ? * fmov fd26, ?\(r5\)
+0*85e <fmovd\+0x7e> f9 ?b0 ?26 ? * fmov fd2, ?\(r6\)
+0*861 <fmovd\+0x81> f9 ?b2 ?60 ? * fmov fd22, ?\(r0\)
+0*864 <fmovd\+0x84> f9 ?b1 ?a7 ? * fmov fd10, ?\(r7\+\)
+0*867 <fmovd\+0x87> f9 ?b3 ?81 ? * fmov fd24, ?\(r1\+\)
+0*86a <fmovd\+0x8a> f9 ?b3 ?02 ? * fmov fd16, ?\(r2\+\)
+0*86d <fmovd\+0x8d> f9 ?b1 ?cc ? * fmov fd12, ?\(d0\+\)
+0*870 <fmovd\+0x90> f9 ?b1 ?43 ? * fmov fd4, ?\(r3\+\)
+0*873 <fmovd\+0x93> f9 ?b1 ?ad ? * fmov fd10, ?\(d1\+\)
+0*876 <fmovd\+0x96> f9 ?b3 ?2e ? * fmov fd18, ?\(d2\+\)
+0*879 <fmovd\+0x99> f9 ?b1 ?68 ? * fmov fd6, ?\(a0\+\)
+0*87c <fmovd\+0x9c> f9 ?b1 ?ef ? * fmov fd14, ?\(d3\+\)
+0*87f <fmovd\+0x9f> f9 ?b3 ?89 ? * fmov fd24, ?\(a1\+\)
+0*882 <fmovd\+0xa2> f9 ?b1 ?0a ? * fmov fd0, ?\(a2\+\)
+0*885 <fmovd\+0xa5> f9 ?b6 ?c0 ? * fmov fd28, ?\(sp\)
+0*888 <fmovd\+0xa8> f9 ?b4 ?60 ? * fmov fd6, ?\(sp\)
+0*88b <fmovd\+0xab> f9 ?b6 ?80 ? * fmov fd24, ?\(sp\)
+0*88e <fmovd\+0xae> f9 ?b6 ?40 ? * fmov fd20, ?\(sp\)
+0*891 <fmovd\+0xb1> f9 ?b4 ?20 ? * fmov fd2, ?\(sp\)
+0*894 <fmovd\+0xb4> f9 ?b6 ?00 ? * fmov fd16, ?\(sp\)
+0*897 <fmovd\+0xb7> f9 ?b6 ?e0 ? * fmov fd30, ?\(sp\)
+0*89a <fmovd\+0xba> f9 ?b6 ?a0 ? * fmov fd26, ?\(sp\)
+0*89d <fmovd\+0xbd> f9 ?b4 ?c0 ? * fmov fd12, ?\(sp\)
+0*8a0 <fmovd\+0xc0> f9 ?b6 ?60 ? * fmov fd22, ?\(sp\)
+0*8a3 <fmovd\+0xc3> f9 ?b4 ?80 ? * fmov fd8, ?\(sp\)
+0*8a6 <fmovd\+0xc6> f9 ?c1 ?42 ? * fmov fd4, ?fd18
+0*8a9 <fmovd\+0xc9> f9 ?c1 ?ae ? * fmov fd10, ?fd30
+0*8ac <fmovd\+0xcc> f9 ?c2 ?28 ? * fmov fd18, ?fd8
+0*8af <fmovd\+0xcf> f9 ?c1 ?60 ? * fmov fd6, ?fd16
+0*8b2 <fmovd\+0xd2> f9 ?c0 ?e4 ? * fmov fd14, ?fd4
+0*8b5 <fmovd\+0xd5> f9 ?c2 ?8c ? * fmov fd24, ?fd12
+0*8b8 <fmovd\+0xd8> f9 ?c0 ?0e ? * fmov fd0, ?fd14
+0*8bb <fmovd\+0xdb> f9 ?c2 ?c6 ? * fmov fd28, ?fd6
+0*8be <fmovd\+0xde> f9 ?c2 ?42 ? * fmov fd20, ?fd2
+0*8c1 <fmovd\+0xe1> f9 ?c3 ?ea ? * fmov fd30, ?fd26
+0*8c4 <fmovd\+0xe4> f9 ?c2 ?68 ? * fmov fd22, ?fd8
+0*8c7 <fmovd\+0xe7> fb ?47 ?30 ?a0 ? * fmov \(r3, ?r0\), ?fd10
+0*8cb <fmovd\+0xeb> fb ?47 ?d7 ?22 ? * fmov \(d1, ?r7\), ?fd18
+0*8cf <fmovd\+0xef> fb ?47 ?e1 ?60 ? * fmov \(d2, ?r1\), ?fd6
+0*8d3 <fmovd\+0xf3> fb ?47 ?82 ?e0 ? * fmov \(a0, ?r2\), ?fd14
+0*8d7 <fmovd\+0xf7> fb ?47 ?fc ?82 ? * fmov \(d3, ?d0\), ?fd24
+0*8db <fmovd\+0xfb> fb ?47 ?93 ?00 ? * fmov \(a1, ?r3\), ?fd0
+0*8df <fmovd\+0xff> fb ?47 ?ad ?c2 ? * fmov \(a2, ?d1\), ?fd28
+0*8e3 <fmovd\+0x103> fb ?47 ?4e ?42 ? * fmov \(r4, ?d2\), ?fd20
+0*8e7 <fmovd\+0x107> fb ?47 ?b8 ?e2 ? * fmov \(a3, ?a0\), ?fd30
+0*8eb <fmovd\+0x10b> fb ?47 ?5f ?62 ? * fmov \(r5, ?d3\), ?fd22
+0*8ef <fmovd\+0x10f> fb ?47 ?69 ?22 ? * fmov \(r6, ?a1\), ?fd18
+0*8f3 <fmovd\+0x113> fb ?57 ?ad ?00 ? * fmov fd0, ?\(a2, ?d1\)
+0*8f7 <fmovd\+0x117> fb ?57 ?4e ?42 ? * fmov fd20, ?\(r4, ?d2\)
+0*8fb <fmovd\+0x11b> fb ?57 ?b8 ?c2 ? * fmov fd28, ?\(a3, ?a0\)
+0*8ff <fmovd\+0x11f> fb ?57 ?5f ?a2 ? * fmov fd26, ?\(r5, ?d3\)
+0*903 <fmovd\+0x123> fb ?57 ?69 ?20 ? * fmov fd2, ?\(r6, ?a1\)
+0*907 <fmovd\+0x127> fb ?57 ?0a ?62 ? * fmov fd22, ?\(r0, ?a2\)
+0*90b <fmovd\+0x12b> fb ?57 ?74 ?a0 ? * fmov fd10, ?\(r7, ?r4\)
+0*90f <fmovd\+0x12f> fb ?57 ?1b ?82 ? * fmov fd24, ?\(r1, ?a3\)
+0*913 <fmovd\+0x133> fb ?57 ?25 ?02 ? * fmov fd16, ?\(r2, ?r5\)
+0*917 <fmovd\+0x137> fb ?57 ?c6 ?c0 ? * fmov fd12, ?\(d0, ?r6\)
+0*91b <fmovd\+0x13b> fb ?57 ?30 ?40 ? * fmov fd4, ?\(r3, ?r0\)
+0*91f <fmovd\+0x13f> fb ?a1 ?d4 ?ff ? * fmov \(-1, ?d1\), ?fd20
+0*923 <fmovd\+0x143> fb ?a1 ?ec ?e0 ? * fmov \(-32, ?d2\), ?fd28
+0*927 <fmovd\+0x147> fb ?a1 ?8a ?ec ? * fmov \(-20, ?a0\), ?fd26
+0*92b <fmovd\+0x14b> fb ?a0 ?f2 ?a1 ? * fmov \(-95, ?d3\), ?fd2
+0*92f <fmovd\+0x14f> fb ?a1 ?96 ?fe ? * fmov \(-2, ?a1\), ?fd22
+0*933 <fmovd\+0x153> fb ?a0 ?aa ?00 ? * fmov \(0, ?a2\), ?fd10
+0*937 <fmovd\+0x157> fb ?a1 ?48 ?7f ? * fmov \(127, ?r4\), ?fd24
+0*93b <fmovd\+0x15b> fb ?a1 ?b0 ?18 ? * fmov \(24, ?a3\), ?fd16
+0*93f <fmovd\+0x15f> fb ?a0 ?5c ?e5 ? * fmov \(-27, ?r5\), ?fd12
+0*943 <fmovd\+0x163> fb ?a0 ?64 ?68 ? * fmov \(104, ?r6\), ?fd4
+0*947 <fmovd\+0x167> fb ?a0 ?0a ?01 ? * fmov \(1, ?r0\), ?fd10
+0*94b <fmovd\+0x16b> fb ?a3 ?d2 ?7f ? * fmov \(d1\+, ?127\), ?fd18
+0*94f <fmovd\+0x16f> fb ?a2 ?e6 ?18 ? * fmov \(d2\+, ?24\), ?fd6
+0*953 <fmovd\+0x173> fb ?a2 ?8e ?e5 ? * fmov \(a0\+, ?-27\), ?fd14
+0*957 <fmovd\+0x177> fb ?a3 ?f8 ?68 ? * fmov \(d3\+, ?104\), ?fd24
+0*95b <fmovd\+0x17b> fb ?a2 ?90 ?01 ? * fmov \(a1\+, ?1\), ?fd0
+0*95f <fmovd\+0x17f> fb ?a3 ?ac ?80 ? * fmov \(a2\+, ?-128\), ?fd28
+0*963 <fmovd\+0x183> fb ?a3 ?44 ?20 ? * fmov \(r4\+, ?32\), ?fd20
+0*967 <fmovd\+0x187> fb ?a3 ?be ?49 ? * fmov \(a3\+, ?73\), ?fd30
+0*96b <fmovd\+0x18b> fb ?a3 ?56 ?21 ? * fmov \(r5\+, ?33\), ?fd22
+0*96f <fmovd\+0x18f> fb ?a3 ?62 ?bb ? * fmov \(r6\+, ?-69\), ?fd18
+0*973 <fmovd\+0x193> fb ?a3 ?0e ?ff ? * fmov \(r0\+, ?-1\), ?fd30
+0*977 <fmovd\+0x197> fb ?a5 ?02 ?7f ? * fmov \(127, ?sp\), ?fd18
+0*97b <fmovd\+0x19b> fb ?a4 ?06 ?18 ? * fmov \(24, ?sp\), ?fd6
+0*97f <fmovd\+0x19f> fb ?a4 ?0e ?e5 ? * fmov \(229, ?sp\), ?fd14
+0*983 <fmovd\+0x1a3> fb ?a5 ?08 ?68 ? * fmov \(104, ?sp\), ?fd24
+0*987 <fmovd\+0x1a7> fb ?a4 ?00 ?01 ? * fmov \(1, ?sp\), ?fd0
+0*98b <fmovd\+0x1ab> fb ?a5 ?0c ?80 ? * fmov \(128, ?sp\), ?fd28
+0*98f <fmovd\+0x1af> fb ?a5 ?04 ?20 ? * fmov \(32, ?sp\), ?fd20
+0*993 <fmovd\+0x1b3> fb ?a5 ?0e ?49 ? * fmov \(73, ?sp\), ?fd30
+0*997 <fmovd\+0x1b7> fb ?a5 ?06 ?21 ? * fmov \(33, ?sp\), ?fd22
+0*99b <fmovd\+0x1bb> fb ?a5 ?02 ?bb ? * fmov \(187, ?sp\), ?fd18
+0*99f <fmovd\+0x1bf> fb ?a5 ?0e ?ff ? * fmov \(255, ?sp\), ?fd30
+0*9a3 <fmovd\+0x1c3> fb ?b2 ?21 ?20 ? * fmov fd18, ?\(32, ?r1\)
+0*9a7 <fmovd\+0x1c7> fb ?b0 ?62 ?49 ? * fmov fd6, ?\(73, ?r2\)
+0*9ab <fmovd\+0x1cb> fb ?b0 ?ec ?21 ? * fmov fd14, ?\(33, ?d0\)
+0*9af <fmovd\+0x1cf> fb ?b2 ?83 ?bb ? * fmov fd24, ?\(-69, ?r3\)
+0*9b3 <fmovd\+0x1d3> fb ?b0 ?0d ?ff ? * fmov fd0, ?\(-1, ?d1\)
+0*9b7 <fmovd\+0x1d7> fb ?b2 ?ce ?e0 ? * fmov fd28, ?\(-32, ?d2\)
+0*9bb <fmovd\+0x1db> fb ?b2 ?48 ?ec ? * fmov fd20, ?\(-20, ?a0\)
+0*9bf <fmovd\+0x1df> fb ?b2 ?ef ?a1 ? * fmov fd30, ?\(-95, ?d3\)
+0*9c3 <fmovd\+0x1e3> fb ?b2 ?69 ?fe ? * fmov fd22, ?\(-2, ?a1\)
+0*9c7 <fmovd\+0x1e7> fb ?b2 ?2a ?00 ? * fmov fd18, ?\(0, ?a2\)
+0*9cb <fmovd\+0x1eb> fb ?b2 ?e4 ?7f ? * fmov fd30, ?\(127, ?r4\)
+0*9cf <fmovd\+0x1ef> fb ?b1 ?81 ?ec ? * fmov fd8, ?\(r1\+, ?-20\)
+0*9d3 <fmovd\+0x1f3> fb ?b3 ?02 ?a1 ? * fmov fd16, ?\(r2\+, ?-95\)
+0*9d7 <fmovd\+0x1f7> fb ?b1 ?4c ?fe ? * fmov fd4, ?\(d0\+, ?-2\)
+0*9db <fmovd\+0x1fb> fb ?b1 ?c3 ?00 ? * fmov fd12, ?\(r3\+, ?0\)
+0*9df <fmovd\+0x1ff> fb ?b1 ?ed ?7f ? * fmov fd14, ?\(d1\+, ?127\)
+0*9e3 <fmovd\+0x203> fb ?b1 ?6e ?18 ? * fmov fd6, ?\(d2\+, ?24\)
+0*9e7 <fmovd\+0x207> fb ?b1 ?28 ?e5 ? * fmov fd2, ?\(a0\+, ?-27\)
+0*9eb <fmovd\+0x20b> fb ?b3 ?af ?68 ? * fmov fd26, ?\(d3\+, ?104\)
+0*9ef <fmovd\+0x20f> fb ?b1 ?89 ?01 ? * fmov fd8, ?\(a1\+, ?1\)
+0*9f3 <fmovd\+0x213> fb ?b1 ?0a ?80 ? * fmov fd0, ?\(a2\+, ?-128\)
+0*9f7 <fmovd\+0x217> fb ?b3 ?44 ?20 ? * fmov fd20, ?\(r4\+, ?32\)
+0*9fb <fmovd\+0x21b> fb ?b6 ?c0 ?ec ? * fmov fd28, ?\(236, ?sp\)
+0*9ff <fmovd\+0x21f> fb ?b6 ?a0 ?a1 ? * fmov fd26, ?\(161, ?sp\)
+0*a03 <fmovd\+0x223> fb ?b4 ?20 ?fe ? * fmov fd2, ?\(254, ?sp\)
+0*a07 <fmovd\+0x227> fb ?b6 ?60 ?00 ? * fmov fd22, ?\(0, ?sp\)
+0*a0b <fmovd\+0x22b> fb ?b4 ?a0 ?7f ? * fmov fd10, ?\(127, ?sp\)
+0*a0f <fmovd\+0x22f> fb ?b6 ?80 ?18 ? * fmov fd24, ?\(24, ?sp\)
+0*a13 <fmovd\+0x233> fb ?b6 ?00 ?e5 ? * fmov fd16, ?\(229, ?sp\)
+0*a17 <fmovd\+0x237> fb ?b4 ?c0 ?68 ? * fmov fd12, ?\(104, ?sp\)
+0*a1b <fmovd\+0x23b> fb ?b4 ?40 ?01 ? * fmov fd4, ?\(1, ?sp\)
+0*a1f <fmovd\+0x23f> fb ?b4 ?a0 ?80 ? * fmov fd10, ?\(128, ?sp\)
+0*a23 <fmovd\+0x243> fb ?b6 ?20 ?20 ? * fmov fd18, ?\(32, ?sp\)
+0*a27 <fmovd\+0x247> fd ?a1 ?8a ?01 ?ff ?80 ? * fmov \(-8323327, ?a0\), ?fd26
+0*a2d <fmovd\+0x24d> fd ?a0 ?f2 ?10 ?20 ?c0 ? * fmov \(-4186096, ?d3\), ?fd2
+0*a33 <fmovd\+0x253> fd ?a1 ?96 ?43 ?65 ?87 ? * fmov \(-7903933, ?a1\), ?fd22
+0*a39 <fmovd\+0x259> fd ?a0 ?aa ?00 ?00 ?80 ? * fmov \(-8388608, ?a2\), ?fd10
+0*a3f <fmovd\+0x25f> fd ?a1 ?48 ?10 ?20 ?40 ? * fmov \(4202512, ?r4\), ?fd24
+0*a45 <fmovd\+0x265> fd ?a1 ?b0 ?80 ?ff ?01 ? * fmov \(130944, ?a3\), ?fd16
+0*a4b <fmovd\+0x26b> fd ?a0 ?5c ?00 ?00 ?40 ? * fmov \(4194304, ?r5\), ?fd12
+0*a51 <fmovd\+0x271> fd ?a0 ?64 ?56 ?34 ?12 ? * fmov \(1193046, ?r6\), ?fd4
+0*a57 <fmovd\+0x277> fd ?a0 ?0a ?01 ?ff ?80 ? * fmov \(-8323327, ?r0\), ?fd10
+0*a5d <fmovd\+0x27d> fd ?a1 ?72 ?10 ?20 ?c0 ? * fmov \(-4186096, ?r7\), ?fd18
+0*a63 <fmovd\+0x283> fd ?a0 ?16 ?43 ?65 ?87 ? * fmov \(-7903933, ?r1\), ?fd6
+0*a69 <fmovd\+0x289> fd ?a2 ?8e ?00 ?00 ?40 ? * fmov \(a0\+, ?4194304\), ?fd14
+0*a6f <fmovd\+0x28f> fd ?a3 ?f8 ?56 ?34 ?12 ? * fmov \(d3\+, ?1193046\), ?fd24
+0*a75 <fmovd\+0x295> fd ?a2 ?90 ?01 ?ff ?80 ? * fmov \(a1\+, ?-8323327\), ?fd0
+0*a7b <fmovd\+0x29b> fd ?a3 ?ac ?10 ?20 ?c0 ? * fmov \(a2\+, ?-4186096\), ?fd28
+0*a81 <fmovd\+0x2a1> fd ?a3 ?44 ?43 ?65 ?87 ? * fmov \(r4\+, ?-7903933\), ?fd20
+0*a87 <fmovd\+0x2a7> fd ?a3 ?be ?00 ?00 ?80 ? * fmov \(a3\+, ?-8388608\), ?fd30
+0*a8d <fmovd\+0x2ad> fd ?a3 ?56 ?10 ?20 ?40 ? * fmov \(r5\+, ?4202512\), ?fd22
+0*a93 <fmovd\+0x2b3> fd ?a3 ?62 ?80 ?ff ?01 ? * fmov \(r6\+, ?130944\), ?fd18
+0*a99 <fmovd\+0x2b9> fd ?a3 ?0e ?00 ?00 ?40 ? * fmov \(r0\+, ?4194304\), ?fd30
+0*a9f <fmovd\+0x2bf> fd ?a2 ?78 ?56 ?34 ?12 ? * fmov \(r7\+, ?1193046\), ?fd8
+0*aa5 <fmovd\+0x2c5> fd ?a3 ?10 ?01 ?ff ?80 ? * fmov \(r1\+, ?-8323327\), ?fd16
+0*aab <fmovd\+0x2cb> fd ?a4 ?0e ?00 ?00 ?40 ? * fmov \(4194304, ?sp\), ?fd14
+0*ab1 <fmovd\+0x2d1> fd ?a5 ?08 ?56 ?34 ?12 ? * fmov \(1193046, ?sp\), ?fd24
+0*ab7 <fmovd\+0x2d7> fd ?a4 ?00 ?01 ?ff ?80 ? * fmov \(8453889, ?sp\), ?fd0
+0*abd <fmovd\+0x2dd> fd ?a5 ?0c ?10 ?20 ?c0 ? * fmov \(12591120, ?sp\), ?fd28
+0*ac3 <fmovd\+0x2e3> fd ?a5 ?04 ?43 ?65 ?87 ? * fmov \(8873283, ?sp\), ?fd20
+0*ac9 <fmovd\+0x2e9> fd ?a5 ?0e ?00 ?00 ?80 ? * fmov \(8388608, ?sp\), ?fd30
+0*acf <fmovd\+0x2ef> fd ?a5 ?06 ?10 ?20 ?40 ? * fmov \(4202512, ?sp\), ?fd22
+0*ad5 <fmovd\+0x2f5> fd ?a5 ?02 ?80 ?ff ?01 ? * fmov \(130944, ?sp\), ?fd18
+0*adb <fmovd\+0x2fb> fd ?a5 ?0e ?00 ?00 ?40 ? * fmov \(4194304, ?sp\), ?fd30
+0*ae1 <fmovd\+0x301> fd ?a4 ?08 ?56 ?34 ?12 ? * fmov \(1193046, ?sp\), ?fd8
+0*ae7 <fmovd\+0x307> fd ?a5 ?00 ?01 ?ff ?80 ? * fmov \(8453889, ?sp\), ?fd16
+0*aed <fmovd\+0x30d> fd ?b0 ?ec ?10 ?20 ?40 ? * fmov fd14, ?\(4202512, ?d0\)
+0*af3 <fmovd\+0x313> fd ?b2 ?83 ?80 ?ff ?01 ? * fmov fd24, ?\(130944, ?r3\)
+0*af9 <fmovd\+0x319> fd ?b0 ?0d ?00 ?00 ?40 ? * fmov fd0, ?\(4194304, ?d1\)
+0*aff <fmovd\+0x31f> fd ?b2 ?ce ?56 ?34 ?12 ? * fmov fd28, ?\(1193046, ?d2\)
+0*b05 <fmovd\+0x325> fd ?b2 ?48 ?01 ?ff ?80 ? * fmov fd20, ?\(-8323327, ?a0\)
+0*b0b <fmovd\+0x32b> fd ?b2 ?ef ?10 ?20 ?c0 ? * fmov fd30, ?\(-4186096, ?d3\)
+0*b11 <fmovd\+0x331> fd ?b2 ?69 ?43 ?65 ?87 ? * fmov fd22, ?\(-7903933, ?a1\)
+0*b17 <fmovd\+0x337> fd ?b2 ?2a ?00 ?00 ?80 ? * fmov fd18, ?\(-8388608, ?a2\)
+0*b1d <fmovd\+0x33d> fd ?b2 ?e4 ?10 ?20 ?40 ? * fmov fd30, ?\(4202512, ?r4\)
+0*b23 <fmovd\+0x343> fd ?b0 ?8b ?80 ?ff ?01 ? * fmov fd8, ?\(130944, ?a3\)
+0*b29 <fmovd\+0x349> fd ?b2 ?05 ?00 ?00 ?40 ? * fmov fd16, ?\(4194304, ?r5\)
+0*b2f <fmovd\+0x34f> fd ?b1 ?4c ?43 ?65 ?87 ? * fmov fd4, ?\(d0\+, ?-7903933\)
+0*b35 <fmovd\+0x355> fd ?b1 ?c3 ?00 ?00 ?80 ? * fmov fd12, ?\(r3\+, ?-8388608\)
+0*b3b <fmovd\+0x35b> fd ?b1 ?ed ?10 ?20 ?40 ? * fmov fd14, ?\(d1\+, ?4202512\)
+0*b41 <fmovd\+0x361> fd ?b1 ?6e ?80 ?ff ?01 ? * fmov fd6, ?\(d2\+, ?130944\)
+0*b47 <fmovd\+0x367> fd ?b1 ?28 ?00 ?00 ?40 ? * fmov fd2, ?\(a0\+, ?4194304\)
+0*b4d <fmovd\+0x36d> fd ?b3 ?af ?56 ?34 ?12 ? * fmov fd26, ?\(d3\+, ?1193046\)
+0*b53 <fmovd\+0x373> fd ?b1 ?89 ?01 ?ff ?80 ? * fmov fd8, ?\(a1\+, ?-8323327\)
+0*b59 <fmovd\+0x379> fd ?b1 ?0a ?10 ?20 ?c0 ? * fmov fd0, ?\(a2\+, ?-4186096\)
+0*b5f <fmovd\+0x37f> fd ?b3 ?44 ?43 ?65 ?87 ? * fmov fd20, ?\(r4\+, ?-7903933\)
+0*b65 <fmovd\+0x385> fd ?b3 ?cb ?00 ?00 ?80 ? * fmov fd28, ?\(a3\+, ?-8388608\)
+0*b6b <fmovd\+0x38b> fd ?b3 ?a5 ?10 ?20 ?40 ? * fmov fd26, ?\(r5\+, ?4202512\)
+0*b71 <fmovd\+0x391> fd ?b4 ?20 ?43 ?65 ?87 ? * fmov fd2, ?\(8873283, ?sp\)
+0*b77 <fmovd\+0x397> fd ?b6 ?60 ?00 ?00 ?80 ? * fmov fd22, ?\(8388608, ?sp\)
+0*b7d <fmovd\+0x39d> fd ?b4 ?a0 ?10 ?20 ?40 ? * fmov fd10, ?\(4202512, ?sp\)
+0*b83 <fmovd\+0x3a3> fd ?b6 ?80 ?80 ?ff ?01 ? * fmov fd24, ?\(130944, ?sp\)
+0*b89 <fmovd\+0x3a9> fd ?b6 ?00 ?00 ?00 ?40 ? * fmov fd16, ?\(4194304, ?sp\)
+0*b8f <fmovd\+0x3af> fd ?b4 ?c0 ?56 ?34 ?12 ? * fmov fd12, ?\(1193046, ?sp\)
+0*b95 <fmovd\+0x3b5> fd ?b4 ?40 ?01 ?ff ?80 ? * fmov fd4, ?\(8453889, ?sp\)
+0*b9b <fmovd\+0x3bb> fd ?b4 ?a0 ?10 ?20 ?c0 ? * fmov fd10, ?\(12591120, ?sp\)
+0*ba1 <fmovd\+0x3c1> fd ?b6 ?20 ?43 ?65 ?87 ? * fmov fd18, ?\(8873283, ?sp\)
+0*ba7 <fmovd\+0x3c7> fd ?b4 ?60 ?00 ?00 ?80 ? * fmov fd6, ?\(8388608, ?sp\)
+0*bad <fmovd\+0x3cd> fd ?b4 ?e0 ?10 ?20 ?40 ? * fmov fd14, ?\(4202512, ?sp\)
+0*bb3 <fmovd\+0x3d3> fe ?41 ?96 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?a1\), ?fd22
+0*bba <fmovd\+0x3da> fe ?40 ?aa ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?a2\), ?fd10
+0*bc1 <fmovd\+0x3e1> fe ?41 ?48 ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?r4\), ?fd24
+0*bc8 <fmovd\+0x3e8> fe ?41 ?b0 ?80 ?ff ?ff ?01 ? * fmov \(33554304, ?a3\), ?fd16
+0*bcf <fmovd\+0x3ef> fe ?40 ?5c ?00 ?00 ?00 ?40 ? * fmov \(1073741824, ?r5\), ?fd12
+0*bd6 <fmovd\+0x3f6> fe ?40 ?64 ?78 ?56 ?34 ?12 ? * fmov \(305419896, ?r6\), ?fd4
+0*bdd <fmovd\+0x3fd> fe ?40 ?0a ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?r0\), ?fd10
+0*be4 <fmovd\+0x404> fe ?41 ?72 ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?r7\), ?fd18
+0*beb <fmovd\+0x40b> fe ?40 ?16 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?r1\), ?fd6
+0*bf2 <fmovd\+0x412> fe ?40 ?2e ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?r2\), ?fd14
+0*bf9 <fmovd\+0x419> fe ?41 ?c8 ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?d0\), ?fd24
+0*c00 <fmovd\+0x420> fe ?42 ?90 ?01 ?ff ?ff ?80 ? * fmov \(a1\+, ?-2130706687\), ?fd0
+0*c07 <fmovd\+0x427> fe ?43 ?ac ?08 ?10 ?20 ?c0 ? * fmov \(a2\+, ?-1071640568\), ?fd28
+0*c0e <fmovd\+0x42e> fe ?43 ?44 ?21 ?43 ?65 ?87 ? * fmov \(r4\+, ?-2023406815\), ?fd20
+0*c15 <fmovd\+0x435> fe ?43 ?be ?00 ?00 ?00 ?80 ? * fmov \(a3\+, ?-2147483648\), ?fd30
+0*c1c <fmovd\+0x43c> fe ?43 ?56 ?08 ?10 ?20 ?40 ? * fmov \(r5\+, ?1075843080\), ?fd22
+0*c23 <fmovd\+0x443> fe ?43 ?62 ?80 ?ff ?ff ?01 ? * fmov \(r6\+, ?33554304\), ?fd18
+0*c2a <fmovd\+0x44a> fe ?43 ?0e ?00 ?00 ?00 ?40 ? * fmov \(r0\+, ?1073741824\), ?fd30
+0*c31 <fmovd\+0x451> fe ?42 ?78 ?78 ?56 ?34 ?12 ? * fmov \(r7\+, ?305419896\), ?fd8
+0*c38 <fmovd\+0x458> fe ?43 ?10 ?01 ?ff ?ff ?80 ? * fmov \(r1\+, ?-2130706687\), ?fd16
+0*c3f <fmovd\+0x45f> fe ?42 ?24 ?08 ?10 ?20 ?c0 ? * fmov \(r2\+, ?-1071640568\), ?fd4
+0*c46 <fmovd\+0x466> fe ?42 ?cc ?21 ?43 ?65 ?87 ? * fmov \(d0\+, ?-2023406815\), ?fd12
+0*c4d <fmovd\+0x46d> fe ?44 ?00 ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?sp\), ?fd0
+0*c54 <fmovd\+0x474> fe ?45 ?0c ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?sp\), ?fd28
+0*c5b <fmovd\+0x47b> fe ?45 ?04 ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?sp\), ?fd20
+0*c62 <fmovd\+0x482> fe ?45 ?0e ?00 ?00 ?00 ?80 ? * fmov \(-2147483648, ?sp\), ?fd30
+0*c69 <fmovd\+0x489> fe ?45 ?06 ?08 ?10 ?20 ?40 ? * fmov \(1075843080, ?sp\), ?fd22
+0*c70 <fmovd\+0x490> fe ?45 ?02 ?80 ?ff ?ff ?01 ? * fmov \(33554304, ?sp\), ?fd18
+0*c77 <fmovd\+0x497> fe ?45 ?0e ?00 ?00 ?00 ?40 ? * fmov \(1073741824, ?sp\), ?fd30
+0*c7e <fmovd\+0x49e> fe ?44 ?08 ?78 ?56 ?34 ?12 ? * fmov \(305419896, ?sp\), ?fd8
+0*c85 <fmovd\+0x4a5> fe ?45 ?00 ?01 ?ff ?ff ?80 ? * fmov \(-2130706687, ?sp\), ?fd16
+0*c8c <fmovd\+0x4ac> fe ?44 ?04 ?08 ?10 ?20 ?c0 ? * fmov \(-1071640568, ?sp\), ?fd4
+0*c93 <fmovd\+0x4b3> fe ?44 ?0c ?21 ?43 ?65 ?87 ? * fmov \(-2023406815, ?sp\), ?fd12
+0*c9a <fmovd\+0x4ba> fe ?50 ?0d ?00 ?00 ?00 ?40 ? * fmov fd0, ?\(1073741824, ?d1\)
+0*ca1 <fmovd\+0x4c1> fe ?52 ?ce ?78 ?56 ?34 ?12 ? * fmov fd28, ?\(305419896, ?d2\)
+0*ca8 <fmovd\+0x4c8> fe ?52 ?48 ?01 ?ff ?ff ?80 ? * fmov fd20, ?\(-2130706687, ?a0\)
+0*caf <fmovd\+0x4cf> fe ?52 ?ef ?08 ?10 ?20 ?c0 ? * fmov fd30, ?\(-1071640568, ?d3\)
+0*cb6 <fmovd\+0x4d6> fe ?52 ?69 ?21 ?43 ?65 ?87 ? * fmov fd22, ?\(-2023406815, ?a1\)
+0*cbd <fmovd\+0x4dd> fe ?52 ?2a ?00 ?00 ?00 ?80 ? * fmov fd18, ?\(-2147483648, ?a2\)
+0*cc4 <fmovd\+0x4e4> fe ?52 ?e4 ?08 ?10 ?20 ?40 ? * fmov fd30, ?\(1075843080, ?r4\)
+0*ccb <fmovd\+0x4eb> fe ?50 ?8b ?80 ?ff ?ff ?01 ? * fmov fd8, ?\(33554304, ?a3\)
+0*cd2 <fmovd\+0x4f2> fe ?52 ?05 ?00 ?00 ?00 ?40 ? * fmov fd16, ?\(1073741824, ?r5\)
+0*cd9 <fmovd\+0x4f9> fe ?50 ?46 ?78 ?56 ?34 ?12 ? * fmov fd4, ?\(305419896, ?r6\)
+0*ce0 <fmovd\+0x500> fe ?50 ?c0 ?01 ?ff ?ff ?80 ? * fmov fd12, ?\(-2130706687, ?r0\)
+0*ce7 <fmovd\+0x507> fe ?51 ?ed ?08 ?10 ?20 ?40 ? * fmov fd14, ?\(d1\+, ?1075843080\)
+0*cee <fmovd\+0x50e> fe ?51 ?6e ?80 ?ff ?ff ?01 ? * fmov fd6, ?\(d2\+, ?33554304\)
+0*cf5 <fmovd\+0x515> fe ?51 ?28 ?00 ?00 ?00 ?40 ? * fmov fd2, ?\(a0\+, ?1073741824\)
+0*cfc <fmovd\+0x51c> fe ?53 ?af ?78 ?56 ?34 ?12 ? * fmov fd26, ?\(d3\+, ?305419896\)
+0*d03 <fmovd\+0x523> fe ?51 ?89 ?01 ?ff ?ff ?80 ? * fmov fd8, ?\(a1\+, ?-2130706687\)
+0*d0a <fmovd\+0x52a> fe ?51 ?0a ?08 ?10 ?20 ?c0 ? * fmov fd0, ?\(a2\+, ?-1071640568\)
+0*d11 <fmovd\+0x531> fe ?53 ?44 ?21 ?43 ?65 ?87 ? * fmov fd20, ?\(r4\+, ?-2023406815\)
+0*d18 <fmovd\+0x538> fe ?53 ?cb ?00 ?00 ?00 ?80 ? * fmov fd28, ?\(a3\+, ?-2147483648\)
+0*d1f <fmovd\+0x53f> fe ?53 ?a5 ?08 ?10 ?20 ?40 ? * fmov fd26, ?\(r5\+, ?1075843080\)
+0*d26 <fmovd\+0x546> fe ?51 ?26 ?80 ?ff ?ff ?01 ? * fmov fd2, ?\(r6\+, ?33554304\)
+0*d2d <fmovd\+0x54d> fe ?53 ?60 ?00 ?00 ?00 ?40 ? * fmov fd22, ?\(r0\+, ?1073741824\)
+0*d34 <fmovd\+0x554> fe ?54 ?a0 ?08 ?10 ?20 ?40 ? * fmov fd10, ?\(1075843080, ?sp\)
+0*d3b <fmovd\+0x55b> fe ?56 ?80 ?80 ?ff ?ff ?01 ? * fmov fd24, ?\(33554304, ?sp\)
+0*d42 <fmovd\+0x562> fe ?56 ?00 ?00 ?00 ?00 ?40 ? * fmov fd16, ?\(1073741824, ?sp\)
+0*d49 <fmovd\+0x569> fe ?54 ?c0 ?78 ?56 ?34 ?12 ? * fmov fd12, ?\(305419896, ?sp\)
+0*d50 <fmovd\+0x570> fe ?54 ?40 ?01 ?ff ?ff ?80 ? * fmov fd4, ?\(-2130706687, ?sp\)
+0*d57 <fmovd\+0x577> fe ?54 ?a0 ?08 ?10 ?20 ?c0 ? * fmov fd10, ?\(-1071640568, ?sp\)
+0*d5e <fmovd\+0x57e> fe ?56 ?20 ?21 ?43 ?65 ?87 ? * fmov fd18, ?\(-2023406815, ?sp\)
+0*d65 <fmovd\+0x585> fe ?54 ?60 ?00 ?00 ?00 ?80 ? * fmov fd6, ?\(-2147483648, ?sp\)
+0*d6c <fmovd\+0x58c> fe ?54 ?e0 ?08 ?10 ?20 ?40 ? * fmov fd14, ?\(1075843080, ?sp\)
+0*d73 <fmovd\+0x593> fe ?56 ?80 ?80 ?ff ?ff ?01 ? * fmov fd24, ?\(33554304, ?sp\)
+0*d7a <fmovd\+0x59a> fe ?54 ?00 ?00 ?00 ?00 ?40 ? * fmov fd0, ?\(1073741824, ?sp\)
+# fmovc:
+0*d81 <fmovc> f9 ?b5 ?70 ? * fmov r7, ?fpcr
+0*d84 <fmovc\+0x3> f9 ?b5 ?40 ? * fmov r4, ?fpcr
+0*d87 <fmovc\+0x6> f9 ?b5 ?e0 ? * fmov d2, ?fpcr
+0*d8a <fmovc\+0x9> f9 ?b5 ?10 ? * fmov r1, ?fpcr
+0*d8d <fmovc\+0xc> f9 ?b5 ?b0 ? * fmov a3, ?fpcr
+0*d90 <fmovc\+0xf> f9 ?b5 ?80 ? * fmov a0, ?fpcr
+0*d93 <fmovc\+0x12> f9 ?b5 ?20 ? * fmov r2, ?fpcr
+0*d96 <fmovc\+0x15> f9 ?b5 ?50 ? * fmov r5, ?fpcr
+0*d99 <fmovc\+0x18> f9 ?b5 ?f0 ? * fmov d3, ?fpcr
+0*d9c <fmovc\+0x1b> f9 ?b5 ?c0 ? * fmov d0, ?fpcr
+0*d9f <fmovc\+0x1e> f9 ?b5 ?60 ? * fmov r6, ?fpcr
+0*da2 <fmovc\+0x21> f9 ?b7 ?09 ? * fmov fpcr, ?a1
+0*da5 <fmovc\+0x24> f9 ?b7 ?03 ? * fmov fpcr, ?r3
+0*da8 <fmovc\+0x27> f9 ?b7 ?00 ? * fmov fpcr, ?r0
+0*dab <fmovc\+0x2a> f9 ?b7 ?0a ? * fmov fpcr, ?a2
+0*dae <fmovc\+0x2d> f9 ?b7 ?0d ? * fmov fpcr, ?d1
+0*db1 <fmovc\+0x30> f9 ?b7 ?07 ? * fmov fpcr, ?r7
+0*db4 <fmovc\+0x33> f9 ?b7 ?04 ? * fmov fpcr, ?r4
+0*db7 <fmovc\+0x36> f9 ?b7 ?0e ? * fmov fpcr, ?d2
+0*dba <fmovc\+0x39> f9 ?b7 ?01 ? * fmov fpcr, ?r1
+0*dbd <fmovc\+0x3c> f9 ?b7 ?0b ? * fmov fpcr, ?a3
+0*dc0 <fmovc\+0x3f> f9 ?b7 ?08 ? * fmov fpcr, ?a0
+0*dc3 <fmovc\+0x42> fd ?b5 ?00 ?00 ?00 ?40 ? * fmov 1073741824, ?fpcr
+0*dc9 <fmovc\+0x48> fd ?b5 ?08 ?10 ?20 ?c0 ? * fmov -1071640568, ?fpcr
+0*dcf <fmovc\+0x4e> fd ?b5 ?08 ?10 ?20 ?40 ? * fmov 1075843080, ?fpcr
+0*dd5 <fmovc\+0x54> fd ?b5 ?78 ?56 ?34 ?12 ? * fmov 305419896, ?fpcr
+0*ddb <fmovc\+0x5a> fd ?b5 ?21 ?43 ?65 ?87 ? * fmov -2023406815, ?fpcr
+0*de1 <fmovc\+0x60> fd ?b5 ?80 ?ff ?ff ?01 ? * fmov 33554304, ?fpcr
+0*de7 <fmovc\+0x66> fd ?b5 ?01 ?ff ?ff ?80 ? * fmov -2130706687, ?fpcr
+0*ded <fmovc\+0x6c> fd ?b5 ?00 ?00 ?00 ?80 ? * fmov -2147483648, ?fpcr
+0*df3 <fmovc\+0x72> fd ?b5 ?00 ?00 ?00 ?40 ? * fmov 1073741824, ?fpcr
+0*df9 <fmovc\+0x78> fd ?b5 ?08 ?10 ?20 ?c0 ? * fmov -1071640568, ?fpcr
+0*dff <fmovc\+0x7e> fd ?b5 ?08 ?10 ?20 ?40 ? * fmov 1075843080, ?fpcr
+# sfparith:
+0*e05 <sfparith> f9 ?44 ?04 ? * fabs fs4
+0*e08 <sfparith\+0x3> f9 ?45 ?0e ? * fabs fs30
+0*e0b <sfparith\+0x6> f9 ?45 ?01 ? * fabs fs17
+0*e0e <sfparith\+0x9> f9 ?44 ?0b ? * fabs fs11
+0*e11 <sfparith\+0xc> f9 ?45 ?08 ? * fabs fs24
+0*e14 <sfparith\+0xf> f9 ?45 ?02 ? * fabs fs18
+0*e17 <sfparith\+0x12> f9 ?44 ?05 ? * fabs fs5
+0*e1a <sfparith\+0x15> f9 ?45 ?0f ? * fabs fs31
+0*e1d <sfparith\+0x18> f9 ?44 ?0c ? * fabs fs12
+0*e20 <sfparith\+0x1b> f9 ?44 ?06 ? * fabs fs6
+0*e23 <sfparith\+0x1e> f9 ?45 ?09 ? * fabs fs25
+0*e26 <sfparith\+0x21> fb ?44 ?30 ?08 ? * fabs fs19, ?fs0
+0*e2a <sfparith\+0x25> fb ?44 ?d0 ?70 ? * fabs fs13, ?fs7
+0*e2e <sfparith\+0x29> fb ?44 ?e0 ?10 ? * fabs fs14, ?fs1
+0*e32 <sfparith\+0x2d> fb ?44 ?80 ?20 ? * fabs fs8, ?fs2
+0*e36 <sfparith\+0x31> fb ?44 ?f0 ?c2 ? * fabs fs15, ?fs28
+0*e3a <sfparith\+0x35> fb ?44 ?90 ?30 ? * fabs fs9, ?fs3
+0*e3e <sfparith\+0x39> fb ?44 ?a0 ?d2 ? * fabs fs10, ?fs29
+0*e42 <sfparith\+0x3d> fb ?44 ?40 ?e2 ? * fabs fs4, ?fs30
+0*e46 <sfparith\+0x41> fb ?44 ?b0 ?82 ? * fabs fs11, ?fs24
+0*e4a <sfparith\+0x45> fb ?44 ?50 ?f2 ? * fabs fs5, ?fs31
+0*e4e <sfparith\+0x49> fb ?44 ?60 ?92 ? * fabs fs6, ?fs25
+0*e52 <sfparith\+0x4d> f9 ?46 ?00 ? * fneg fs0
+0*e55 <sfparith\+0x50> f9 ?47 ?0a ? * fneg fs26
+0*e58 <sfparith\+0x53> f9 ?46 ?0d ? * fneg fs13
+0*e5b <sfparith\+0x56> f9 ?46 ?07 ? * fneg fs7
+0*e5e <sfparith\+0x59> f9 ?47 ?04 ? * fneg fs20
+0*e61 <sfparith\+0x5c> f9 ?46 ?0e ? * fneg fs14
+0*e64 <sfparith\+0x5f> f9 ?46 ?01 ? * fneg fs1
+0*e67 <sfparith\+0x62> f9 ?47 ?0b ? * fneg fs27
+0*e6a <sfparith\+0x65> f9 ?46 ?08 ? * fneg fs8
+0*e6d <sfparith\+0x68> f9 ?46 ?02 ? * fneg fs2
+0*e70 <sfparith\+0x6b> f9 ?47 ?05 ? * fneg fs21
+0*e73 <sfparith\+0x6e> fb ?46 ?f0 ?c2 ? * fneg fs15, ?fs28
+0*e77 <sfparith\+0x72> fb ?46 ?90 ?30 ? * fneg fs9, ?fs3
+0*e7b <sfparith\+0x76> fb ?46 ?a0 ?d2 ? * fneg fs10, ?fs29
+0*e7f <sfparith\+0x7a> fb ?46 ?40 ?e2 ? * fneg fs4, ?fs30
+0*e83 <sfparith\+0x7e> fb ?46 ?b0 ?82 ? * fneg fs11, ?fs24
+0*e87 <sfparith\+0x82> fb ?46 ?50 ?f2 ? * fneg fs5, ?fs31
+0*e8b <sfparith\+0x86> fb ?46 ?60 ?92 ? * fneg fs6, ?fs25
+0*e8f <sfparith\+0x8a> fb ?46 ?00 ?a2 ? * fneg fs0, ?fs26
+0*e93 <sfparith\+0x8e> fb ?46 ?70 ?42 ? * fneg fs7, ?fs20
+0*e97 <sfparith\+0x92> fb ?46 ?10 ?b2 ? * fneg fs1, ?fs27
+0*e9b <sfparith\+0x96> fb ?46 ?20 ?52 ? * fneg fs2, ?fs21
+0*e9f <sfparith\+0x9a> f9 ?51 ?0c ? * frsqrt fs28
+0*ea2 <sfparith\+0x9d> f9 ?51 ?06 ? * frsqrt fs22
+0*ea5 <sfparith\+0xa0> f9 ?50 ?09 ? * frsqrt fs9
+0*ea8 <sfparith\+0xa3> f9 ?50 ?03 ? * frsqrt fs3
+0*eab <sfparith\+0xa6> f9 ?51 ?00 ? * frsqrt fs16
+0*eae <sfparith\+0xa9> f9 ?50 ?0a ? * frsqrt fs10
+0*eb1 <sfparith\+0xac> f9 ?51 ?0d ? * frsqrt fs29
+0*eb4 <sfparith\+0xaf> f9 ?51 ?07 ? * frsqrt fs23
+0*eb7 <sfparith\+0xb2> f9 ?50 ?04 ? * frsqrt fs4
+0*eba <sfparith\+0xb5> f9 ?51 ?0e ? * frsqrt fs30
+0*ebd <sfparith\+0xb8> f9 ?51 ?01 ? * frsqrt fs17
+0*ec0 <sfparith\+0xbb> fb ?50 ?b0 ?82 ? * frsqrt fs11, ?fs24
+0*ec4 <sfparith\+0xbf> fb ?50 ?50 ?f2 ? * frsqrt fs5, ?fs31
+0*ec8 <sfparith\+0xc3> fb ?50 ?60 ?92 ? * frsqrt fs6, ?fs25
+0*ecc <sfparith\+0xc7> fb ?50 ?00 ?a2 ? * frsqrt fs0, ?fs26
+0*ed0 <sfparith\+0xcb> fb ?50 ?70 ?42 ? * frsqrt fs7, ?fs20
+0*ed4 <sfparith\+0xcf> fb ?50 ?10 ?b2 ? * frsqrt fs1, ?fs27
+0*ed8 <sfparith\+0xd3> fb ?50 ?20 ?52 ? * frsqrt fs2, ?fs21
+0*edc <sfparith\+0xd7> fb ?50 ?c0 ?6a ? * frsqrt fs28, ?fs22
+0*ee0 <sfparith\+0xdb> fb ?50 ?30 ?02 ? * frsqrt fs3, ?fs16
+0*ee4 <sfparith\+0xdf> fb ?50 ?d0 ?7a ? * frsqrt fs29, ?fs23
+0*ee8 <sfparith\+0xe3> fb ?50 ?e0 ?1a ? * frsqrt fs30, ?fs17
+0*eec <sfparith\+0xe7> f9 ?53 ?08 ? * fsqrt fs24
+0*eef <sfparith\+0xea> f9 ?53 ?02 ? * fsqrt fs18
+0*ef2 <sfparith\+0xed> f9 ?52 ?05 ? * fsqrt fs5
+0*ef5 <sfparith\+0xf0> f9 ?53 ?0f ? * fsqrt fs31
+0*ef8 <sfparith\+0xf3> f9 ?52 ?0c ? * fsqrt fs12
+0*efb <sfparith\+0xf6> f9 ?52 ?06 ? * fsqrt fs6
+0*efe <sfparith\+0xf9> f9 ?53 ?09 ? * fsqrt fs25
+0*f01 <sfparith\+0xfc> f9 ?53 ?03 ? * fsqrt fs19
+0*f04 <sfparith\+0xff> f9 ?52 ?00 ? * fsqrt fs0
+0*f07 <sfparith\+0x102> f9 ?53 ?0a ? * fsqrt fs26
+0*f0a <sfparith\+0x105> f9 ?52 ?0d ? * fsqrt fs13
+0*f0d <sfparith\+0x108> fb ?54 ?70 ?42 ? * fsqrt fs7, ?fs20
+0*f11 <sfparith\+0x10c> fb ?54 ?10 ?b2 ? * fsqrt fs1, ?fs27
+0*f15 <sfparith\+0x110> fb ?54 ?20 ?52 ? * fsqrt fs2, ?fs21
+0*f19 <sfparith\+0x114> fb ?54 ?c0 ?6a ? * fsqrt fs28, ?fs22
+0*f1d <sfparith\+0x118> fb ?54 ?30 ?02 ? * fsqrt fs3, ?fs16
+0*f21 <sfparith\+0x11c> fb ?54 ?d0 ?7a ? * fsqrt fs29, ?fs23
+0*f25 <sfparith\+0x120> fb ?54 ?e0 ?1a ? * fsqrt fs30, ?fs17
+0*f29 <sfparith\+0x124> fb ?54 ?80 ?2a ? * fsqrt fs24, ?fs18
+0*f2d <sfparith\+0x128> fb ?54 ?f0 ?c8 ? * fsqrt fs31, ?fs12
+0*f31 <sfparith\+0x12c> fb ?54 ?90 ?3a ? * fsqrt fs25, ?fs19
+0*f35 <sfparith\+0x130> fb ?54 ?a0 ?d8 ? * fsqrt fs26, ?fs13
+0*f39 <sfparith\+0x134> f9 ?56 ?4e ? * fcmp fs20, ?fs14
+0*f3c <sfparith\+0x137> f9 ?56 ?b8 ? * fcmp fs27, ?fs8
+0*f3f <sfparith\+0x13a> f9 ?56 ?5f ? * fcmp fs21, ?fs15
+0*f42 <sfparith\+0x13d> f9 ?56 ?69 ? * fcmp fs22, ?fs9
+0*f45 <sfparith\+0x140> f9 ?56 ?0a ? * fcmp fs16, ?fs10
+0*f48 <sfparith\+0x143> f9 ?56 ?74 ? * fcmp fs23, ?fs4
+0*f4b <sfparith\+0x146> f9 ?56 ?1b ? * fcmp fs17, ?fs11
+0*f4e <sfparith\+0x149> f9 ?56 ?25 ? * fcmp fs18, ?fs5
+0*f51 <sfparith\+0x14c> f9 ?54 ?c6 ? * fcmp fs12, ?fs6
+0*f54 <sfparith\+0x14f> f9 ?56 ?30 ? * fcmp fs19, ?fs0
+0*f57 <sfparith\+0x152> f9 ?54 ?d7 ? * fcmp fs13, ?fs7
+0*f5a <sfparith\+0x155> fe ?35 ?10 ?21 ?43 ?65 ?87 ? * fcmp -2023406815, ?fs1
+0*f61 <sfparith\+0x15c> fe ?35 ?20 ?00 ?00 ?00 ?80 ? * fcmp -2147483648, ?fs2
+0*f68 <sfparith\+0x163> fe ?37 ?c0 ?08 ?10 ?20 ?40 ? * fcmp 1075843080, ?fs28
+0*f6f <sfparith\+0x16a> fe ?35 ?30 ?80 ?ff ?ff ?01 ? * fcmp 33554304, ?fs3
+0*f76 <sfparith\+0x171> fe ?37 ?d0 ?00 ?00 ?00 ?40 ? * fcmp 1073741824, ?fs29
+0*f7d <sfparith\+0x178> fe ?37 ?e0 ?78 ?56 ?34 ?12 ? * fcmp 305419896, ?fs30
+0*f84 <sfparith\+0x17f> fe ?37 ?80 ?01 ?ff ?ff ?80 ? * fcmp -2130706687, ?fs24
+0*f8b <sfparith\+0x186> fe ?37 ?f0 ?08 ?10 ?20 ?c0 ? * fcmp -1071640568, ?fs31
+0*f92 <sfparith\+0x18d> fe ?37 ?90 ?21 ?43 ?65 ?87 ? * fcmp -2023406815, ?fs25
+0*f99 <sfparith\+0x194> fe ?37 ?a0 ?00 ?00 ?00 ?80 ? * fcmp -2147483648, ?fs26
+0*fa0 <sfparith\+0x19b> fe ?37 ?40 ?08 ?10 ?20 ?40 ? * fcmp 1075843080, ?fs20
+0*fa7 <sfparith\+0x1a2> f9 ?61 ?1b ? * fadd fs1, ?fs27
+0*faa <sfparith\+0x1a5> f9 ?61 ?25 ? * fadd fs2, ?fs21
+0*fad <sfparith\+0x1a8> f9 ?63 ?c6 ? * fadd fs28, ?fs22
+0*fb0 <sfparith\+0x1ab> f9 ?61 ?30 ? * fadd fs3, ?fs16
+0*fb3 <sfparith\+0x1ae> f9 ?63 ?d7 ? * fadd fs29, ?fs23
+0*fb6 <sfparith\+0x1b1> f9 ?63 ?e1 ? * fadd fs30, ?fs17
+0*fb9 <sfparith\+0x1b4> f9 ?63 ?82 ? * fadd fs24, ?fs18
+0*fbc <sfparith\+0x1b7> f9 ?62 ?fc ? * fadd fs31, ?fs12
+0*fbf <sfparith\+0x1ba> f9 ?63 ?93 ? * fadd fs25, ?fs19
+0*fc2 <sfparith\+0x1bd> f9 ?62 ?ad ? * fadd fs26, ?fs13
+0*fc5 <sfparith\+0x1c0> f9 ?62 ?4e ? * fadd fs20, ?fs14
+0*fc8 <sfparith\+0x1c3> fb ?60 ?b8 ?28 ? * fadd fs27, ?fs8, ?fs2
+0*fcc <sfparith\+0x1c7> fb ?60 ?5f ?ca ? * fadd fs21, ?fs15, ?fs28
+0*fd0 <sfparith\+0x1cb> fb ?60 ?69 ?38 ? * fadd fs22, ?fs9, ?fs3
+0*fd4 <sfparith\+0x1cf> fb ?60 ?0a ?da ? * fadd fs16, ?fs10, ?fs29
+0*fd8 <sfparith\+0x1d3> fb ?60 ?74 ?ea ? * fadd fs23, ?fs4, ?fs30
+0*fdc <sfparith\+0x1d7> fb ?60 ?1b ?8a ? * fadd fs17, ?fs11, ?fs24
+0*fe0 <sfparith\+0x1db> fb ?60 ?25 ?fa ? * fadd fs18, ?fs5, ?fs31
+0*fe4 <sfparith\+0x1df> fb ?60 ?c6 ?92 ? * fadd fs12, ?fs6, ?fs25
+0*fe8 <sfparith\+0x1e3> fb ?60 ?30 ?aa ? * fadd fs19, ?fs0, ?fs26
+0*fec <sfparith\+0x1e7> fb ?60 ?d7 ?42 ? * fadd fs13, ?fs7, ?fs20
+0*ff0 <sfparith\+0x1eb> fb ?60 ?e1 ?b2 ? * fadd fs14, ?fs1, ?fs27
+0*ff4 <sfparith\+0x1ef> fe ?61 ?25 ?00 ?00 ?00 ?80 ? * fadd -2147483648, ?fs2, ?fs21
+0*ffb <sfparith\+0x1f6> fe ?63 ?c6 ?08 ?10 ?20 ?40 ? * fadd 1075843080, ?fs28, ?fs22
+0*1002 <sfparith\+0x1fd> fe ?61 ?30 ?80 ?ff ?ff ?01 ? * fadd 33554304, ?fs3, ?fs16
+0*1009 <sfparith\+0x204> fe ?63 ?d7 ?00 ?00 ?00 ?40 ? * fadd 1073741824, ?fs29, ?fs23
+0*1010 <sfparith\+0x20b> fe ?63 ?e1 ?78 ?56 ?34 ?12 ? * fadd 305419896, ?fs30, ?fs17
+0*1017 <sfparith\+0x212> fe ?63 ?82 ?01 ?ff ?ff ?80 ? * fadd -2130706687, ?fs24, ?fs18
+0*101e <sfparith\+0x219> fe ?62 ?fc ?08 ?10 ?20 ?c0 ? * fadd -1071640568, ?fs31, ?fs12
+0*1025 <sfparith\+0x220> fe ?63 ?93 ?21 ?43 ?65 ?87 ? * fadd -2023406815, ?fs25, ?fs19
+0*102c <sfparith\+0x227> fe ?62 ?ad ?00 ?00 ?00 ?80 ? * fadd -2147483648, ?fs26, ?fs13
+0*1033 <sfparith\+0x22e> fe ?62 ?4e ?08 ?10 ?20 ?40 ? * fadd 1075843080, ?fs20, ?fs14
+0*103a <sfparith\+0x235> fe ?62 ?b8 ?80 ?ff ?ff ?01 ? * fadd 33554304, ?fs27, ?fs8
+0*1041 <sfparith\+0x23c> f9 ?65 ?25 ? * fsub fs2, ?fs21
+0*1044 <sfparith\+0x23f> f9 ?67 ?c6 ? * fsub fs28, ?fs22
+0*1047 <sfparith\+0x242> f9 ?65 ?30 ? * fsub fs3, ?fs16
+0*104a <sfparith\+0x245> f9 ?67 ?d7 ? * fsub fs29, ?fs23
+0*104d <sfparith\+0x248> f9 ?67 ?e1 ? * fsub fs30, ?fs17
+0*1050 <sfparith\+0x24b> f9 ?67 ?82 ? * fsub fs24, ?fs18
+0*1053 <sfparith\+0x24e> f9 ?66 ?fc ? * fsub fs31, ?fs12
+0*1056 <sfparith\+0x251> f9 ?67 ?93 ? * fsub fs25, ?fs19
+0*1059 <sfparith\+0x254> f9 ?66 ?ad ? * fsub fs26, ?fs13
+0*105c <sfparith\+0x257> f9 ?66 ?4e ? * fsub fs20, ?fs14
+0*105f <sfparith\+0x25a> f9 ?66 ?b8 ? * fsub fs27, ?fs8
+0*1062 <sfparith\+0x25d> fb ?64 ?5f ?ca ? * fsub fs21, ?fs15, ?fs28
+0*1066 <sfparith\+0x261> fb ?64 ?69 ?38 ? * fsub fs22, ?fs9, ?fs3
+0*106a <sfparith\+0x265> fb ?64 ?0a ?da ? * fsub fs16, ?fs10, ?fs29
+0*106e <sfparith\+0x269> fb ?64 ?74 ?ea ? * fsub fs23, ?fs4, ?fs30
+0*1072 <sfparith\+0x26d> fb ?64 ?1b ?8a ? * fsub fs17, ?fs11, ?fs24
+0*1076 <sfparith\+0x271> fb ?64 ?25 ?fa ? * fsub fs18, ?fs5, ?fs31
+0*107a <sfparith\+0x275> fb ?64 ?c6 ?92 ? * fsub fs12, ?fs6, ?fs25
+0*107e <sfparith\+0x279> fb ?64 ?30 ?aa ? * fsub fs19, ?fs0, ?fs26
+0*1082 <sfparith\+0x27d> fb ?64 ?d7 ?42 ? * fsub fs13, ?fs7, ?fs20
+0*1086 <sfparith\+0x281> fb ?64 ?e1 ?b2 ? * fsub fs14, ?fs1, ?fs27
+0*108a <sfparith\+0x285> fb ?64 ?82 ?52 ? * fsub fs8, ?fs2, ?fs21
+0*108e <sfparith\+0x289> fe ?67 ?c6 ?08 ?10 ?20 ?40 ? * fsub 1075843080, ?fs28, ?fs22
+0*1095 <sfparith\+0x290> fe ?65 ?30 ?80 ?ff ?ff ?01 ? * fsub 33554304, ?fs3, ?fs16
+0*109c <sfparith\+0x297> fe ?67 ?d7 ?00 ?00 ?00 ?40 ? * fsub 1073741824, ?fs29, ?fs23
+0*10a3 <sfparith\+0x29e> fe ?67 ?e1 ?78 ?56 ?34 ?12 ? * fsub 305419896, ?fs30, ?fs17
+0*10aa <sfparith\+0x2a5> fe ?67 ?82 ?01 ?ff ?ff ?80 ? * fsub -2130706687, ?fs24, ?fs18
+0*10b1 <sfparith\+0x2ac> fe ?66 ?fc ?08 ?10 ?20 ?c0 ? * fsub -1071640568, ?fs31, ?fs12
+0*10b8 <sfparith\+0x2b3> fe ?67 ?93 ?21 ?43 ?65 ?87 ? * fsub -2023406815, ?fs25, ?fs19
+0*10bf <sfparith\+0x2ba> fe ?66 ?ad ?00 ?00 ?00 ?80 ? * fsub -2147483648, ?fs26, ?fs13
+0*10c6 <sfparith\+0x2c1> fe ?66 ?4e ?08 ?10 ?20 ?40 ? * fsub 1075843080, ?fs20, ?fs14
+0*10cd <sfparith\+0x2c8> fe ?66 ?b8 ?80 ?ff ?ff ?01 ? * fsub 33554304, ?fs27, ?fs8
+0*10d4 <sfparith\+0x2cf> fe ?66 ?5f ?00 ?00 ?00 ?40 ? * fsub 1073741824, ?fs21, ?fs15
+0*10db <sfparith\+0x2d6> f9 ?73 ?c6 ? * fmul fs28, ?fs22
+0*10de <sfparith\+0x2d9> f9 ?71 ?30 ? * fmul fs3, ?fs16
+0*10e1 <sfparith\+0x2dc> f9 ?73 ?d7 ? * fmul fs29, ?fs23
+0*10e4 <sfparith\+0x2df> f9 ?73 ?e1 ? * fmul fs30, ?fs17
+0*10e7 <sfparith\+0x2e2> f9 ?73 ?82 ? * fmul fs24, ?fs18
+0*10ea <sfparith\+0x2e5> f9 ?72 ?fc ? * fmul fs31, ?fs12
+0*10ed <sfparith\+0x2e8> f9 ?73 ?93 ? * fmul fs25, ?fs19
+0*10f0 <sfparith\+0x2eb> f9 ?72 ?ad ? * fmul fs26, ?fs13
+0*10f3 <sfparith\+0x2ee> f9 ?72 ?4e ? * fmul fs20, ?fs14
+0*10f6 <sfparith\+0x2f1> f9 ?72 ?b8 ? * fmul fs27, ?fs8
+0*10f9 <sfparith\+0x2f4> f9 ?72 ?5f ? * fmul fs21, ?fs15
+0*10fc <sfparith\+0x2f7> fb ?70 ?69 ?38 ? * fmul fs22, ?fs9, ?fs3
+0*1100 <sfparith\+0x2fb> fb ?70 ?0a ?da ? * fmul fs16, ?fs10, ?fs29
+0*1104 <sfparith\+0x2ff> fb ?70 ?74 ?ea ? * fmul fs23, ?fs4, ?fs30
+0*1108 <sfparith\+0x303> fb ?70 ?1b ?8a ? * fmul fs17, ?fs11, ?fs24
+0*110c <sfparith\+0x307> fb ?70 ?25 ?fa ? * fmul fs18, ?fs5, ?fs31
+0*1110 <sfparith\+0x30b> fb ?70 ?c6 ?92 ? * fmul fs12, ?fs6, ?fs25
+0*1114 <sfparith\+0x30f> fb ?70 ?30 ?aa ? * fmul fs19, ?fs0, ?fs26
+0*1118 <sfparith\+0x313> fb ?70 ?d7 ?42 ? * fmul fs13, ?fs7, ?fs20
+0*111c <sfparith\+0x317> fb ?70 ?e1 ?b2 ? * fmul fs14, ?fs1, ?fs27
+0*1120 <sfparith\+0x31b> fb ?70 ?82 ?52 ? * fmul fs8, ?fs2, ?fs21
+0*1124 <sfparith\+0x31f> fb ?70 ?fc ?66 ? * fmul fs15, ?fs28, ?fs22
+0*1128 <sfparith\+0x323> fe ?71 ?30 ?80 ?ff ?ff ?01 ? * fmul 33554304, ?fs3, ?fs16
+0*112f <sfparith\+0x32a> fe ?73 ?d7 ?00 ?00 ?00 ?40 ? * fmul 1073741824, ?fs29, ?fs23
+0*1136 <sfparith\+0x331> fe ?73 ?e1 ?78 ?56 ?34 ?12 ? * fmul 305419896, ?fs30, ?fs17
+0*113d <sfparith\+0x338> fe ?73 ?82 ?01 ?ff ?ff ?80 ? * fmul -2130706687, ?fs24, ?fs18
+0*1144 <sfparith\+0x33f> fe ?72 ?fc ?08 ?10 ?20 ?c0 ? * fmul -1071640568, ?fs31, ?fs12
+0*114b <sfparith\+0x346> fe ?73 ?93 ?21 ?43 ?65 ?87 ? * fmul -2023406815, ?fs25, ?fs19
+0*1152 <sfparith\+0x34d> fe ?72 ?ad ?00 ?00 ?00 ?80 ? * fmul -2147483648, ?fs26, ?fs13
+0*1159 <sfparith\+0x354> fe ?72 ?4e ?08 ?10 ?20 ?40 ? * fmul 1075843080, ?fs20, ?fs14
+0*1160 <sfparith\+0x35b> fe ?72 ?b8 ?80 ?ff ?ff ?01 ? * fmul 33554304, ?fs27, ?fs8
+0*1167 <sfparith\+0x362> fe ?72 ?5f ?00 ?00 ?00 ?40 ? * fmul 1073741824, ?fs21, ?fs15
+0*116e <sfparith\+0x369> fe ?72 ?69 ?78 ?56 ?34 ?12 ? * fmul 305419896, ?fs22, ?fs9
+0*1175 <sfparith\+0x370> f9 ?75 ?30 ? * fdiv fs3, ?fs16
+0*1178 <sfparith\+0x373> f9 ?77 ?d7 ? * fdiv fs29, ?fs23
+0*117b <sfparith\+0x376> f9 ?77 ?e1 ? * fdiv fs30, ?fs17
+0*117e <sfparith\+0x379> f9 ?77 ?82 ? * fdiv fs24, ?fs18
+0*1181 <sfparith\+0x37c> f9 ?76 ?fc ? * fdiv fs31, ?fs12
+0*1184 <sfparith\+0x37f> f9 ?77 ?93 ? * fdiv fs25, ?fs19
+0*1187 <sfparith\+0x382> f9 ?76 ?ad ? * fdiv fs26, ?fs13
+0*118a <sfparith\+0x385> f9 ?76 ?4e ? * fdiv fs20, ?fs14
+0*118d <sfparith\+0x388> f9 ?76 ?b8 ? * fdiv fs27, ?fs8
+0*1190 <sfparith\+0x38b> f9 ?76 ?5f ? * fdiv fs21, ?fs15
+0*1193 <sfparith\+0x38e> f9 ?76 ?69 ? * fdiv fs22, ?fs9
+0*1196 <sfparith\+0x391> fb ?74 ?0a ?da ? * fdiv fs16, ?fs10, ?fs29
+0*119a <sfparith\+0x395> fb ?74 ?74 ?ea ? * fdiv fs23, ?fs4, ?fs30
+0*119e <sfparith\+0x399> fb ?74 ?1b ?8a ? * fdiv fs17, ?fs11, ?fs24
+0*11a2 <sfparith\+0x39d> fb ?74 ?25 ?fa ? * fdiv fs18, ?fs5, ?fs31
+0*11a6 <sfparith\+0x3a1> fb ?74 ?c6 ?92 ? * fdiv fs12, ?fs6, ?fs25
+0*11aa <sfparith\+0x3a5> fb ?74 ?30 ?aa ? * fdiv fs19, ?fs0, ?fs26
+0*11ae <sfparith\+0x3a9> fb ?74 ?d7 ?42 ? * fdiv fs13, ?fs7, ?fs20
+0*11b2 <sfparith\+0x3ad> fb ?74 ?e1 ?b2 ? * fdiv fs14, ?fs1, ?fs27
+0*11b6 <sfparith\+0x3b1> fb ?74 ?82 ?52 ? * fdiv fs8, ?fs2, ?fs21
+0*11ba <sfparith\+0x3b5> fb ?74 ?fc ?66 ? * fdiv fs15, ?fs28, ?fs22
+0*11be <sfparith\+0x3b9> fb ?74 ?93 ?02 ? * fdiv fs9, ?fs3, ?fs16
+0*11c2 <sfparith\+0x3bd> fe ?77 ?d7 ?00 ?00 ?00 ?40 ? * fdiv 1073741824, ?fs29, ?fs23
+0*11c9 <sfparith\+0x3c4> fe ?77 ?e1 ?78 ?56 ?34 ?12 ? * fdiv 305419896, ?fs30, ?fs17
+0*11d0 <sfparith\+0x3cb> fe ?77 ?82 ?01 ?ff ?ff ?80 ? * fdiv -2130706687, ?fs24, ?fs18
+0*11d7 <sfparith\+0x3d2> fe ?76 ?fc ?08 ?10 ?20 ?c0 ? * fdiv -1071640568, ?fs31, ?fs12
+0*11de <sfparith\+0x3d9> fe ?77 ?93 ?21 ?43 ?65 ?87 ? * fdiv -2023406815, ?fs25, ?fs19
+0*11e5 <sfparith\+0x3e0> fe ?76 ?ad ?00 ?00 ?00 ?80 ? * fdiv -2147483648, ?fs26, ?fs13
+0*11ec <sfparith\+0x3e7> fe ?76 ?4e ?08 ?10 ?20 ?40 ? * fdiv 1075843080, ?fs20, ?fs14
+0*11f3 <sfparith\+0x3ee> fe ?76 ?b8 ?80 ?ff ?ff ?01 ? * fdiv 33554304, ?fs27, ?fs8
+0*11fa <sfparith\+0x3f5> fe ?76 ?5f ?00 ?00 ?00 ?40 ? * fdiv 1073741824, ?fs21, ?fs15
+0*1201 <sfparith\+0x3fc> fe ?76 ?69 ?78 ?56 ?34 ?12 ? * fdiv 305419896, ?fs22, ?fs9
+0*1208 <sfparith\+0x403> fe ?76 ?0a ?01 ?ff ?ff ?80 ? * fdiv -2130706687, ?fs16, ?fs10
+# fpacc:
+0*120f <fpacc> fb ?82 ?d7 ?4c ? * fmadd fs29, ?fs23, ?fs4, ?fs2
+0*1213 <fpacc\+0x4> fb ?81 ?b8 ?27 ? * fmadd fs11, ?fs24, ?fs18, ?fs5
+0*1217 <fpacc\+0x8> fb ?83 ?c6 ?92 ? * fmadd fs12, ?fs6, ?fs25, ?fs3
+0*121b <fpacc\+0xc> fb ?80 ?ad ?79 ? * fmadd fs26, ?fs13, ?fs7, ?fs4
+0*121f <fpacc\+0x10> fb ?82 ?1b ?84 ? * fmadd fs1, ?fs27, ?fs8, ?fs2
+0*1223 <fpacc\+0x14> fb ?81 ?fc ?66 ? * fmadd fs15, ?fs28, ?fs22, ?fs1
+0*1227 <fpacc\+0x18> fb ?81 ?0a ?da ? * fmadd fs16, ?fs10, ?fs29, ?fs1
+0*122b <fpacc\+0x1c> fb ?80 ?e1 ?bc ? * fmadd fs30, ?fs17, ?fs11, ?fs0
+0*122f <fpacc\+0x20> fb ?82 ?5f ?c5 ? * fmadd fs5, ?fs31, ?fs12, ?fs6
+0*1233 <fpacc\+0x24> fb ?83 ?30 ?aa ? * fmadd fs19, ?fs0, ?fs26, ?fs3
+0*1237 <fpacc\+0x28> fb ?81 ?4e ?19 ? * fmadd fs20, ?fs14, ?fs1, ?fs5
+0*123b <fpacc\+0x2c> fb ?84 ?25 ?f5 ? * fmsub fs2, ?fs21, ?fs15, ?fs4
+0*123f <fpacc\+0x30> fb ?86 ?93 ?03 ? * fmsub fs9, ?fs3, ?fs16, ?fs6
+0*1243 <fpacc\+0x34> fb ?87 ?74 ?eb ? * fmsub fs23, ?fs4, ?fs30, ?fs7
+0*1247 <fpacc\+0x38> fb ?87 ?82 ?5d ? * fmsub fs24, ?fs18, ?fs5, ?fs7
+0*124b <fpacc\+0x3c> fb ?84 ?69 ?36 ? * fmsub fs6, ?fs25, ?fs19, ?fs0
+0*124f <fpacc\+0x40> fb ?86 ?d7 ?42 ? * fmsub fs13, ?fs7, ?fs20, ?fs2
+0*1253 <fpacc\+0x44> fb ?85 ?b8 ?29 ? * fmsub fs27, ?fs8, ?fs2, ?fs5
+0*1257 <fpacc\+0x48> fb ?87 ?c6 ?9c ? * fmsub fs28, ?fs22, ?fs9, ?fs3
+0*125b <fpacc\+0x4c> fb ?84 ?ad ?77 ? * fmsub fs10, ?fs29, ?fs23, ?fs4
+0*125f <fpacc\+0x50> fb ?86 ?1b ?8a ? * fmsub fs17, ?fs11, ?fs24, ?fs2
+0*1263 <fpacc\+0x54> fb ?85 ?fc ?68 ? * fmsub fs31, ?fs12, ?fs6, ?fs1
+0*1267 <fpacc\+0x58> fb ?91 ?0a ?d4 ? * fnmadd fs0, ?fs26, ?fs13, ?fs1
+0*126b <fpacc\+0x5c> fb ?90 ?e1 ?b2 ? * fnmadd fs14, ?fs1, ?fs27, ?fs0
+0*126f <fpacc\+0x60> fb ?92 ?5f ?cb ? * fnmadd fs21, ?fs15, ?fs28, ?fs6
+0*1273 <fpacc\+0x64> fb ?93 ?30 ?a4 ? * fnmadd fs3, ?fs16, ?fs10, ?fs3
+0*1277 <fpacc\+0x68> fb ?91 ?4e ?17 ? * fnmadd fs4, ?fs30, ?fs17, ?fs5
+0*127b <fpacc\+0x6c> fb ?90 ?25 ?fb ? * fnmadd fs18, ?fs5, ?fs31, ?fs4
+0*127f <fpacc\+0x70> fb ?92 ?93 ?0d ? * fnmadd fs25, ?fs19, ?fs0, ?fs6
+0*1283 <fpacc\+0x74> fb ?93 ?74 ?e5 ? * fnmadd fs7, ?fs20, ?fs14, ?fs7
+0*1287 <fpacc\+0x78> fb ?93 ?82 ?53 ? * fnmadd fs8, ?fs2, ?fs21, ?fs7
+0*128b <fpacc\+0x7c> fb ?90 ?69 ?38 ? * fnmadd fs22, ?fs9, ?fs3, ?fs0
+0*128f <fpacc\+0x80> fb ?92 ?d7 ?4c ? * fnmadd fs29, ?fs23, ?fs4, ?fs2
+0*1293 <fpacc\+0x84> fb ?95 ?b8 ?27 ? * fnmsub fs11, ?fs24, ?fs18, ?fs5
+0*1297 <fpacc\+0x88> fb ?97 ?c6 ?92 ? * fnmsub fs12, ?fs6, ?fs25, ?fs3
+0*129b <fpacc\+0x8c> fb ?94 ?ad ?79 ? * fnmsub fs26, ?fs13, ?fs7, ?fs4
+0*129f <fpacc\+0x90> fb ?96 ?1b ?84 ? * fnmsub fs1, ?fs27, ?fs8, ?fs2
+0*12a3 <fpacc\+0x94> fb ?95 ?fc ?66 ? * fnmsub fs15, ?fs28, ?fs22, ?fs1
+0*12a7 <fpacc\+0x98> fb ?95 ?0a ?da ? * fnmsub fs16, ?fs10, ?fs29, ?fs1
+0*12ab <fpacc\+0x9c> fb ?94 ?e1 ?bc ? * fnmsub fs30, ?fs17, ?fs11, ?fs0
+0*12af <fpacc\+0xa0> fb ?96 ?5f ?c5 ? * fnmsub fs5, ?fs31, ?fs12, ?fs6
+0*12b3 <fpacc\+0xa4> fb ?97 ?30 ?aa ? * fnmsub fs19, ?fs0, ?fs26, ?fs3
+0*12b7 <fpacc\+0xa8> fb ?95 ?4e ?19 ? * fnmsub fs20, ?fs14, ?fs1, ?fs5
+0*12bb <fpacc\+0xac> fb ?94 ?25 ?f5 ? * fnmsub fs2, ?fs21, ?fs15, ?fs4
+# dfparith:
+0*12bf <dfparith> f9 ?c4 ?0c ? * fabs fd12
+0*12c2 <dfparith\+0x3> f9 ?c5 ?06 ? * fabs fd22
+0*12c5 <dfparith\+0x6> f9 ?c4 ?00 ? * fabs fd0
+0*12c8 <dfparith\+0x9> f9 ?c4 ?0e ? * fabs fd14
+0*12cb <dfparith\+0xc> f9 ?c4 ?0a ? * fabs fd10
+0*12ce <dfparith\+0xf> f9 ?c5 ?0c ? * fabs fd28
+0*12d1 <dfparith\+0x12> f9 ?c4 ?06 ? * fabs fd6
+0*12d4 <dfparith\+0x15> f9 ?c5 ?08 ? * fabs fd24
+0*12d7 <dfparith\+0x18> f9 ?c5 ?04 ? * fabs fd20
+0*12da <dfparith\+0x1b> f9 ?c4 ?02 ? * fabs fd2
+0*12dd <dfparith\+0x1e> f9 ?c5 ?00 ? * fabs fd16
+0*12e0 <dfparith\+0x21> fb ?c4 ?e0 ?aa ? * fabs fd30, ?fd26
+0*12e4 <dfparith\+0x25> fb ?c4 ?60 ?88 ? * fabs fd22, ?fd8
+0*12e8 <dfparith\+0x29> fb ?c4 ?20 ?08 ? * fabs fd18, ?fd0
+0*12ec <dfparith\+0x2d> fb ?c4 ?e0 ?4a ? * fabs fd30, ?fd20
+0*12f0 <dfparith\+0x31> fb ?c4 ?80 ?c2 ? * fabs fd8, ?fd28
+0*12f4 <dfparith\+0x35> fb ?c4 ?00 ?aa ? * fabs fd16, ?fd26
+0*12f8 <dfparith\+0x39> fb ?c4 ?40 ?20 ? * fabs fd4, ?fd2
+0*12fc <dfparith\+0x3d> fb ?c4 ?c0 ?62 ? * fabs fd12, ?fd22
+0*1300 <dfparith\+0x41> fb ?c4 ?e0 ?a0 ? * fabs fd14, ?fd10
+0*1304 <dfparith\+0x45> fb ?c4 ?60 ?82 ? * fabs fd6, ?fd24
+0*1308 <dfparith\+0x49> fb ?c4 ?20 ?02 ? * fabs fd2, ?fd16
+0*130c <dfparith\+0x4d> f9 ?c7 ?0a ? * fneg fd26
+0*130f <dfparith\+0x50> f9 ?c6 ?0c ? * fneg fd12
+0*1312 <dfparith\+0x53> f9 ?c7 ?06 ? * fneg fd22
+0*1315 <dfparith\+0x56> f9 ?c6 ?08 ? * fneg fd8
+0*1318 <dfparith\+0x59> f9 ?c6 ?04 ? * fneg fd4
+0*131b <dfparith\+0x5c> f9 ?c7 ?02 ? * fneg fd18
+0*131e <dfparith\+0x5f> f9 ?c6 ?00 ? * fneg fd0
+0*1321 <dfparith\+0x62> f9 ?c6 ?0a ? * fneg fd10
+0*1324 <dfparith\+0x65> f9 ?c7 ?0e ? * fneg fd30
+0*1327 <dfparith\+0x68> f9 ?c7 ?04 ? * fneg fd20
+0*132a <dfparith\+0x6b> f9 ?c7 ?02 ? * fneg fd18
+0*132d <dfparith\+0x6e> fb ?c6 ?80 ?c2 ? * fneg fd8, ?fd28
+0*1331 <dfparith\+0x72> fb ?c6 ?00 ?aa ? * fneg fd16, ?fd26
+0*1335 <dfparith\+0x76> fb ?c6 ?40 ?20 ? * fneg fd4, ?fd2
+0*1339 <dfparith\+0x7a> fb ?c6 ?c0 ?62 ? * fneg fd12, ?fd22
+0*133d <dfparith\+0x7e> fb ?c6 ?e0 ?a0 ? * fneg fd14, ?fd10
+0*1341 <dfparith\+0x82> fb ?c6 ?60 ?82 ? * fneg fd6, ?fd24
+0*1345 <dfparith\+0x86> fb ?c6 ?20 ?02 ? * fneg fd2, ?fd16
+0*1349 <dfparith\+0x8a> fb ?c6 ?a0 ?c8 ? * fneg fd26, ?fd12
+0*134d <dfparith\+0x8e> fb ?c6 ?80 ?40 ? * fneg fd8, ?fd4
+0*1351 <dfparith\+0x92> fb ?c6 ?00 ?a0 ? * fneg fd0, ?fd10
+0*1355 <dfparith\+0x96> fb ?c6 ?40 ?2a ? * fneg fd20, ?fd18
+0*1359 <dfparith\+0x9a> f9 ?d1 ?0c ? * frsqrt fd28
+0*135c <dfparith\+0x9d> f9 ?d0 ?06 ? * frsqrt fd6
+0*135f <dfparith\+0xa0> f9 ?d1 ?00 ? * frsqrt fd16
+0*1362 <dfparith\+0xa3> f9 ?d1 ?0a ? * frsqrt fd26
+0*1365 <dfparith\+0xa6> f9 ?d0 ?0e ? * frsqrt fd14
+0*1368 <dfparith\+0xa9> f9 ?d0 ?04 ? * frsqrt fd4
+0*136b <dfparith\+0xac> f9 ?d0 ?02 ? * frsqrt fd2
+0*136e <dfparith\+0xaf> f9 ?d1 ?08 ? * frsqrt fd24
+0*1371 <dfparith\+0xb2> f9 ?d0 ?0c ? * frsqrt fd12
+0*1374 <dfparith\+0xb5> f9 ?d1 ?06 ? * frsqrt fd22
+0*1377 <dfparith\+0xb8> f9 ?d0 ?00 ? * frsqrt fd0
+0*137a <dfparith\+0xbb> fb ?d0 ?e0 ?a0 ? * frsqrt fd14, ?fd10
+0*137e <dfparith\+0xbf> fb ?d0 ?60 ?82 ? * frsqrt fd6, ?fd24
+0*1382 <dfparith\+0xc3> fb ?d0 ?20 ?02 ? * frsqrt fd2, ?fd16
+0*1386 <dfparith\+0xc7> fb ?d0 ?a0 ?c8 ? * frsqrt fd26, ?fd12
+0*138a <dfparith\+0xcb> fb ?d0 ?80 ?40 ? * frsqrt fd8, ?fd4
+0*138e <dfparith\+0xcf> fb ?d0 ?00 ?a0 ? * frsqrt fd0, ?fd10
+0*1392 <dfparith\+0xd3> fb ?d0 ?40 ?2a ? * frsqrt fd20, ?fd18
+0*1396 <dfparith\+0xd7> fb ?d0 ?c0 ?68 ? * frsqrt fd28, ?fd6
+0*139a <dfparith\+0xdb> fb ?d0 ?a0 ?e8 ? * frsqrt fd26, ?fd14
+0*139e <dfparith\+0xdf> fb ?d0 ?20 ?82 ? * frsqrt fd2, ?fd24
+0*13a2 <dfparith\+0xe3> fb ?d0 ?60 ?08 ? * frsqrt fd22, ?fd0
+0*13a6 <dfparith\+0xe7> f9 ?d2 ?0a ? * fsqrt fd10
+0*13a9 <dfparith\+0xea> f9 ?d3 ?0c ? * fsqrt fd28
+0*13ac <dfparith\+0xed> f9 ?d2 ?06 ? * fsqrt fd6
+0*13af <dfparith\+0xf0> f9 ?d3 ?08 ? * fsqrt fd24
+0*13b2 <dfparith\+0xf3> f9 ?d3 ?04 ? * fsqrt fd20
+0*13b5 <dfparith\+0xf6> f9 ?d2 ?02 ? * fsqrt fd2
+0*13b8 <dfparith\+0xf9> f9 ?d3 ?00 ? * fsqrt fd16
+0*13bb <dfparith\+0xfc> f9 ?d3 ?0e ? * fsqrt fd30
+0*13be <dfparith\+0xff> f9 ?d3 ?0a ? * fsqrt fd26
+0*13c1 <dfparith\+0x102> f9 ?d2 ?0c ? * fsqrt fd12
+0*13c4 <dfparith\+0x105> f9 ?d3 ?06 ? * fsqrt fd22
+0*13c7 <dfparith\+0x108> fb ?d4 ?80 ?40 ? * fsqrt fd8, ?fd4
+0*13cb <dfparith\+0x10c> fb ?d4 ?00 ?a0 ? * fsqrt fd0, ?fd10
+0*13cf <dfparith\+0x110> fb ?d4 ?40 ?2a ? * fsqrt fd20, ?fd18
+0*13d3 <dfparith\+0x114> fb ?d4 ?c0 ?68 ? * fsqrt fd28, ?fd6
+0*13d7 <dfparith\+0x118> fb ?d4 ?a0 ?e8 ? * fsqrt fd26, ?fd14
+0*13db <dfparith\+0x11c> fb ?d4 ?20 ?82 ? * fsqrt fd2, ?fd24
+0*13df <dfparith\+0x120> fb ?d4 ?60 ?08 ? * fsqrt fd22, ?fd0
+0*13e3 <dfparith\+0x124> fb ?d4 ?a0 ?c2 ? * fsqrt fd10, ?fd28
+0*13e7 <dfparith\+0x128> fb ?d4 ?80 ?4a ? * fsqrt fd24, ?fd20
+0*13eb <dfparith\+0x12c> fb ?d4 ?00 ?ea ? * fsqrt fd16, ?fd30
+0*13ef <dfparith\+0x130> fb ?d4 ?c0 ?62 ? * fsqrt fd12, ?fd22
+0*13f3 <dfparith\+0x134> f9 ?d5 ?42 ? * fcmp fd4, ?fd18
+0*13f6 <dfparith\+0x137> f9 ?d5 ?ae ? * fcmp fd10, ?fd30
+0*13f9 <dfparith\+0x13a> f9 ?d6 ?28 ? * fcmp fd18, ?fd8
+0*13fc <dfparith\+0x13d> f9 ?d5 ?60 ? * fcmp fd6, ?fd16
+0*13ff <dfparith\+0x140> f9 ?d4 ?e4 ? * fcmp fd14, ?fd4
+0*1402 <dfparith\+0x143> f9 ?d6 ?8c ? * fcmp fd24, ?fd12
+0*1405 <dfparith\+0x146> f9 ?d4 ?0e ? * fcmp fd0, ?fd14
+0*1408 <dfparith\+0x149> f9 ?d6 ?c6 ? * fcmp fd28, ?fd6
+0*140b <dfparith\+0x14c> f9 ?d6 ?42 ? * fcmp fd20, ?fd2
+0*140e <dfparith\+0x14f> f9 ?d7 ?ea ? * fcmp fd30, ?fd26
+0*1411 <dfparith\+0x152> f9 ?d6 ?68 ? * fcmp fd22, ?fd8
+0*1414 <dfparith\+0x155> f9 ?e2 ?20 ? * fadd fd18, ?fd0
+0*1417 <dfparith\+0x158> f9 ?e3 ?e4 ? * fadd fd30, ?fd20
+0*141a <dfparith\+0x15b> f9 ?e1 ?8c ? * fadd fd8, ?fd28
+0*141d <dfparith\+0x15e> f9 ?e3 ?0a ? * fadd fd16, ?fd26
+0*1420 <dfparith\+0x161> f9 ?e0 ?42 ? * fadd fd4, ?fd2
+0*1423 <dfparith\+0x164> f9 ?e1 ?c6 ? * fadd fd12, ?fd22
+0*1426 <dfparith\+0x167> f9 ?e0 ?ea ? * fadd fd14, ?fd10
+0*1429 <dfparith\+0x16a> f9 ?e1 ?68 ? * fadd fd6, ?fd24
+0*142c <dfparith\+0x16d> f9 ?e1 ?20 ? * fadd fd2, ?fd16
+0*142f <dfparith\+0x170> f9 ?e2 ?ac ? * fadd fd26, ?fd12
+0*1432 <dfparith\+0x173> f9 ?e0 ?84 ? * fadd fd8, ?fd4
+0*1435 <dfparith\+0x176> fb ?e0 ?0a ?e2 ? * fadd fd0, ?fd10, ?fd30
+0*1439 <dfparith\+0x17a> fb ?e0 ?42 ?8c ? * fadd fd20, ?fd18, ?fd8
+0*143d <dfparith\+0x17e> fb ?e0 ?c6 ?0a ? * fadd fd28, ?fd6, ?fd16
+0*1441 <dfparith\+0x182> fb ?e0 ?ae ?48 ? * fadd fd26, ?fd14, ?fd4
+0*1445 <dfparith\+0x186> fb ?e0 ?28 ?c4 ? * fadd fd2, ?fd24, ?fd12
+0*1449 <dfparith\+0x18a> fb ?e0 ?60 ?e8 ? * fadd fd22, ?fd0, ?fd14
+0*144d <dfparith\+0x18e> fb ?e0 ?ac ?64 ? * fadd fd10, ?fd28, ?fd6
+0*1451 <dfparith\+0x192> fb ?e0 ?84 ?2c ? * fadd fd24, ?fd20, ?fd2
+0*1455 <dfparith\+0x196> fb ?e0 ?0e ?ae ? * fadd fd16, ?fd30, ?fd26
+0*1459 <dfparith\+0x19a> fb ?e0 ?c6 ?84 ? * fadd fd12, ?fd22, ?fd8
+0*145d <dfparith\+0x19e> fb ?e0 ?42 ?04 ? * fadd fd4, ?fd18, ?fd0
+0*1461 <dfparith\+0x1a2> f9 ?e5 ?ae ? * fsub fd10, ?fd30
+0*1464 <dfparith\+0x1a5> f9 ?e6 ?28 ? * fsub fd18, ?fd8
+0*1467 <dfparith\+0x1a8> f9 ?e5 ?60 ? * fsub fd6, ?fd16
+0*146a <dfparith\+0x1ab> f9 ?e4 ?e4 ? * fsub fd14, ?fd4
+0*146d <dfparith\+0x1ae> f9 ?e6 ?8c ? * fsub fd24, ?fd12
+0*1470 <dfparith\+0x1b1> f9 ?e4 ?0e ? * fsub fd0, ?fd14
+0*1473 <dfparith\+0x1b4> f9 ?e6 ?c6 ? * fsub fd28, ?fd6
+0*1476 <dfparith\+0x1b7> f9 ?e6 ?42 ? * fsub fd20, ?fd2
+0*1479 <dfparith\+0x1ba> f9 ?e7 ?ea ? * fsub fd30, ?fd26
+0*147c <dfparith\+0x1bd> f9 ?e6 ?68 ? * fsub fd22, ?fd8
+0*147f <dfparith\+0x1c0> f9 ?e6 ?20 ? * fsub fd18, ?fd0
+0*1482 <dfparith\+0x1c3> fb ?e4 ?e4 ?2e ? * fsub fd30, ?fd20, ?fd18
+0*1486 <dfparith\+0x1c7> fb ?e4 ?8c ?64 ? * fsub fd8, ?fd28, ?fd6
+0*148a <dfparith\+0x1cb> fb ?e4 ?0a ?ec ? * fsub fd16, ?fd26, ?fd14
+0*148e <dfparith\+0x1cf> fb ?e4 ?42 ?82 ? * fsub fd4, ?fd2, ?fd24
+0*1492 <dfparith\+0x1d3> fb ?e4 ?c6 ?04 ? * fsub fd12, ?fd22, ?fd0
+0*1496 <dfparith\+0x1d7> fb ?e4 ?ea ?c2 ? * fsub fd14, ?fd10, ?fd28
+0*149a <dfparith\+0x1db> fb ?e4 ?68 ?46 ? * fsub fd6, ?fd24, ?fd20
+0*149e <dfparith\+0x1df> fb ?e4 ?20 ?e6 ? * fsub fd2, ?fd16, ?fd30
+0*14a2 <dfparith\+0x1e3> fb ?e4 ?ac ?6a ? * fsub fd26, ?fd12, ?fd22
+0*14a6 <dfparith\+0x1e7> fb ?e4 ?84 ?22 ? * fsub fd8, ?fd4, ?fd18
+0*14aa <dfparith\+0x1eb> fb ?e4 ?0a ?e2 ? * fsub fd0, ?fd10, ?fd30
+0*14ae <dfparith\+0x1ef> f9 ?f3 ?42 ? * fmul fd20, ?fd18
+0*14b1 <dfparith\+0x1f2> f9 ?f2 ?c6 ? * fmul fd28, ?fd6
+0*14b4 <dfparith\+0x1f5> f9 ?f2 ?ae ? * fmul fd26, ?fd14
+0*14b7 <dfparith\+0x1f8> f9 ?f1 ?28 ? * fmul fd2, ?fd24
+0*14ba <dfparith\+0x1fb> f9 ?f2 ?60 ? * fmul fd22, ?fd0
+0*14bd <dfparith\+0x1fe> f9 ?f1 ?ac ? * fmul fd10, ?fd28
+0*14c0 <dfparith\+0x201> f9 ?f3 ?84 ? * fmul fd24, ?fd20
+0*14c3 <dfparith\+0x204> f9 ?f3 ?0e ? * fmul fd16, ?fd30
+0*14c6 <dfparith\+0x207> f9 ?f1 ?c6 ? * fmul fd12, ?fd22
+0*14c9 <dfparith\+0x20a> f9 ?f1 ?42 ? * fmul fd4, ?fd18
+0*14cc <dfparith\+0x20d> f9 ?f1 ?ae ? * fmul fd10, ?fd30
+0*14cf <dfparith\+0x210> fb ?f0 ?28 ?ca ? * fmul fd18, ?fd8, ?fd28
+0*14d3 <dfparith\+0x214> fb ?f0 ?60 ?a6 ? * fmul fd6, ?fd16, ?fd26
+0*14d7 <dfparith\+0x218> fb ?f0 ?e4 ?20 ? * fmul fd14, ?fd4, ?fd2
+0*14db <dfparith\+0x21c> fb ?f0 ?8c ?6a ? * fmul fd24, ?fd12, ?fd22
+0*14df <dfparith\+0x220> fb ?f0 ?0e ?a0 ? * fmul fd0, ?fd14, ?fd10
+0*14e3 <dfparith\+0x224> fb ?f0 ?c6 ?8a ? * fmul fd28, ?fd6, ?fd24
+0*14e7 <dfparith\+0x228> fb ?f0 ?42 ?0a ? * fmul fd20, ?fd2, ?fd16
+0*14eb <dfparith\+0x22c> fb ?f0 ?ea ?cc ? * fmul fd30, ?fd26, ?fd12
+0*14ef <dfparith\+0x230> fb ?f0 ?68 ?48 ? * fmul fd22, ?fd8, ?fd4
+0*14f3 <dfparith\+0x234> fb ?f0 ?20 ?a8 ? * fmul fd18, ?fd0, ?fd10
+0*14f7 <dfparith\+0x238> fb ?f0 ?e4 ?2e ? * fmul fd30, ?fd20, ?fd18
+0*14fb <dfparith\+0x23c> f9 ?f5 ?8c ? * fdiv fd8, ?fd28
+0*14fe <dfparith\+0x23f> f9 ?f7 ?0a ? * fdiv fd16, ?fd26
+0*1501 <dfparith\+0x242> f9 ?f4 ?42 ? * fdiv fd4, ?fd2
+0*1504 <dfparith\+0x245> f9 ?f5 ?c6 ? * fdiv fd12, ?fd22
+0*1507 <dfparith\+0x248> f9 ?f4 ?ea ? * fdiv fd14, ?fd10
+0*150a <dfparith\+0x24b> f9 ?f5 ?68 ? * fdiv fd6, ?fd24
+0*150d <dfparith\+0x24e> f9 ?f5 ?20 ? * fdiv fd2, ?fd16
+0*1510 <dfparith\+0x251> f9 ?f6 ?ac ? * fdiv fd26, ?fd12
+0*1513 <dfparith\+0x254> f9 ?f4 ?84 ? * fdiv fd8, ?fd4
+0*1516 <dfparith\+0x257> f9 ?f4 ?0a ? * fdiv fd0, ?fd10
+0*1519 <dfparith\+0x25a> f9 ?f7 ?42 ? * fdiv fd20, ?fd18
+0*151c <dfparith\+0x25d> fb ?f4 ?c6 ?0a ? * fdiv fd28, ?fd6, ?fd16
+0*1520 <dfparith\+0x261> fb ?f4 ?ae ?48 ? * fdiv fd26, ?fd14, ?fd4
+0*1524 <dfparith\+0x265> fb ?f4 ?28 ?c4 ? * fdiv fd2, ?fd24, ?fd12
+0*1528 <dfparith\+0x269> fb ?f4 ?60 ?e8 ? * fdiv fd22, ?fd0, ?fd14
+0*152c <dfparith\+0x26d> fb ?f4 ?ac ?64 ? * fdiv fd10, ?fd28, ?fd6
+0*1530 <dfparith\+0x271> fb ?f4 ?84 ?2c ? * fdiv fd24, ?fd20, ?fd2
+0*1534 <dfparith\+0x275> fb ?f4 ?0e ?ae ? * fdiv fd16, ?fd30, ?fd26
+0*1538 <dfparith\+0x279> fb ?f4 ?c6 ?84 ? * fdiv fd12, ?fd22, ?fd8
+0*153c <dfparith\+0x27d> fb ?f4 ?42 ?04 ? * fdiv fd4, ?fd18, ?fd0
+0*1540 <dfparith\+0x281> fb ?f4 ?ae ?46 ? * fdiv fd10, ?fd30, ?fd20
+0*1544 <dfparith\+0x285> fb ?f4 ?28 ?ca ? * fdiv fd18, ?fd8, ?fd28
+# fpconv:
+0*1548 <fpconv> fb ?40 ?b0 ?88 ? * ftoi fs27, ?fs8
+0*154c <fpconv\+0x4> fb ?40 ?50 ?f8 ? * ftoi fs21, ?fs15
+0*1550 <fpconv\+0x8> fb ?40 ?60 ?98 ? * ftoi fs22, ?fs9
+0*1554 <fpconv\+0xc> fb ?40 ?00 ?a8 ? * ftoi fs16, ?fs10
+0*1558 <fpconv\+0x10> fb ?40 ?70 ?48 ? * ftoi fs23, ?fs4
+0*155c <fpconv\+0x14> fb ?40 ?10 ?b8 ? * ftoi fs17, ?fs11
+0*1560 <fpconv\+0x18> fb ?40 ?20 ?58 ? * ftoi fs18, ?fs5
+0*1564 <fpconv\+0x1c> fb ?40 ?c0 ?60 ? * ftoi fs12, ?fs6
+0*1568 <fpconv\+0x20> fb ?40 ?30 ?08 ? * ftoi fs19, ?fs0
+0*156c <fpconv\+0x24> fb ?40 ?d0 ?70 ? * ftoi fs13, ?fs7
+0*1570 <fpconv\+0x28> fb ?40 ?e0 ?10 ? * ftoi fs14, ?fs1
+0*1574 <fpconv\+0x2c> fb ?42 ?80 ?20 ? * itof fs8, ?fs2
+0*1578 <fpconv\+0x30> fb ?42 ?f0 ?c2 ? * itof fs15, ?fs28
+0*157c <fpconv\+0x34> fb ?42 ?90 ?30 ? * itof fs9, ?fs3
+0*1580 <fpconv\+0x38> fb ?42 ?a0 ?d2 ? * itof fs10, ?fs29
+0*1584 <fpconv\+0x3c> fb ?42 ?40 ?e2 ? * itof fs4, ?fs30
+0*1588 <fpconv\+0x40> fb ?42 ?b0 ?82 ? * itof fs11, ?fs24
+0*158c <fpconv\+0x44> fb ?42 ?50 ?f2 ? * itof fs5, ?fs31
+0*1590 <fpconv\+0x48> fb ?42 ?60 ?92 ? * itof fs6, ?fs25
+0*1594 <fpconv\+0x4c> fb ?42 ?00 ?a2 ? * itof fs0, ?fs26
+0*1598 <fpconv\+0x50> fb ?42 ?70 ?42 ? * itof fs7, ?fs20
+0*159c <fpconv\+0x54> fb ?42 ?10 ?b2 ? * itof fs1, ?fs27
+0*15a0 <fpconv\+0x58> fb ?52 ?20 ?e0 ? * ftod fs2, ?fd14
+0*15a4 <fpconv\+0x5c> fb ?52 ?c0 ?8a ? * ftod fs28, ?fd24
+0*15a8 <fpconv\+0x60> fb ?52 ?30 ?00 ? * ftod fs3, ?fd0
+0*15ac <fpconv\+0x64> fb ?52 ?d0 ?ca ? * ftod fs29, ?fd28
+0*15b0 <fpconv\+0x68> fb ?52 ?e0 ?4a ? * ftod fs30, ?fd20
+0*15b4 <fpconv\+0x6c> fb ?52 ?80 ?ea ? * ftod fs24, ?fd30
+0*15b8 <fpconv\+0x70> fb ?52 ?f0 ?6a ? * ftod fs31, ?fd22
+0*15bc <fpconv\+0x74> fb ?52 ?90 ?2a ? * ftod fs25, ?fd18
+0*15c0 <fpconv\+0x78> fb ?52 ?a0 ?ea ? * ftod fs26, ?fd30
+0*15c4 <fpconv\+0x7c> fb ?52 ?40 ?88 ? * ftod fs20, ?fd8
+0*15c8 <fpconv\+0x80> fb ?52 ?b0 ?0a ? * ftod fs27, ?fd16
+0*15cc <fpconv\+0x84> fb ?56 ?e0 ?f0 ? * dtof fd14, ?fs15
+0*15d0 <fpconv\+0x88> fb ?56 ?80 ?98 ? * dtof fd24, ?fs9
+0*15d4 <fpconv\+0x8c> fb ?56 ?00 ?a0 ? * dtof fd0, ?fs10
+0*15d8 <fpconv\+0x90> fb ?56 ?c0 ?48 ? * dtof fd28, ?fs4
+0*15dc <fpconv\+0x94> fb ?56 ?40 ?b8 ? * dtof fd20, ?fs11
+0*15e0 <fpconv\+0x98> fb ?56 ?e0 ?58 ? * dtof fd30, ?fs5
+0*15e4 <fpconv\+0x9c> fb ?56 ?60 ?68 ? * dtof fd22, ?fs6
+0*15e8 <fpconv\+0xa0> fb ?56 ?20 ?08 ? * dtof fd18, ?fs0
+0*15ec <fpconv\+0xa4> fb ?56 ?e0 ?78 ? * dtof fd30, ?fs7
+0*15f0 <fpconv\+0xa8> fb ?56 ?80 ?10 ? * dtof fd8, ?fs1
+0*15f4 <fpconv\+0xac> fb ?56 ?00 ?28 ? * dtof fd16, ?fs2
+# condjmp:
+0*15f8 <condjmp> f8 ?d0 ?00 ? * fbeq 0*15f8 <condjmp>
+ 15fa: R_MN10300_PCREL8 condjmp\+0x2
+0*15fb <condjmp\+0x3> f8 ?d1 ?00 ? * fbne 0*15fb <condjmp\+0x3>
+ 15fd: R_MN10300_PCREL8 condjmp\+0x2
+0*15fe <condjmp\+0x6> f8 ?d2 ?00 ? * fbgt 0*15fe <condjmp\+0x6>
+ 1600: R_MN10300_PCREL8 condjmp\+0x2
+0*1601 <condjmp\+0x9> f8 ?d3 ?00 ? * fbge 0*1601 <condjmp\+0x9>
+ 1603: R_MN10300_PCREL8 condjmp\+0x2
+0*1604 <condjmp\+0xc> f8 ?d4 ?00 ? * fblt 0*1604 <condjmp\+0xc>
+ 1606: R_MN10300_PCREL8 condjmp\+0x2
+0*1607 <condjmp\+0xf> f8 ?d5 ?00 ? * fble 0*1607 <condjmp\+0xf>
+ 1609: R_MN10300_PCREL8 condjmp\+0x2
+0*160a <condjmp\+0x12> f8 ?d6 ?00 ? * fbuo 0*160a <condjmp\+0x12>
+ 160c: R_MN10300_PCREL8 condjmp\+0x2
+0*160d <condjmp\+0x15> f8 ?d7 ?00 ? * fblg 0*160d <condjmp\+0x15>
+ 160f: R_MN10300_PCREL8 condjmp\+0x2
+0*1610 <condjmp\+0x18> f8 ?d8 ?00 ? * fbleg 0*1610 <condjmp\+0x18>
+ 1612: R_MN10300_PCREL8 condjmp\+0x2
+0*1613 <condjmp\+0x1b> f8 ?d9 ?00 ? * fbug 0*1613 <condjmp\+0x1b>
+ 1615: R_MN10300_PCREL8 condjmp\+0x2
+0*1616 <condjmp\+0x1e> f8 ?da ?00 ? * fbuge 0*1616 <condjmp\+0x1e>
+ 1618: R_MN10300_PCREL8 condjmp\+0x2
+0*1619 <condjmp\+0x21> f8 ?db ?00 ? * fbul 0*1619 <condjmp\+0x21>
+ 161b: R_MN10300_PCREL8 condjmp\+0x2
+0*161c <condjmp\+0x24> f8 ?dc ?00 ? * fbule 0*161c <condjmp\+0x24>
+ 161e: R_MN10300_PCREL8 condjmp\+0x2
+0*161f <condjmp\+0x27> f8 ?dd ?00 ? * fbue 0*161f <condjmp\+0x27>
+ 1621: R_MN10300_PCREL8 condjmp\+0x2
+0*1622 <condjmp\+0x2a> f0 ?d0 ? * fleq
+0*1624 <condjmp\+0x2c> f0 ?d1 ? * flne
+0*1626 <condjmp\+0x2e> f0 ?d2 ? * flgt
+0*1628 <condjmp\+0x30> f0 ?d3 ? * flge
+0*162a <condjmp\+0x32> f0 ?d4 ? * fllt
+0*162c <condjmp\+0x34> f0 ?d5 ? * flle
+0*162e <condjmp\+0x36> f0 ?d6 ? * fluo
+0*1630 <condjmp\+0x38> f0 ?d7 ? * fllg
+0*1632 <condjmp\+0x3a> f0 ?d8 ? * flleg
+0*1634 <condjmp\+0x3c> f0 ?d9 ? * flug
+0*1636 <condjmp\+0x3e> f0 ?da ? * fluge
+0*1638 <condjmp\+0x40> f0 ?db ? * flul
+0*163a <condjmp\+0x42> f0 ?dc ? * flule
+0*163c <condjmp\+0x44> f0 ?dd ? * flue
Index: gas/testsuite/gas/mn10300/am33-2.s
===================================================================
RCS file: gas/testsuite/gas/mn10300/am33-2.s
diff -N gas/testsuite/gas/mn10300/am33-2.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/mn10300/am33-2.s 9 Jul 2003 22:57:06 -0000
@@ -0,0 +1,1306 @@
+ .text
+ .am33_2
+dcpf:
+ dcpf (r0)
+ dcpf (r10)
+ dcpf (d1)
+ dcpf (r7)
+ dcpf (e4)
+ dcpf (d2)
+ dcpf (r1)
+ dcpf (r11)
+ dcpf (a0)
+ dcpf (r2)
+ dcpf (e5)
+ dcpf (sp)
+ dcpf (d3, r12)
+ dcpf (a1, r3)
+ dcpf (a2, r13)
+ dcpf (r4, r14)
+ dcpf (a3, r8)
+ dcpf (r5, r15)
+ dcpf (r6, r9)
+ dcpf (r0, r10)
+ dcpf (r7, e4)
+ dcpf (r1, r11)
+ dcpf (r2, e5)
+ dcpf (104, e6)
+ dcpf (1, e0)
+ dcpf (-128, e7)
+ dcpf (32, e1)
+ dcpf (73, e2)
+ dcpf (33, d0)
+ dcpf (-69, e3)
+ dcpf (-1, d1)
+ dcpf (-32, d2)
+ dcpf (-20, a0)
+ dcpf (-95, d3)
+ dcpf (-7903933, a1)
+ dcpf (-8388608, a2)
+ dcpf (4202512, r4)
+ dcpf (130944, a3)
+ dcpf (4194304, r5)
+ dcpf (1193046, r6)
+ dcpf (-8323327, r0)
+ dcpf (-4186096, r7)
+ dcpf (-7903933, r1)
+ dcpf (-8388608, r2)
+ dcpf (4202512, r12)
+ dcpf (33554304, r3)
+ dcpf (1073741824, r13)
+ dcpf (305419896, r14)
+ dcpf (-2130706687, r8)
+ dcpf (-1071640568, r15)
+ dcpf (-2023406815, r9)
+ dcpf (-2147483648, r10)
+ dcpf (1075843080, e4)
+ dcpf (33554304, r11)
+ dcpf (1073741824, e5)
+ dcpf (305419896, e6)
+bit:
+ bset 1, (32768)
+ bset 128, (16416)
+ bset 32, (384)
+ bset 73, (32767)
+ bset 33, (4660)
+ bset 187, (32769)
+ bset 255, (49184)
+ bset 224, (34661)
+ bset 236, (32768)
+ bset 161, (16416)
+ bset 254, (384)
+ bclr 0, (32767)
+ bclr 127, (4660)
+ bclr 24, (32769)
+ bclr 229, (49184)
+ bclr 104, (34661)
+ bclr 1, (32768)
+ bclr 128, (16416)
+ bclr 32, (384)
+ bclr 73, (32767)
+ bclr 33, (4660)
+ bclr 187, (32769)
+ btst 255, (49184)
+ btst 224, (34661)
+ btst 236, (32768)
+ btst 161, (16416)
+ btst 254, (384)
+ btst 0, (32767)
+ btst 127, (4660)
+ btst 24, (32769)
+ btst 229, (49184)
+ btst 104, (34661)
+ btst 1, (32768)
+fmovs:
+ fmov (r13), fs23
+ fmov (r14), fs17
+ fmov (r8), fs18
+ fmov (r15), fs12
+ fmov (r9), fs19
+ fmov (r10), fs13
+ fmov (e4), fs14
+ fmov (r11), fs8
+ fmov (e5), fs15
+ fmov (e6), fs9
+ fmov (e0), fs10
+ fmov (e7+), fs4
+ fmov (e1+), fs11
+ fmov (e2+), fs5
+ fmov (d0+), fs6
+ fmov (e3+), fs0
+ fmov (d1+), fs7
+ fmov (d2+), fs1
+ fmov (a0+), fs2
+ fmov (d3+), fs28
+ fmov (a1+), fs3
+ fmov (a2+), fs29
+ fmov (sp), fs4
+ fmov (sp), fs30
+ fmov (sp), fs17
+ fmov (sp), fs11
+ fmov (sp), fs24
+ fmov (sp), fs18
+ fmov (sp), fs5
+ fmov (sp), fs31
+ fmov (sp), fs12
+ fmov (sp), fs6
+ fmov (sp), fs25
+ fmov e3, fs0
+ fmov d1, fs7
+ fmov d2, fs1
+ fmov a0, fs2
+ fmov d3, fs28
+ fmov a1, fs3
+ fmov a2, fs29
+ fmov r4, fs30
+ fmov a3, fs24
+ fmov r5, fs31
+ fmov r6, fs25
+ fmov fs0, (r10)
+ fmov fs7, (e4)
+ fmov fs1, (r11)
+ fmov fs2, (e5)
+ fmov fs28, (e6)
+ fmov fs3, (e0)
+ fmov fs29, (e7)
+ fmov fs30, (e1)
+ fmov fs24, (e2)
+ fmov fs31, (d0)
+ fmov fs25, (e3)
+ fmov fs26, (d1+)
+ fmov fs20, (d2+)
+ fmov fs27, (a0+)
+ fmov fs21, (d3+)
+ fmov fs22, (a1+)
+ fmov fs16, (a2+)
+ fmov fs23, (r4+)
+ fmov fs17, (a3+)
+ fmov fs18, (r5+)
+ fmov fs12, (r6+)
+ fmov fs19, (r0+)
+ fmov fs13, (sp)
+ fmov fs7, (sp)
+ fmov fs20, (sp)
+ fmov fs14, (sp)
+ fmov fs1, (sp)
+ fmov fs27, (sp)
+ fmov fs8, (sp)
+ fmov fs2, (sp)
+ fmov fs21, (sp)
+ fmov fs15, (sp)
+ fmov fs28, (sp)
+ fmov fs22, a1
+ fmov fs16, a2
+ fmov fs23, r4
+ fmov fs17, a3
+ fmov fs18, r5
+ fmov fs12, r6
+ fmov fs19, r0
+ fmov fs13, r7
+ fmov fs14, r1
+ fmov fs8, r2
+ fmov fs15, r12
+ fmov fs9, fs3
+ fmov fs10, fs29
+ fmov fs4, fs30
+ fmov fs11, fs24
+ fmov fs5, fs31
+ fmov fs6, fs25
+ fmov fs0, fs26
+ fmov fs7, fs20
+ fmov fs1, fs27
+ fmov fs2, fs21
+ fmov fs28, fs22
+ fmov (1, e0), fs10
+ fmov (-128, e7), fs4
+ fmov (32, e1), fs11
+ fmov (73, e2), fs5
+ fmov (33, d0), fs6
+ fmov (-69, e3), fs0
+ fmov (-1, d1), fs7
+ fmov (-32, d2), fs1
+ fmov (-20, a0), fs2
+ fmov (-95, d3), fs28
+ fmov (-2, a1), fs3
+ fmov (e0+, -1), fs29
+ fmov (e7+, -32), fs30
+ fmov (e1+, -20), fs24
+ fmov (e2+, -95), fs31
+ fmov (d0+, -2), fs25
+ fmov (e3+, 0), fs26
+ fmov (d1+, 127), fs20
+ fmov (d2+, 24), fs27
+ fmov (a0+, -27), fs21
+ fmov (d3+, 104), fs22
+ fmov (a1+, 1), fs16
+ fmov (255, sp), fs29
+ fmov (224, sp), fs30
+ fmov (236, sp), fs24
+ fmov (161, sp), fs31
+ fmov (254, sp), fs25
+ fmov (0, sp), fs26
+ fmov (127, sp), fs20
+ fmov (24, sp), fs27
+ fmov (229, sp), fs21
+ fmov (104, sp), fs22
+ fmov (1, sp), fs16
+ fmov (r13, e7), fs4
+ fmov (r14, e1), fs11
+ fmov (r8, e2), fs5
+ fmov (r15, d0), fs6
+ fmov (r9, e3), fs0
+ fmov (r10, d1), fs7
+ fmov (e4, d2), fs1
+ fmov (r11, a0), fs2
+ fmov (e5, d3), fs28
+ fmov (e6, a1), fs3
+ fmov (e0, a2), fs29
+ fmov fs23, (-32, r14)
+ fmov fs17, (-20, r8)
+ fmov fs18, (-95, r15)
+ fmov fs12, (-2, r9)
+ fmov fs19, (0, r10)
+ fmov fs13, (127, e4)
+ fmov fs14, (24, r11)
+ fmov fs8, (-27, e5)
+ fmov fs15, (104, e6)
+ fmov fs9, (1, e0)
+ fmov fs10, (-128, e7)
+ fmov fs4, (r14+, 24)
+ fmov fs11, (r8+, -27)
+ fmov fs5, (r15+, 104)
+ fmov fs6, (r9+, 1)
+ fmov fs0, (r10+, -128)
+ fmov fs7, (e4+, 32)
+ fmov fs1, (r11+, 73)
+ fmov fs2, (e5+, 33)
+ fmov fs28, (e6+, -69)
+ fmov fs3, (e0+, -1)
+ fmov fs29, (e7+, -32)
+ fmov fs30, (24, sp)
+ fmov fs24, (229, sp)
+ fmov fs31, (104, sp)
+ fmov fs25, (1, sp)
+ fmov fs26, (128, sp)
+ fmov fs20, (32, sp)
+ fmov fs27, (73, sp)
+ fmov fs21, (33, sp)
+ fmov fs22, (187, sp)
+ fmov fs16, (255, sp)
+ fmov fs23, (224, sp)
+ fmov fs17, (a3, r8)
+ fmov fs18, (r5, r15)
+ fmov fs12, (r6, r9)
+ fmov fs19, (r0, r10)
+ fmov fs13, (r7, e4)
+ fmov fs14, (r1, r11)
+ fmov fs8, (r2, e5)
+ fmov fs15, (r12, e6)
+ fmov fs9, (r3, e0)
+ fmov fs10, (r13, e7)
+ fmov fs4, (r14, e1)
+ fmov (-8323327, r8), fs18
+ fmov (-4186096, r15), fs12
+ fmov (-7903933, r9), fs19
+ fmov (-8388608, r10), fs13
+ fmov (4202512, e4), fs14
+ fmov (130944, r11), fs8
+ fmov (4194304, e5), fs15
+ fmov (1193046, e6), fs9
+ fmov (-8323327, e0), fs10
+ fmov (-4186096, e7), fs4
+ fmov (-7903933, e1), fs11
+ fmov (r8+, 4194304), fs5
+ fmov (r15+, 1193046), fs6
+ fmov (r9+, -8323327), fs0
+ fmov (r10+, -4186096), fs7
+ fmov (e4+, -7903933), fs1
+ fmov (r11+, -8388608), fs2
+ fmov (e5+, 4202512), fs28
+ fmov (e6+, 130944), fs3
+ fmov (e0+, 4194304), fs29
+ fmov (e7+, 1193046), fs30
+ fmov (e1+, -8323327), fs24
+ fmov (4194304, sp), fs5
+ fmov (1193046, sp), fs6
+ fmov (8453889, sp), fs0
+ fmov (12591120, sp), fs7
+ fmov (8873283, sp), fs1
+ fmov (8388608, sp), fs2
+ fmov (4202512, sp), fs28
+ fmov (130944, sp), fs3
+ fmov (4194304, sp), fs29
+ fmov (1193046, sp), fs30
+ fmov (8453889, sp), fs24
+ fmov fs5, (4202512, d0)
+ fmov fs6, (130944, e3)
+ fmov fs0, (4194304, d1)
+ fmov fs7, (1193046, d2)
+ fmov fs1, (-8323327, a0)
+ fmov fs2, (-4186096, d3)
+ fmov fs28, (-7903933, a1)
+ fmov fs3, (-8388608, a2)
+ fmov fs29, (4202512, r4)
+ fmov fs30, (130944, a3)
+ fmov fs24, (4194304, r5)
+ fmov fs31, (d0+, -7903933)
+ fmov fs25, (e3+, -8388608)
+ fmov fs26, (d1+, 4202512)
+ fmov fs20, (d2+, 130944)
+ fmov fs27, (a0+, 4194304)
+ fmov fs21, (d3+, 1193046)
+ fmov fs22, (a1+, -8323327)
+ fmov fs16, (a2+, -4186096)
+ fmov fs23, (r4+, -7903933)
+ fmov fs17, (a3+, -8388608)
+ fmov fs18, (r5+, 4202512)
+ fmov fs12, (8873283, sp)
+ fmov fs19, (8388608, sp)
+ fmov fs13, (4202512, sp)
+ fmov fs14, (130944, sp)
+ fmov fs8, (4194304, sp)
+ fmov fs15, (1193046, sp)
+ fmov fs9, (8453889, sp)
+ fmov fs10, (12591120, sp)
+ fmov fs4, (8873283, sp)
+ fmov fs11, (8388608, sp)
+ fmov fs5, (4202512, sp)
+ fmov (-2023406815, r9), fs19
+ fmov (-2147483648, r10), fs13
+ fmov (1075843080, e4), fs14
+ fmov (33554304, r11), fs8
+ fmov (1073741824, e5), fs15
+ fmov (305419896, e6), fs9
+ fmov (-2130706687, e0), fs10
+ fmov (-1071640568, e7), fs4
+ fmov (-2023406815, e1), fs11
+ fmov (-2147483648, e2), fs5
+ fmov (1075843080, d0), fs6
+ fmov (r9+, -2130706687), fs0
+ fmov (r10+, -1071640568), fs7
+ fmov (e4+, -2023406815), fs1
+ fmov (r11+, -2147483648), fs2
+ fmov (e5+, 1075843080), fs28
+ fmov (e6+, 33554304), fs3
+ fmov (e0+, 1073741824), fs29
+ fmov (e7+, 305419896), fs30
+ fmov (e1+, -2130706687), fs24
+ fmov (e2+, -1071640568), fs31
+ fmov (d0+, -2023406815), fs25
+ fmov (-2130706687, sp), fs0
+ fmov (-1071640568, sp), fs7
+ fmov (-2023406815, sp), fs1
+ fmov (-2147483648, sp), fs2
+ fmov (1075843080, sp), fs28
+ fmov (33554304, sp), fs3
+ fmov (1073741824, sp), fs29
+ fmov (305419896, sp), fs30
+ fmov (-2130706687, sp), fs24
+ fmov (-1071640568, sp), fs31
+ fmov (-2023406815, sp), fs25
+ fmov -2147483648, fs26
+ fmov 1075843080, fs20
+ fmov 33554304, fs27
+ fmov 1073741824, fs21
+ fmov 305419896, fs22
+ fmov -2130706687, fs16
+ fmov -1071640568, fs23
+ fmov -2023406815, fs17
+ fmov -2147483648, fs18
+ fmov 1075843080, fs12
+ fmov 33554304, fs19
+ fmov fs26, (-1071640568, r7)
+ fmov fs20, (-2023406815, r1)
+ fmov fs27, (-2147483648, r2)
+ fmov fs21, (1075843080, r12)
+ fmov fs22, (33554304, r3)
+ fmov fs16, (1073741824, r13)
+ fmov fs23, (305419896, r14)
+ fmov fs17, (-2130706687, r8)
+ fmov fs18, (-1071640568, r15)
+ fmov fs12, (-2023406815, r9)
+ fmov fs19, (-2147483648, r10)
+ fmov fs13, (r7+, 305419896)
+ fmov fs14, (r1+, -2130706687)
+ fmov fs8, (r2+, -1071640568)
+ fmov fs15, (r12+, -2023406815)
+ fmov fs9, (r3+, -2147483648)
+ fmov fs10, (r13+, 1075843080)
+ fmov fs4, (r14+, 33554304)
+ fmov fs11, (r8+, 1073741824)
+ fmov fs5, (r15+, 305419896)
+ fmov fs6, (r9+, -2130706687)
+ fmov fs0, (r10+, -1071640568)
+ fmov fs7, (305419896, sp)
+ fmov fs1, (-2130706687, sp)
+ fmov fs2, (-1071640568, sp)
+ fmov fs28, (-2023406815, sp)
+ fmov fs3, (-2147483648, sp)
+ fmov fs29, (1075843080, sp)
+ fmov fs30, (33554304, sp)
+ fmov fs24, (1073741824, sp)
+ fmov fs31, (305419896, sp)
+ fmov fs25, (-2130706687, sp)
+ fmov fs26, (-1071640568, sp)
+fmovd:
+ fmov (e4), fd8
+ fmov (r11), fd16
+ fmov (e5), fd4
+ fmov (e6), fd12
+ fmov (e0), fd14
+ fmov (e7), fd6
+ fmov (e1), fd2
+ fmov (e2), fd26
+ fmov (d0), fd8
+ fmov (e3), fd0
+ fmov (d1), fd20
+ fmov (d2+), fd28
+ fmov (a0+), fd26
+ fmov (d3+), fd2
+ fmov (a1+), fd22
+ fmov (a2+), fd10
+ fmov (r4+), fd24
+ fmov (a3+), fd16
+ fmov (r5+), fd12
+ fmov (r6+), fd4
+ fmov (r0+), fd10
+ fmov (r7+), fd18
+ fmov (sp), fd28
+ fmov (sp), fd6
+ fmov (sp), fd16
+ fmov (sp), fd26
+ fmov (sp), fd14
+ fmov (sp), fd4
+ fmov (sp), fd2
+ fmov (sp), fd24
+ fmov (sp), fd12
+ fmov (sp), fd22
+ fmov (sp), fd0
+ fmov fd14, (r13)
+ fmov fd6, (r14)
+ fmov fd2, (r8)
+ fmov fd26, (r15)
+ fmov fd8, (r9)
+ fmov fd0, (r10)
+ fmov fd20, (e4)
+ fmov fd28, (r11)
+ fmov fd26, (e5)
+ fmov fd2, (e6)
+ fmov fd22, (e0)
+ fmov fd10, (e7+)
+ fmov fd24, (e1+)
+ fmov fd16, (e2+)
+ fmov fd12, (d0+)
+ fmov fd4, (e3+)
+ fmov fd10, (d1+)
+ fmov fd18, (d2+)
+ fmov fd6, (a0+)
+ fmov fd14, (d3+)
+ fmov fd24, (a1+)
+ fmov fd0, (a2+)
+ fmov fd28, (sp)
+ fmov fd6, (sp)
+ fmov fd24, (sp)
+ fmov fd20, (sp)
+ fmov fd2, (sp)
+ fmov fd16, (sp)
+ fmov fd30, (sp)
+ fmov fd26, (sp)
+ fmov fd12, (sp)
+ fmov fd22, (sp)
+ fmov fd8, (sp)
+ fmov fd4, fd18
+ fmov fd10, fd30
+ fmov fd18, fd8
+ fmov fd6, fd16
+ fmov fd14, fd4
+ fmov fd24, fd12
+ fmov fd0, fd14
+ fmov fd28, fd6
+ fmov fd20, fd2
+ fmov fd30, fd26
+ fmov fd22, fd8
+ fmov (e3, r0), fd10
+ fmov (d1, r7), fd18
+ fmov (d2, r1), fd6
+ fmov (a0, r2), fd14
+ fmov (d3, r12), fd24
+ fmov (a1, r3), fd0
+ fmov (a2, r13), fd28
+ fmov (r4, r14), fd20
+ fmov (a3, r8), fd30
+ fmov (r5, r15), fd22
+ fmov (r6, r9), fd18
+ fmov fd0, (r10, d1)
+ fmov fd20, (e4, d2)
+ fmov fd28, (r11, a0)
+ fmov fd26, (e5, d3)
+ fmov fd2, (e6, a1)
+ fmov fd22, (e0, a2)
+ fmov fd10, (e7, r4)
+ fmov fd24, (e1, a3)
+ fmov fd16, (e2, r5)
+ fmov fd12, (d0, r6)
+ fmov fd4, (e3, r0)
+ fmov (-1, d1), fd20
+ fmov (-32, d2), fd28
+ fmov (-20, a0), fd26
+ fmov (-95, d3), fd2
+ fmov (-2, a1), fd22
+ fmov (0, a2), fd10
+ fmov (127, r4), fd24
+ fmov (24, a3), fd16
+ fmov (-27, r5), fd12
+ fmov (104, r6), fd4
+ fmov (1, r0), fd10
+ fmov (d1+, 127), fd18
+ fmov (d2+, 24), fd6
+ fmov (a0+, -27), fd14
+ fmov (d3+, 104), fd24
+ fmov (a1+, 1), fd0
+ fmov (a2+, -128), fd28
+ fmov (r4+, 32), fd20
+ fmov (a3+, 73), fd30
+ fmov (r5+, 33), fd22
+ fmov (r6+, -69), fd18
+ fmov (r0+, -1), fd30
+ fmov (127, sp), fd18
+ fmov (24, sp), fd6
+ fmov (229, sp), fd14
+ fmov (104, sp), fd24
+ fmov (1, sp), fd0
+ fmov (128, sp), fd28
+ fmov (32, sp), fd20
+ fmov (73, sp), fd30
+ fmov (33, sp), fd22
+ fmov (187, sp), fd18
+ fmov (255, sp), fd30
+ fmov fd18, (32, r1)
+ fmov fd6, (73, r2)
+ fmov fd14, (33, r12)
+ fmov fd24, (-69, r3)
+ fmov fd0, (-1, r13)
+ fmov fd28, (-32, r14)
+ fmov fd20, (-20, r8)
+ fmov fd30, (-95, r15)
+ fmov fd22, (-2, r9)
+ fmov fd18, (0, r10)
+ fmov fd30, (127, e4)
+ fmov fd8, (r1+, -20)
+ fmov fd16, (r2+, -95)
+ fmov fd4, (r12+, -2)
+ fmov fd12, (r3+, 0)
+ fmov fd14, (r13+, 127)
+ fmov fd6, (r14+, 24)
+ fmov fd2, (r8+, -27)
+ fmov fd26, (r15+, 104)
+ fmov fd8, (r9+, 1)
+ fmov fd0, (r10+, -128)
+ fmov fd20, (e4+, 32)
+ fmov fd28, (236, sp)
+ fmov fd26, (161, sp)
+ fmov fd2, (254, sp)
+ fmov fd22, (0, sp)
+ fmov fd10, (127, sp)
+ fmov fd24, (24, sp)
+ fmov fd16, (229, sp)
+ fmov fd12, (104, sp)
+ fmov fd4, (1, sp)
+ fmov fd10, (128, sp)
+ fmov fd18, (32, sp)
+ fmov (-8323327, a0), fd26
+ fmov (-4186096, d3), fd2
+ fmov (-7903933, a1), fd22
+ fmov (-8388608, a2), fd10
+ fmov (4202512, r4), fd24
+ fmov (130944, a3), fd16
+ fmov (4194304, r5), fd12
+ fmov (1193046, r6), fd4
+ fmov (-8323327, r0), fd10
+ fmov (-4186096, r7), fd18
+ fmov (-7903933, r1), fd6
+ fmov (a0+, 4194304), fd14
+ fmov (d3+, 1193046), fd24
+ fmov (a1+, -8323327), fd0
+ fmov (a2+, -4186096), fd28
+ fmov (r4+, -7903933), fd20
+ fmov (a3+, -8388608), fd30
+ fmov (r5+, 4202512), fd22
+ fmov (r6+, 130944), fd18
+ fmov (r0+, 4194304), fd30
+ fmov (r7+, 1193046), fd8
+ fmov (r1+, -8323327), fd16
+ fmov (4194304, sp), fd14
+ fmov (1193046, sp), fd24
+ fmov (8453889, sp), fd0
+ fmov (12591120, sp), fd28
+ fmov (8873283, sp), fd20
+ fmov (8388608, sp), fd30
+ fmov (4202512, sp), fd22
+ fmov (130944, sp), fd18
+ fmov (4194304, sp), fd30
+ fmov (1193046, sp), fd8
+ fmov (8453889, sp), fd16
+ fmov fd14, (4202512, r12)
+ fmov fd24, (130944, r3)
+ fmov fd0, (4194304, r13)
+ fmov fd28, (1193046, r14)
+ fmov fd20, (-8323327, r8)
+ fmov fd30, (-4186096, r15)
+ fmov fd22, (-7903933, r9)
+ fmov fd18, (-8388608, r10)
+ fmov fd30, (4202512, e4)
+ fmov fd8, (130944, r11)
+ fmov fd16, (4194304, e5)
+ fmov fd4, (r12+, -7903933)
+ fmov fd12, (r3+, -8388608)
+ fmov fd14, (r13+, 4202512)
+ fmov fd6, (r14+, 130944)
+ fmov fd2, (r8+, 4194304)
+ fmov fd26, (r15+, 1193046)
+ fmov fd8, (r9+, -8323327)
+ fmov fd0, (r10+, -4186096)
+ fmov fd20, (e4+, -7903933)
+ fmov fd28, (r11+, -8388608)
+ fmov fd26, (e5+, 4202512)
+ fmov fd2, (8873283, sp)
+ fmov fd22, (8388608, sp)
+ fmov fd10, (4202512, sp)
+ fmov fd24, (130944, sp)
+ fmov fd16, (4194304, sp)
+ fmov fd12, (1193046, sp)
+ fmov fd4, (8453889, sp)
+ fmov fd10, (12591120, sp)
+ fmov fd18, (8873283, sp)
+ fmov fd6, (8388608, sp)
+ fmov fd14, (4202512, sp)
+ fmov (-2023406815, a1), fd22
+ fmov (-2147483648, a2), fd10
+ fmov (1075843080, r4), fd24
+ fmov (33554304, a3), fd16
+ fmov (1073741824, r5), fd12
+ fmov (305419896, r6), fd4
+ fmov (-2130706687, r0), fd10
+ fmov (-1071640568, r7), fd18
+ fmov (-2023406815, r1), fd6
+ fmov (-2147483648, r2), fd14
+ fmov (1075843080, r12), fd24
+ fmov (a1+, -2130706687), fd0
+ fmov (a2+, -1071640568), fd28
+ fmov (r4+, -2023406815), fd20
+ fmov (a3+, -2147483648), fd30
+ fmov (r5+, 1075843080), fd22
+ fmov (r6+, 33554304), fd18
+ fmov (r0+, 1073741824), fd30
+ fmov (r7+, 305419896), fd8
+ fmov (r1+, -2130706687), fd16
+ fmov (r2+, -1071640568), fd4
+ fmov (r12+, -2023406815), fd12
+ fmov (-2130706687, sp), fd0
+ fmov (-1071640568, sp), fd28
+ fmov (-2023406815, sp), fd20
+ fmov (-2147483648, sp), fd30
+ fmov (1075843080, sp), fd22
+ fmov (33554304, sp), fd18
+ fmov (1073741824, sp), fd30
+ fmov (305419896, sp), fd8
+ fmov (-2130706687, sp), fd16
+ fmov (-1071640568, sp), fd4
+ fmov (-2023406815, sp), fd12
+ fmov fd0, (1073741824, r13)
+ fmov fd28, (305419896, r14)
+ fmov fd20, (-2130706687, r8)
+ fmov fd30, (-1071640568, r15)
+ fmov fd22, (-2023406815, r9)
+ fmov fd18, (-2147483648, r10)
+ fmov fd30, (1075843080, e4)
+ fmov fd8, (33554304, r11)
+ fmov fd16, (1073741824, e5)
+ fmov fd4, (305419896, e6)
+ fmov fd12, (-2130706687, e0)
+ fmov fd14, (r13+, 1075843080)
+ fmov fd6, (r14+, 33554304)
+ fmov fd2, (r8+, 1073741824)
+ fmov fd26, (r15+, 305419896)
+ fmov fd8, (r9+, -2130706687)
+ fmov fd0, (r10+, -1071640568)
+ fmov fd20, (e4+, -2023406815)
+ fmov fd28, (r11+, -2147483648)
+ fmov fd26, (e5+, 1075843080)
+ fmov fd2, (e6+, 33554304)
+ fmov fd22, (e0+, 1073741824)
+ fmov fd10, (1075843080, sp)
+ fmov fd24, (33554304, sp)
+ fmov fd16, (1073741824, sp)
+ fmov fd12, (305419896, sp)
+ fmov fd4, (-2130706687, sp)
+ fmov fd10, (-1071640568, sp)
+ fmov fd18, (-2023406815, sp)
+ fmov fd6, (-2147483648, sp)
+ fmov fd14, (1075843080, sp)
+ fmov fd24, (33554304, sp)
+ fmov fd0, (1073741824, sp)
+fmovc:
+ fmov e7, fpcr
+ fmov r4, fpcr
+ fmov r14, fpcr
+ fmov e1, fpcr
+ fmov a3, fpcr
+ fmov r8, fpcr
+ fmov e2, fpcr
+ fmov r5, fpcr
+ fmov r15, fpcr
+ fmov d0, fpcr
+ fmov r6, fpcr
+ fmov fpcr, r9
+ fmov fpcr, e3
+ fmov fpcr, r0
+ fmov fpcr, r10
+ fmov fpcr, d1
+ fmov fpcr, r7
+ fmov fpcr, e4
+ fmov fpcr, d2
+ fmov fpcr, r1
+ fmov fpcr, r11
+ fmov fpcr, a0
+ fmov 1073741824, fpcr
+ fmov -1071640568, fpcr
+ fmov 1075843080, fpcr
+ fmov 305419896, fpcr
+ fmov -2023406815, fpcr
+ fmov 33554304, fpcr
+ fmov -2130706687, fpcr
+ fmov -2147483648, fpcr
+ fmov 1073741824, fpcr
+ fmov -1071640568, fpcr
+ fmov 1075843080, fpcr
+sfparith:
+ fabs fs4
+ fabs fs30
+ fabs fs17
+ fabs fs11
+ fabs fs24
+ fabs fs18
+ fabs fs5
+ fabs fs31
+ fabs fs12
+ fabs fs6
+ fabs fs25
+ fabs fs19, fs0
+ fabs fs13, fs7
+ fabs fs14, fs1
+ fabs fs8, fs2
+ fabs fs15, fs28
+ fabs fs9, fs3
+ fabs fs10, fs29
+ fabs fs4, fs30
+ fabs fs11, fs24
+ fabs fs5, fs31
+ fabs fs6, fs25
+ fneg fs0
+ fneg fs26
+ fneg fs13
+ fneg fs7
+ fneg fs20
+ fneg fs14
+ fneg fs1
+ fneg fs27
+ fneg fs8
+ fneg fs2
+ fneg fs21
+ fneg fs15, fs28
+ fneg fs9, fs3
+ fneg fs10, fs29
+ fneg fs4, fs30
+ fneg fs11, fs24
+ fneg fs5, fs31
+ fneg fs6, fs25
+ fneg fs0, fs26
+ fneg fs7, fs20
+ fneg fs1, fs27
+ fneg fs2, fs21
+ frsqrt fs28
+ frsqrt fs22
+ frsqrt fs9
+ frsqrt fs3
+ frsqrt fs16
+ frsqrt fs10
+ frsqrt fs29
+ frsqrt fs23
+ frsqrt fs4
+ frsqrt fs30
+ frsqrt fs17
+ frsqrt fs11, fs24
+ frsqrt fs5, fs31
+ frsqrt fs6, fs25
+ frsqrt fs0, fs26
+ frsqrt fs7, fs20
+ frsqrt fs1, fs27
+ frsqrt fs2, fs21
+ frsqrt fs28, fs22
+ frsqrt fs3, fs16
+ frsqrt fs29, fs23
+ frsqrt fs30, fs17
+ fsqrt fs24
+ fsqrt fs18
+ fsqrt fs5
+ fsqrt fs31
+ fsqrt fs12
+ fsqrt fs6
+ fsqrt fs25
+ fsqrt fs19
+ fsqrt fs0
+ fsqrt fs26
+ fsqrt fs13
+ fsqrt fs7, fs20
+ fsqrt fs1, fs27
+ fsqrt fs2, fs21
+ fsqrt fs28, fs22
+ fsqrt fs3, fs16
+ fsqrt fs29, fs23
+ fsqrt fs30, fs17
+ fsqrt fs24, fs18
+ fsqrt fs31, fs12
+ fsqrt fs25, fs19
+ fsqrt fs26, fs13
+ fcmp fs20, fs14
+ fcmp fs27, fs8
+ fcmp fs21, fs15
+ fcmp fs22, fs9
+ fcmp fs16, fs10
+ fcmp fs23, fs4
+ fcmp fs17, fs11
+ fcmp fs18, fs5
+ fcmp fs12, fs6
+ fcmp fs19, fs0
+ fcmp fs13, fs7
+ fcmp -2023406815, fs1
+ fcmp -2147483648, fs2
+ fcmp 1075843080, fs28
+ fcmp 33554304, fs3
+ fcmp 1073741824, fs29
+ fcmp 305419896, fs30
+ fcmp -2130706687, fs24
+ fcmp -1071640568, fs31
+ fcmp -2023406815, fs25
+ fcmp -2147483648, fs26
+ fcmp 1075843080, fs20
+ fadd fs1, fs27
+ fadd fs2, fs21
+ fadd fs28, fs22
+ fadd fs3, fs16
+ fadd fs29, fs23
+ fadd fs30, fs17
+ fadd fs24, fs18
+ fadd fs31, fs12
+ fadd fs25, fs19
+ fadd fs26, fs13
+ fadd fs20, fs14
+ fadd fs27, fs8, fs2
+ fadd fs21, fs15, fs28
+ fadd fs22, fs9, fs3
+ fadd fs16, fs10, fs29
+ fadd fs23, fs4, fs30
+ fadd fs17, fs11, fs24
+ fadd fs18, fs5, fs31
+ fadd fs12, fs6, fs25
+ fadd fs19, fs0, fs26
+ fadd fs13, fs7, fs20
+ fadd fs14, fs1, fs27
+ fadd -2147483648, fs2, fs21
+ fadd 1075843080, fs28, fs22
+ fadd 33554304, fs3, fs16
+ fadd 1073741824, fs29, fs23
+ fadd 305419896, fs30, fs17
+ fadd -2130706687, fs24, fs18
+ fadd -1071640568, fs31, fs12
+ fadd -2023406815, fs25, fs19
+ fadd -2147483648, fs26, fs13
+ fadd 1075843080, fs20, fs14
+ fadd 33554304, fs27, fs8
+ fsub fs2, fs21
+ fsub fs28, fs22
+ fsub fs3, fs16
+ fsub fs29, fs23
+ fsub fs30, fs17
+ fsub fs24, fs18
+ fsub fs31, fs12
+ fsub fs25, fs19
+ fsub fs26, fs13
+ fsub fs20, fs14
+ fsub fs27, fs8
+ fsub fs21, fs15, fs28
+ fsub fs22, fs9, fs3
+ fsub fs16, fs10, fs29
+ fsub fs23, fs4, fs30
+ fsub fs17, fs11, fs24
+ fsub fs18, fs5, fs31
+ fsub fs12, fs6, fs25
+ fsub fs19, fs0, fs26
+ fsub fs13, fs7, fs20
+ fsub fs14, fs1, fs27
+ fsub fs8, fs2, fs21
+ fsub 1075843080, fs28, fs22
+ fsub 33554304, fs3, fs16
+ fsub 1073741824, fs29, fs23
+ fsub 305419896, fs30, fs17
+ fsub -2130706687, fs24, fs18
+ fsub -1071640568, fs31, fs12
+ fsub -2023406815, fs25, fs19
+ fsub -2147483648, fs26, fs13
+ fsub 1075843080, fs20, fs14
+ fsub 33554304, fs27, fs8
+ fsub 1073741824, fs21, fs15
+ fmul fs28, fs22
+ fmul fs3, fs16
+ fmul fs29, fs23
+ fmul fs30, fs17
+ fmul fs24, fs18
+ fmul fs31, fs12
+ fmul fs25, fs19
+ fmul fs26, fs13
+ fmul fs20, fs14
+ fmul fs27, fs8
+ fmul fs21, fs15
+ fmul fs22, fs9, fs3
+ fmul fs16, fs10, fs29
+ fmul fs23, fs4, fs30
+ fmul fs17, fs11, fs24
+ fmul fs18, fs5, fs31
+ fmul fs12, fs6, fs25
+ fmul fs19, fs0, fs26
+ fmul fs13, fs7, fs20
+ fmul fs14, fs1, fs27
+ fmul fs8, fs2, fs21
+ fmul fs15, fs28, fs22
+ fmul 33554304, fs3, fs16
+ fmul 1073741824, fs29, fs23
+ fmul 305419896, fs30, fs17
+ fmul -2130706687, fs24, fs18
+ fmul -1071640568, fs31, fs12
+ fmul -2023406815, fs25, fs19
+ fmul -2147483648, fs26, fs13
+ fmul 1075843080, fs20, fs14
+ fmul 33554304, fs27, fs8
+ fmul 1073741824, fs21, fs15
+ fmul 305419896, fs22, fs9
+ fdiv fs3, fs16
+ fdiv fs29, fs23
+ fdiv fs30, fs17
+ fdiv fs24, fs18
+ fdiv fs31, fs12
+ fdiv fs25, fs19
+ fdiv fs26, fs13
+ fdiv fs20, fs14
+ fdiv fs27, fs8
+ fdiv fs21, fs15
+ fdiv fs22, fs9
+ fdiv fs16, fs10, fs29
+ fdiv fs23, fs4, fs30
+ fdiv fs17, fs11, fs24
+ fdiv fs18, fs5, fs31
+ fdiv fs12, fs6, fs25
+ fdiv fs19, fs0, fs26
+ fdiv fs13, fs7, fs20
+ fdiv fs14, fs1, fs27
+ fdiv fs8, fs2, fs21
+ fdiv fs15, fs28, fs22
+ fdiv fs9, fs3, fs16
+ fdiv 1073741824, fs29, fs23
+ fdiv 305419896, fs30, fs17
+ fdiv -2130706687, fs24, fs18
+ fdiv -1071640568, fs31, fs12
+ fdiv -2023406815, fs25, fs19
+ fdiv -2147483648, fs26, fs13
+ fdiv 1075843080, fs20, fs14
+ fdiv 33554304, fs27, fs8
+ fdiv 1073741824, fs21, fs15
+ fdiv 305419896, fs22, fs9
+ fdiv -2130706687, fs16, fs10
+fpacc:
+ fmadd fs29, fs23, fs4, fs2
+ fmadd fs11, fs24, fs18, fs5
+ fmadd fs12, fs6, fs25, fs3
+ fmadd fs26, fs13, fs7, fs4
+ fmadd fs1, fs27, fs8, fs2
+ fmadd fs15, fs28, fs22, fs1
+ fmadd fs16, fs10, fs29, fs1
+ fmadd fs30, fs17, fs11, fs0
+ fmadd fs5, fs31, fs12, fs6
+ fmadd fs19, fs0, fs26, fs3
+ fmadd fs20, fs14, fs1, fs5
+ fmsub fs2, fs21, fs15, fs4
+ fmsub fs9, fs3, fs16, fs6
+ fmsub fs23, fs4, fs30, fs7
+ fmsub fs24, fs18, fs5, fs7
+ fmsub fs6, fs25, fs19, fs0
+ fmsub fs13, fs7, fs20, fs2
+ fmsub fs27, fs8, fs2, fs5
+ fmsub fs28, fs22, fs9, fs3
+ fmsub fs10, fs29, fs23, fs4
+ fmsub fs17, fs11, fs24, fs2
+ fmsub fs31, fs12, fs6, fs1
+ fnmadd fs0, fs26, fs13, fs1
+ fnmadd fs14, fs1, fs27, fs0
+ fnmadd fs21, fs15, fs28, fs6
+ fnmadd fs3, fs16, fs10, fs3
+ fnmadd fs4, fs30, fs17, fs5
+ fnmadd fs18, fs5, fs31, fs4
+ fnmadd fs25, fs19, fs0, fs6
+ fnmadd fs7, fs20, fs14, fs7
+ fnmadd fs8, fs2, fs21, fs7
+ fnmadd fs22, fs9, fs3, fs0
+ fnmadd fs29, fs23, fs4, fs2
+ fnmsub fs11, fs24, fs18, fs5
+ fnmsub fs12, fs6, fs25, fs3
+ fnmsub fs26, fs13, fs7, fs4
+ fnmsub fs1, fs27, fs8, fs2
+ fnmsub fs15, fs28, fs22, fs1
+ fnmsub fs16, fs10, fs29, fs1
+ fnmsub fs30, fs17, fs11, fs0
+ fnmsub fs5, fs31, fs12, fs6
+ fnmsub fs19, fs0, fs26, fs3
+ fnmsub fs20, fs14, fs1, fs5
+ fnmsub fs2, fs21, fs15, fs4
+dfparith:
+ fabs fd12
+ fabs fd22
+ fabs fd0
+ fabs fd14
+ fabs fd10
+ fabs fd28
+ fabs fd6
+ fabs fd24
+ fabs fd20
+ fabs fd2
+ fabs fd16
+ fabs fd30, fd26
+ fabs fd22, fd8
+ fabs fd18, fd0
+ fabs fd30, fd20
+ fabs fd8, fd28
+ fabs fd16, fd26
+ fabs fd4, fd2
+ fabs fd12, fd22
+ fabs fd14, fd10
+ fabs fd6, fd24
+ fabs fd2, fd16
+ fneg fd26
+ fneg fd12
+ fneg fd22
+ fneg fd8
+ fneg fd4
+ fneg fd18
+ fneg fd0
+ fneg fd10
+ fneg fd30
+ fneg fd20
+ fneg fd18
+ fneg fd8, fd28
+ fneg fd16, fd26
+ fneg fd4, fd2
+ fneg fd12, fd22
+ fneg fd14, fd10
+ fneg fd6, fd24
+ fneg fd2, fd16
+ fneg fd26, fd12
+ fneg fd8, fd4
+ fneg fd0, fd10
+ fneg fd20, fd18
+ frsqrt fd28
+ frsqrt fd6
+ frsqrt fd16
+ frsqrt fd26
+ frsqrt fd14
+ frsqrt fd4
+ frsqrt fd2
+ frsqrt fd24
+ frsqrt fd12
+ frsqrt fd22
+ frsqrt fd0
+ frsqrt fd14, fd10
+ frsqrt fd6, fd24
+ frsqrt fd2, fd16
+ frsqrt fd26, fd12
+ frsqrt fd8, fd4
+ frsqrt fd0, fd10
+ frsqrt fd20, fd18
+ frsqrt fd28, fd6
+ frsqrt fd26, fd14
+ frsqrt fd2, fd24
+ frsqrt fd22, fd0
+ fsqrt fd10
+ fsqrt fd28
+ fsqrt fd6
+ fsqrt fd24
+ fsqrt fd20
+ fsqrt fd2
+ fsqrt fd16
+ fsqrt fd30
+ fsqrt fd26
+ fsqrt fd12
+ fsqrt fd22
+ fsqrt fd8, fd4
+ fsqrt fd0, fd10
+ fsqrt fd20, fd18
+ fsqrt fd28, fd6
+ fsqrt fd26, fd14
+ fsqrt fd2, fd24
+ fsqrt fd22, fd0
+ fsqrt fd10, fd28
+ fsqrt fd24, fd20
+ fsqrt fd16, fd30
+ fsqrt fd12, fd22
+ fcmp fd4, fd18
+ fcmp fd10, fd30
+ fcmp fd18, fd8
+ fcmp fd6, fd16
+ fcmp fd14, fd4
+ fcmp fd24, fd12
+ fcmp fd0, fd14
+ fcmp fd28, fd6
+ fcmp fd20, fd2
+ fcmp fd30, fd26
+ fcmp fd22, fd8
+ fadd fd18, fd0
+ fadd fd30, fd20
+ fadd fd8, fd28
+ fadd fd16, fd26
+ fadd fd4, fd2
+ fadd fd12, fd22
+ fadd fd14, fd10
+ fadd fd6, fd24
+ fadd fd2, fd16
+ fadd fd26, fd12
+ fadd fd8, fd4
+ fadd fd0, fd10, fd30
+ fadd fd20, fd18, fd8
+ fadd fd28, fd6, fd16
+ fadd fd26, fd14, fd4
+ fadd fd2, fd24, fd12
+ fadd fd22, fd0, fd14
+ fadd fd10, fd28, fd6
+ fadd fd24, fd20, fd2
+ fadd fd16, fd30, fd26
+ fadd fd12, fd22, fd8
+ fadd fd4, fd18, fd0
+ fsub fd10, fd30
+ fsub fd18, fd8
+ fsub fd6, fd16
+ fsub fd14, fd4
+ fsub fd24, fd12
+ fsub fd0, fd14
+ fsub fd28, fd6
+ fsub fd20, fd2
+ fsub fd30, fd26
+ fsub fd22, fd8
+ fsub fd18, fd0
+ fsub fd30, fd20, fd18
+ fsub fd8, fd28, fd6
+ fsub fd16, fd26, fd14
+ fsub fd4, fd2, fd24
+ fsub fd12, fd22, fd0
+ fsub fd14, fd10, fd28
+ fsub fd6, fd24, fd20
+ fsub fd2, fd16, fd30
+ fsub fd26, fd12, fd22
+ fsub fd8, fd4, fd18
+ fsub fd0, fd10, fd30
+ fmul fd20, fd18
+ fmul fd28, fd6
+ fmul fd26, fd14
+ fmul fd2, fd24
+ fmul fd22, fd0
+ fmul fd10, fd28
+ fmul fd24, fd20
+ fmul fd16, fd30
+ fmul fd12, fd22
+ fmul fd4, fd18
+ fmul fd10, fd30
+ fmul fd18, fd8, fd28
+ fmul fd6, fd16, fd26
+ fmul fd14, fd4, fd2
+ fmul fd24, fd12, fd22
+ fmul fd0, fd14, fd10
+ fmul fd28, fd6, fd24
+ fmul fd20, fd2, fd16
+ fmul fd30, fd26, fd12
+ fmul fd22, fd8, fd4
+ fmul fd18, fd0, fd10
+ fmul fd30, fd20, fd18
+ fdiv fd8, fd28
+ fdiv fd16, fd26
+ fdiv fd4, fd2
+ fdiv fd12, fd22
+ fdiv fd14, fd10
+ fdiv fd6, fd24
+ fdiv fd2, fd16
+ fdiv fd26, fd12
+ fdiv fd8, fd4
+ fdiv fd0, fd10
+ fdiv fd20, fd18
+ fdiv fd28, fd6, fd16
+ fdiv fd26, fd14, fd4
+ fdiv fd2, fd24, fd12
+ fdiv fd22, fd0, fd14
+ fdiv fd10, fd28, fd6
+ fdiv fd24, fd20, fd2
+ fdiv fd16, fd30, fd26
+ fdiv fd12, fd22, fd8
+ fdiv fd4, fd18, fd0
+ fdiv fd10, fd30, fd20
+ fdiv fd18, fd8, fd28
+fpconv:
+ ftoi fs27, fs8
+ ftoi fs21, fs15
+ ftoi fs22, fs9
+ ftoi fs16, fs10
+ ftoi fs23, fs4
+ ftoi fs17, fs11
+ ftoi fs18, fs5
+ ftoi fs12, fs6
+ ftoi fs19, fs0
+ ftoi fs13, fs7
+ ftoi fs14, fs1
+ itof fs8, fs2
+ itof fs15, fs28
+ itof fs9, fs3
+ itof fs10, fs29
+ itof fs4, fs30
+ itof fs11, fs24
+ itof fs5, fs31
+ itof fs6, fs25
+ itof fs0, fs26
+ itof fs7, fs20
+ itof fs1, fs27
+ ftod fs2, fd14
+ ftod fs28, fd24
+ ftod fs3, fd0
+ ftod fs29, fd28
+ ftod fs30, fd20
+ ftod fs24, fd30
+ ftod fs31, fd22
+ ftod fs25, fd18
+ ftod fs26, fd30
+ ftod fs20, fd8
+ ftod fs27, fd16
+ dtof fd14, fs15
+ dtof fd24, fs9
+ dtof fd0, fs10
+ dtof fd28, fs4
+ dtof fd20, fs11
+ dtof fd30, fs5
+ dtof fd22, fs6
+ dtof fd18, fs0
+ dtof fd30, fs7
+ dtof fd8, fs1
+ dtof fd16, fs2
+condjmp:
+ fbeq condjmp
+ fbne condjmp
+ fbgt condjmp
+ fbge condjmp
+ fblt condjmp
+ fble condjmp
+ fbuo condjmp
+ fblg condjmp
+ fbleg condjmp
+ fbug condjmp
+ fbuge condjmp
+ fbul condjmp
+ fbule condjmp
+ fbue condjmp
+ fleq
+ flne
+ flgt
+ flge
+ fllt
+ flle
+ fluo
+ fllg
+ flleg
+ flug
+ fluge
+ flul
+ flule
+ flue
Index: gas/testsuite/gas/mn10300/basic.exp
===================================================================
RCS file: /cvs/uberbaum/gas/testsuite/gas/mn10300/basic.exp,v
retrieving revision 1.7
diff -u -p -r1.7 basic.exp
--- gas/testsuite/gas/mn10300/basic.exp 9 Sep 2002 01:54:44 -0000 1.7
+++ gas/testsuite/gas/mn10300/basic.exp 9 Jul 2003 22:57:07 -0000
@@ -1780,4 +1780,6 @@ if [istarget mn10300*-*-*] then {
do_am33_8
run_list_test "movpc" ""
+
+ run_dump_test "am33-2"
}
--
Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer aoliva@{redhat.com, gcc.gnu.org}
CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist Professional serial bug killer