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Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- From: Ian Lance Taylor <ian at wasabisystems dot com>
- To: Daniel Jacobowitz <drow at mvista dot com>
- Cc: Richard dot Earnshaw at arm dot com, gcc-patches at gcc dot gnu dot org, nickc at redhat dot com, binutils at sources dot redhat dot com
- Date: 13 Oct 2003 10:35:49 -0700
- Subject: Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- References: <20031013155727.GA27392@nevyn.them.org><200310131616.h9DGGcu14126@pc960.cambridge.arm.com><20031013164351.GA25229@nevyn.them.org>
Daniel Jacobowitz <drow@mvista.com> writes:
> So yes, it appears that the wCx registers are differentiated by using the
> cond=0xf encoding and the others have a normal cond field. Of course
> normally you store the wRx registers anyway. It would be nice to
> generate predicated wstrw instructions for wRx.
As far as I can tell, gcc will never generate wldrw for wRx,
predicated or otherwise. Note that there is no `y' variant in
iwmmxt_movsi_insn.
The only modes which gcc permits in a wRx register are V2SI, V4HI,
V8QI, and DI, all of which are 8 bytes long. There is no support for
other sizes, and I don't see any case in which gcc will generate
w{ldr,str}{b,h,w} for those registers.
I don't know enough about iWMMXt to know whether it would make sense
to have values of other sizes in those registers.
Ian