[patch] Fix arm VFP2 insns

[Paul Brook <paul at codesourcery dot com>]

Patch below fixes the arm additional vfp2 opcodes (fmdrr, fmrrd, fmsrr and 
fmrrs) and adds corresponding testcase.

It also rearranges the disassembly patterns so these are used in preference to 
the generic mcrr opcode.

Ok?

Paul

2004-01-09  Paul Brook  <paul@codesourcery.com>

	* gas/config/tc-arm.c (do_vfp_reg_from_sp2): Rename from do_vfp_sp_reg2.
	(do_vfp_sp_from_reg2): New function.
	(insns): Use them.
	(do_vfp_dp_from_reg2): Check return values properly.
	* gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
	* gas/testsuite/gas/arm/arm.exp: Add them.
	* opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known
	specific opcodes.

? gas/testsuite/gas/arm/vfp2.d
? gas/testsuite/gas/arm/vfp2.s
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.159
diff -u -p -r1.159 tc-arm.c
--- gas/config/tc-arm.c	29 Dec 2003 16:43:37 -0000	1.159
+++ gas/config/tc-arm.c	9 Jan 2004 10:54:38 -0000
@@ -929,7 +929,8 @@ static void do_vfp_sp_dyadic	PARAMS ((ch
 static void do_vfp_dp_dyadic	PARAMS ((char *));
 static void do_vfp_reg_from_sp  PARAMS ((char *));
 static void do_vfp_sp_from_reg  PARAMS ((char *));
-static void do_vfp_sp_reg2	PARAMS ((char *));
+static void do_vfp_reg_from_sp2	PARAMS ((char *));
+static void do_vfp_sp_from_reg2	PARAMS ((char *));
 static void do_vfp_reg_from_dp  PARAMS ((char *));
 static void do_vfp_reg2_from_dp PARAMS ((char *));
 static void do_vfp_dp_from_reg  PARAMS ((char *));
@@ -1976,8 +1977,8 @@ static const struct asm_opcode insns[] =
   {"fcmpezd", 0xeeb50bc0, 7, FPU_VFP_EXT_V1,   do_vfp_dp_compare_z},
 
   /* VFP V2.  */
-  {"fmsrr",   0xec400a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp_reg2},
-  {"fmrrs",   0xec500a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp_reg2},
+  {"fmsrr",   0xec400a10, 5, FPU_VFP_EXT_V2,   do_vfp_sp_from_reg2},
+  {"fmrrs",   0xec500a10, 5, FPU_VFP_EXT_V2,   do_vfp_reg_from_sp2},
   {"fmdrr",   0xec400b10, 5, FPU_VFP_EXT_V2,   do_vfp_dp_from_reg2},
   {"fmrrd",   0xec500b10, 5, FPU_VFP_EXT_V2,   do_vfp_reg2_from_dp},
 
@@ -8954,15 +8955,13 @@ do_vfp_reg_from_sp (str)
 }
 
 static void
-do_vfp_sp_reg2 (str)
+do_vfp_reg_from_sp2 (str)
      char *str;
 {
   skip_whitespace (str);
 
-  if (reg_required_here (&str, 12) == FAIL)
-    return;
-
-  if (skip_past_comma (&str) == FAIL
+  if (reg_required_here (&str, 12) == FAIL
+      || skip_past_comma (&str) == FAIL
       || reg_required_here (&str, 16) == FAIL
       || skip_past_comma (&str) == FAIL)
     {
@@ -9002,6 +9001,32 @@ do_vfp_sp_from_reg (str)
 }
 
 static void
+do_vfp_sp_from_reg2 (str)
+     char *str;
+{
+  skip_whitespace (str);
+
+  /* We require exactly two consecutive SP registers.  */
+  if (vfp_sp_reg_list (&str, VFP_REG_Sm) != 2)
+    {
+      if (! inst.error)
+	inst.error = _("only two consecutive VFP SP registers allowed here");
+    }
+
+  if (skip_past_comma (&str) == FAIL
+      || reg_required_here (&str, 12) == FAIL
+      || skip_past_comma (&str) == FAIL
+      || reg_required_here (&str, 16) == FAIL)
+    {
+      if (! inst.error)
+	inst.error = BAD_ARGS;
+      return;
+    }
+
+  end_of_line (str);
+}
+
+static void
 do_vfp_reg_from_dp (str)
      char *str;
 {
@@ -9075,7 +9100,7 @@ do_vfp_dp_from_reg2 (str)
   if (skip_past_comma (&str) == FAIL
       || reg_required_here (&str, 12) == FAIL
       || skip_past_comma (&str) == FAIL
-      || reg_required_here (&str, 16))
+      || reg_required_here (&str, 16) == FAIL)
     {
       if (! inst.error)
 	inst.error = BAD_ARGS;
Index: gas/testsuite/gas/arm/arm.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arm.exp,v
retrieving revision 1.26
diff -u -p -r1.26 arm.exp
--- gas/testsuite/gas/arm/arm.exp	16 Dec 2003 17:44:36 -0000	1.26
+++ gas/testsuite/gas/arm/arm.exp	9 Jan 2004 10:54:38 -0000
@@ -61,6 +61,8 @@ if {[istarget *arm*-*-*] || [istarget "x
 
     run_dump_test "vfp1"
 
+    run_dump_test "vfp2"
+
     run_errors_test "vfp-bad" "-mfpu=vfp" "VFP errors"
 
     run_dump_test "xscale"
Index: opcodes/arm-opc.h
===================================================================
RCS file: /cvs/src/src/opcodes/arm-opc.h,v
retrieving revision 1.16
diff -u -p -r1.16 arm-opc.h
--- opcodes/arm-opc.h	15 Dec 2003 05:01:41 -0000	1.16
+++ opcodes/arm-opc.h	9 Jan 2004 10:54:39 -0000
@@ -328,9 +328,6 @@ static const struct arm_opcode arm_opcod
     {0x01200050, 0x0ff00ff0,  "qsub%c\t%12-15r, %0-3r, %16-19r"},
     {0x01600050, 0x0ff00ff0, "qdsub%c\t%12-15r, %0-3r, %16-19r"},
 
-    {0x0c400000, 0x0ff00000, "mcrr%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
-    {0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
-
     /* ARM Instructions.  */
     {0x00000090, 0x0e100090, "str%c%6's%5?hb\t%12-15r, %s"},
     {0x00100090, 0x0e100090, "ldr%c%6's%5?hb\t%12-15r, %s"},
@@ -569,6 +566,8 @@ static const struct arm_opcode arm_opcod
     {0x0e300600, 0x0ff00f00, "cfmsuba32%c\tmvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d"},
 
     /* Generic coprocessor instructions */
+    {0x0c400000, 0x0ff00000, "mcrr%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
+    {0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
     {0x0e000000, 0x0f000010, "cdp%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
     {0x0e100010, 0x0f100010, "mrc%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
     {0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},

Attachment: vfp2.d
Description: Text document

Attachment: vfp2.s
Description: Text document