This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
Revised patch for IA64 -mb-step option
- From: Zack Weinberg <zack at codesourcery dot com>
- To: binutils at sources dot redhat dot com
- Cc: Jim Wilson <wilson at specifixinc dot com>
- Date: Tue, 13 Apr 2004 17:54:39 -0700
- Subject: Revised patch for IA64 -mb-step option
The major change here is that I overhauled the options parsing in
tc-ia64.c, which was quite thoroughly broken. I removed all of the
Intel-assembler options that were accepted but unimplemented in GAS;
in a straw poll on IRC, everyone was of the opinion that these were
not helping anything. The new behavior is to silently ignore all
unrecognized -m options, and complain about all other unrecognized
options, rather than silently exiting unsuccessfully. (N.B. the code
in gas/as.c handling an 0 return from md_parse_option appears to be
broken, but I'm not sure what the right fix is. Unless the
expectation is that md_parse_option will have issued a diagnostic if
it returns 0, which is not what tc-ia64.c was doing.)
I also added documentation. I still do not know how to write a GAS
testcase that takes special command line options.
zw
* config/tc-ia64.c (md_shortopts): Just "m:".
(md_longopts): Add entries for all -m and -x options formerly
parsed with ad hoc code in md_parse_options. Use an anonymous
enum to declare constants for each. Add entry for -mb-step.
(struct md): Add detect_b_step_errata field.
(emit_one_bundle): Call errata_nop_necessary_p only if
md.detect_b_step_errata is true.
(md_parse_option): Rip out all ad-hoc parsing code; replace
with code handling new OPTION_* codes. Remove support for all
options being ignored for partial command line compatibility
with Intel assembler. Handle -mb-step. Ignore unrecognized
-m switches.
(md_show_usage): Update to match.
* doc/c-ia64.texi: Clarify -milp64/-mlp64/-mp64. Add entry
for -mb-step.
===================================================================
Index: gas/config/tc-ia64.c
--- gas/config/tc-ia64.c 9 Apr 2004 18:28:11 -0000 1.101.4.1
+++ gas/config/tc-ia64.c 14 Apr 2004 00:46:22 -0000
@@ -189,15 +189,44 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP";
/* ia64-specific option processing: */
-const char *md_shortopts = "m:N:x::";
+const char *md_shortopts = "m:";
-struct option md_longopts[] =
- {
-#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
- {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
-#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
- {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
- };
+/* additional long-option codes */
+enum {
+ OPTION_MCONSTANT_GP = OPTION_MD_BASE + 1,
+ OPTION_MAUTO_PIC,
+ OPTION_M64,
+ OPTION_M32,
+ OPTION_MBE,
+ OPTION_MLE,
+ OPTION_MBSTEP,
+
+ OPTION_XEXPLICIT,
+ OPTION_XAUTO,
+ OPTION_XDEBUG,
+ OPTION_XDEBUGX,
+};
+
+
+struct option md_longopts[] = {
+ /* -m options */
+ { "mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP },
+ { "mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC },
+ { "milp64", no_argument, NULL, OPTION_M64 },
+ { "mlp64", no_argument, NULL, OPTION_M64 },
+ { "mp64", no_argument, NULL, OPTION_M64 },
+ { "milp32", no_argument, NULL, OPTION_M32 },
+ { "mbe", no_argument, NULL, OPTION_MBE },
+ { "mle", no_argument, NULL, OPTION_MLE },
+ { "mb-step", no_argument, NULL, OPTION_MBSTEP },
+
+ /* -x options */
+ { "x", no_argument, NULL, OPTION_XEXPLICIT },
+ { "xexplicit", no_argument, NULL, OPTION_XEXPLICIT },
+ { "xauto", no_argument, NULL, OPTION_XAUTO },
+ { "xdebug", no_argument, NULL, OPTION_XDEBUG },
+ { "xdebugx", no_argument, NULL, OPTION_XDEBUGX },
+};
size_t md_longopts_size = sizeof (md_longopts);
@@ -220,6 +249,7 @@ static struct
manual_bundling : 1,
debug_dv: 1,
detect_dv: 1,
+ detect_b_step_errata: 1,
explicit_mode : 1, /* which mode we're in */
default_explicit_mode : 1, /* which mode is the default */
mode_explicitly_set : 1, /* was the current mode explicitly set? */
@@ -6351,7 +6381,8 @@ emit_one_bundle ()
dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
}
- if (errata_nop_necessary_p (md.slot + curr, insn_unit))
+ if (md.detect_b_step_errata
+ && errata_nop_necessary_p (md.slot + curr, insn_unit))
as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
build_insn (md.slot + curr, insn + i);
@@ -6457,107 +6488,42 @@ md_parse_option (c, arg)
switch (c)
{
- /* Switches from the Intel assembler. */
- case 'm':
- if (strcmp (arg, "ilp64") == 0
- || strcmp (arg, "lp64") == 0
- || strcmp (arg, "p64") == 0)
- {
- md.flags |= EF_IA_64_ABI64;
- }
- else if (strcmp (arg, "ilp32") == 0)
- {
- md.flags &= ~EF_IA_64_ABI64;
- }
- else if (strcmp (arg, "le") == 0)
- {
- md.flags &= ~EF_IA_64_BE;
- }
- else if (strcmp (arg, "be") == 0)
- {
- md.flags |= EF_IA_64_BE;
- }
- else
- return 0;
- break;
-
- case 'N':
- if (strcmp (arg, "so") == 0)
- {
- /* Suppress signon message. */
- }
- else if (strcmp (arg, "pi") == 0)
- {
- /* Reject privileged instructions. FIXME */
- }
- else if (strcmp (arg, "us") == 0)
- {
- /* Allow union of signed and unsigned range. FIXME */
- }
- else if (strcmp (arg, "close_fcalls") == 0)
- {
- /* Do not resolve global function calls. */
- }
- else
- return 0;
- break;
-
- case 'C':
- /* temp[="prefix"] Insert temporary labels into the object file
- symbol table prefixed by "prefix".
- Default prefix is ":temp:".
- */
- break;
-
- case 'a':
- /* indirect=<tgt> Assume unannotated indirect branches behavior
- according to <tgt> --
- exit: branch out from the current context (default)
- labels: all labels in context may be branch targets
- */
- if (strncmp (arg, "indirect=", 9) != 0)
- return 0;
- break;
-
- case 'x':
- /* -X conflicts with an ignored option, use -x instead */
+ /* -m options - control md.flags; other switches passed down from gcc. */
+ case OPTION_M64: md.flags |= EF_IA_64_ABI64; break;
+ case OPTION_M32: md.flags &= ~EF_IA_64_ABI64; break;
+ case OPTION_MBE: md.flags |= EF_IA_64_BE; break;
+ case OPTION_MLE: md.flags &= ~EF_IA_64_BE; break;
+
+ case OPTION_MCONSTANT_GP: md.flags |= EF_IA_64_CONS_GP; break;
+ case OPTION_MAUTO_PIC: md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; break;
+
+ case OPTION_MBSTEP: md.detect_b_step_errata = 1; break;
+
+ /* -m<whatever> is ignored so GCC can pass down all its -m switches
+ with impunity. */
+ case 'm': break;
+
+ /* -x options - control DV handling. -X in Intel assembler, but
+ that conflicts with an ignored option. */
+ case OPTION_XEXPLICIT:
md.detect_dv = 1;
- if (!arg || strcmp (arg, "explicit") == 0)
- {
- /* set default mode to explicit */
- md.default_explicit_mode = 1;
- break;
- }
- else if (strcmp (arg, "auto") == 0)
- {
- md.default_explicit_mode = 0;
- }
- else if (strcmp (arg, "debug") == 0)
- {
- md.debug_dv = 1;
- }
- else if (strcmp (arg, "debugx") == 0)
- {
- md.default_explicit_mode = 1;
- md.debug_dv = 1;
- }
- else
- {
- as_bad (_("Unrecognized option '-x%s'"), arg);
- }
+ md.default_explicit_mode = 1;
break;
- case 'S':
- /* nops Print nops statistics. */
+ case OPTION_XAUTO:
+ md.detect_dv = 1;
+ md.default_explicit_mode = 0;
break;
- /* GNU specific switches for gcc. */
- case OPTION_MCONSTANT_GP:
- md.flags |= EF_IA_64_CONS_GP;
+ case OPTION_XDEBUG:
+ md.detect_dv = 1;
+ md.debug_dv = 1;
break;
- case OPTION_MAUTO_PIC:
- md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
+ case OPTION_XDEBUGX:
+ md.detect_dv = 1;
+ md.debug_dv = 1;
+ md.default_explicit_mode = 1;
break;
default:
@@ -6573,16 +6539,19 @@ md_show_usage (stream)
{
fputs (_("\
IA-64 options:\n\
- --mconstant-gp mark output file as using the constant-GP model\n\
+ -mconstant-gp mark output file as using the constant-GP model\n\
(sets ELF header flag EF_IA_64_CONS_GP)\n\
- --mauto-pic mark output file as using the constant-GP model\n\
+ -mauto-pic mark output file as using the constant-GP model\n\
without function descriptors (sets ELF header flag\n\
EF_IA_64_NOFUNCDESC_CONS_GP)\n\
- -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
- -mle | -mbe select little- or big-endian byte order (default -mle)\n\
+ -milp64|-mlp64|-mp64 select LP64 data model (default)\n\
+ -milp32 select ILP32 data model\n\
+ -mle select little-endian byte order (default)\n\
+ -mbe select big-endian byte order\n\
+ -mb-step diagnose code that triggers A/B-step errata\n\
-x | -xexplicit turn on dependency violation checking (default)\n\
-xauto automagically remove dependency violations\n\
- -xdebug debug dependency violation checker\n"),
+ -xdebug, -xdebugx debug dependency violation checker\n"),
stream);
}
===================================================================
Index: gas/doc/c-ia64.texi
--- gas/doc/c-ia64.texi 26 Oct 2003 18:12:03 -0000 1.3
+++ gas/doc/c-ia64.texi 14 Apr 2004 00:46:22 -0000
@@ -57,13 +57,19 @@ turn on the EF_IA_64_NOFUNCDESC_CONS_GP
@item -mlp64
@item -mp64
These options select the data model. The assembler defaults to @code{-mlp64}
-(LP64 data model).
+(LP64 data model). Note that the @code{-milp64}, @code{-mlp64}, and
+@code{-mp64} data models are all the same to the assembler.
@item -mle
@item -mbe
These options select the byte order. The @code{-mle} option selects little-endian
byte order (default) and @code{-mbe} selects big-endian byte order. Note that
IA-64 machine code always uses little-endian byte order.
+
+@item -mb-step
+This option enables warnings about assembly sequences that will be
+mis-executed because of errata in Itanium 1, A/B-step processors.
+Most people do not have these processors.
@item -x
@item -xexplicit