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Re: [patch] MIPS gas problems with gcc's explicit relocs


On Fri, 4 Jun 2004, Thiemo Seufer wrote:

> - Try to workaround it in the assembler. This can't be done easily,
>   since the 32bit relocation handling code assumes an LO16 reloc to
>   reference to the same address than the preceding HI16 reloc.

 This is actually an independent problem with explicit relocs passed to
the inside of an asm with the o32 ABI (or REL relocations, to be exact).  
Consider the following (perhaps a bit useless, but valid) code.

asm(
	"lw	%0,%2\n\t"
	"lw	%1,%3"
	: "=r" (r0), "=&r" (r1)
	: "m" (*m0), "m" (*m1));

If built for o32, non-PIC it's bad *by definition* if "%lo" is a part of
"%2" and "%3", as HI16 and LO16 relocs need to be paired, as you say.  
Actually the ABI requires them not to be separated with any other reloc,
but we are a bit less strict in BFD.

 I'm not sure what solution would be the best.  I think "%lo" may be
safely passed to an asm if there's only a single memory constraint used
("+m"  should be safe, too, but I'm told it's treated as a pair of
constraints consisting of an input and an output one internally) and
should be used then for performance (atomic operations using ll/sc would
benefit here, for example).  With more then a single memory constraint
they should probably all be forced into registers and expanded as
"0($reg)" to be valid address expressions.  Perhaps one corresponding to
the last HI16 reloc emitted by gcc before an asm can be retained as a
"%lo" expression.

 This is purely an abstract consideration based on performance
optimization without looking into GCC code, though.  Perhaps it would be
much too involving for and simply no "%lo" should be passed into an asm 
for the o32 ABI.

 New ABIs that use RELA relocations are certainly safe.

  Maciej

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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