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Re: [RFC] Arm frame unwinding directives.


On Tuesday 22 June 2004 17:23, Ian Lance Taylor wrote:
> Paul Brook <paul@codesourcery.com> writes:
> > I'm currently working on implementing EABI compliant exception
> > handling/frame unwinding for arm targets. This involves generating frame
> > unwind tables.
>
> ...
>
> > A similar technique is used by ia64 targets.
>
> My understanding is that the ARM EABI frame unwind tables are pretty
> much a straight copy of the ia64 stuff.  If so, we should share the
> implementation.

They're similar in principle. Both have an index table with one entry per 
function. This then points to an exception table entry containing unwind 
instructions and exception handling data.

The two targets seem sufficiently different that they've actually very little 
in common at the implementation level.

You'll be glad to know I am reusing the IA64 target hacks in gcc to generate 
these directives:)

> If not, how do they differ?

I'm having a hard time getting my head around the ia64 system.  From what I 
can understand there seem to be target specific assumption sprinkled all over 
the place:

The ia64 unwind directives seem to be expressed in terms of save areas and 
which registers are saved in them. The arm unwind directives more or less map 
onto the machine instructions used to create the frame.
It seems silly to generate multiple directives describing the allocation of 
stack space, and the location of registers within that space when we're going 
to convert that straight back into a single unwind opcode.

The ia64 system has multiple unwind regions per function. The arm 
specification only has a single unwind state per function (it is assumed that 
exceptions are only thrown at function call sites).

I've also taken a look at the gas implementation and there doesn't seem to be 
much worth sharing.

Paul


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