This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
Re: Support for the Renesas M32C and M16C
On Sat, Jul 16, 2005 at 01:38:39PM -0500, Jim Blandy wrote:
>
> Alan Modra <amodra@bigpond.net.au> writes:
> > On Fri, Jul 15, 2005 at 06:34:26PM -0500, Jim Blandy wrote:
> > > I'll take care of these. If this isn't the problem you ran into,
> > > please let me know.
> >
> > No, the problem I had was related to use of CGEN_BITSET in cpu/m32c.opc
> > m32c_cgen_insn_supported. opcodes/m32c-asm.c:m32c_cgen_insn_supported
> > is quite different.
>
> I've committed the following, which should address that specific problem.
Perhaps you generated with an older version of cgen. The following
diffs remain.
Index: opcodes/m32c-asm.c
===================================================================
RCS file: /cvs/src/src/opcodes/m32c-asm.c,v
retrieving revision 1.1
diff -u -p -r1.1 m32c-asm.c
--- opcodes/m32c-asm.c 14 Jul 2005 22:52:25 -0000 1.1
+++ opcodes/m32c-asm.c 17 Jul 2005 05:49:45 -0000
@@ -1,26 +1,27 @@
/* Assembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-- the resultant file is machine generated, cgen-asm.in isn't
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-asm.in isn't
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
@@ -936,7 +937,7 @@ parse_push_regset (CGEN_CPU_DESC cd ATTR
/* -- dis.c */
const char * m32c_cgen_parse_operand
- PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
+ (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
/* Main entry point for operand parsing.
@@ -952,11 +953,10 @@ const char * m32c_cgen_parse_operand
the handlers. */
const char *
-m32c_cgen_parse_operand (cd, opindex, strp, fields)
- CGEN_CPU_DESC cd;
- int opindex;
- const char ** strp;
- CGEN_FIELDS * fields;
+m32c_cgen_parse_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ const char ** strp,
+ CGEN_FIELDS * fields)
{
const char * errmsg = NULL;
/* Used by scalar operands that still need to be parsed. */
@@ -1574,8 +1574,7 @@ cgen_parse_fn * const m32c_cgen_parse_ha
};
void
-m32c_cgen_init_asm (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_init_asm (CGEN_CPU_DESC cd)
{
m32c_cgen_init_opcode_table (cd);
m32c_cgen_init_ibld_table (cd);
@@ -1958,30 +1957,3 @@ m32c_cgen_assemble_insn (CGEN_CPU_DESC c
return NULL;
}
}
-
-#if 0 /* This calls back to GAS which we can't do without care. */
-
-/* Record each member of OPVALS in the assembler's symbol table.
- This lets GAS parse registers for us.
- ??? Interesting idea but not currently used. */
-
-/* Record each member of OPVALS in the assembler's symbol table.
- FIXME: Not currently used. */
-
-void
-m32c_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
-{
- CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
- const CGEN_KEYWORD_ENTRY * ke;
-
- while ((ke = cgen_keyword_search_next (& search)) != NULL)
- {
-#if 0 /* Unnecessary, should be done in the search routine. */
- if (! m32c_cgen_opval_supported (ke))
- continue;
-#endif
- cgen_asm_record_register (cd, ke->name, ke->value);
- }
-}
-
-#endif /* 0 */
Index: opcodes/m32c-desc.c
===================================================================
RCS file: /cvs/src/src/opcodes/m32c-desc.c,v
retrieving revision 1.1
diff -u -p -r1.1 m32c-desc.c
--- opcodes/m32c-desc.c 14 Jul 2005 22:52:25 -0000 1.1
+++ opcodes/m32c-desc.c 17 Jul 2005 05:50:03 -0000
@@ -62265,27 +62265,23 @@ static const CGEN_IBASE m32c_cgen_insn_t
#undef A
/* Initialize anything needed to be done once, before any cpu_open call. */
-static void init_tables PARAMS ((void));
static void
-init_tables ()
+init_tables (void)
{
}
-static const CGEN_MACH * lookup_mach_via_bfd_name
- PARAMS ((const CGEN_MACH *, const char *));
-static void build_hw_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
-static void build_insn_table PARAMS ((CGEN_CPU_TABLE *));
-static void m32c_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
+static const CGEN_MACH * lookup_mach_via_bfd_name (const CGEN_MACH *, const char *);
+static void build_hw_table (CGEN_CPU_TABLE *);
+static void build_ifield_table (CGEN_CPU_TABLE *);
+static void build_operand_table (CGEN_CPU_TABLE *);
+static void build_insn_table (CGEN_CPU_TABLE *);
+static void m32c_cgen_rebuild_tables (CGEN_CPU_TABLE *);
/* Subroutine of m32c_cgen_cpu_open to look up a mach via its bfd name. */
static const CGEN_MACH *
-lookup_mach_via_bfd_name (table, name)
- const CGEN_MACH *table;
- const char *name;
+lookup_mach_via_bfd_name (const CGEN_MACH *table, const char *name)
{
while (table->name)
{
@@ -62299,8 +62295,7 @@ lookup_mach_via_bfd_name (table, name)
/* Subroutine of m32c_cgen_cpu_open to build the hardware table. */
static void
-build_hw_table (cd)
- CGEN_CPU_TABLE *cd;
+build_hw_table (CGEN_CPU_TABLE *cd)
{
int i;
int machs = cd->machs;
@@ -62326,8 +62321,7 @@ build_hw_table (cd)
/* Subroutine of m32c_cgen_cpu_open to build the hardware table. */
static void
-build_ifield_table (cd)
- CGEN_CPU_TABLE *cd;
+build_ifield_table (CGEN_CPU_TABLE *cd)
{
cd->ifld_table = & m32c_cgen_ifld_table[0];
}
@@ -62335,8 +62329,7 @@ build_ifield_table (cd)
/* Subroutine of m32c_cgen_cpu_open to build the hardware table. */
static void
-build_operand_table (cd)
- CGEN_CPU_TABLE *cd;
+build_operand_table (CGEN_CPU_TABLE *cd)
{
int i;
int machs = cd->machs;
@@ -62344,8 +62337,7 @@ build_operand_table (cd)
/* MAX_OPERANDS is only an upper bound on the number of selected entries.
However each entry is indexed by it's enum so there can be holes in
the table. */
- const CGEN_OPERAND **selected =
- (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
+ const CGEN_OPERAND **selected = xmalloc (MAX_OPERANDS * sizeof (* selected));
cd->operand_table.init_entries = init;
cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
@@ -62368,12 +62360,11 @@ build_operand_table (cd)
operand elements to be in the table [which they mightn't be]. */
static void
-build_insn_table (cd)
- CGEN_CPU_TABLE *cd;
+build_insn_table (CGEN_CPU_TABLE *cd)
{
int i;
const CGEN_IBASE *ib = & m32c_cgen_insn_table[0];
- CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
+ CGEN_INSN *insns = xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
for (i = 0; i < MAX_INSNS; ++i)
@@ -62386,8 +62377,7 @@ build_insn_table (cd)
/* Subroutine of m32c_cgen_cpu_open to rebuild the tables. */
static void
-m32c_cgen_rebuild_tables (cd)
- CGEN_CPU_TABLE *cd;
+m32c_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
{
int i;
unsigned int isas = cd->isas;
@@ -62399,7 +62389,7 @@ m32c_cgen_rebuild_tables (cd)
#define UNSET (CGEN_SIZE_UNKNOWN + 1)
cd->default_insn_bitsize = UNSET;
cd->base_insn_bitsize = UNSET;
- cd->min_insn_bitsize = 65535; /* some ridiculously big number */
+ cd->min_insn_bitsize = 65535; /* Some ridiculously big number. */
cd->max_insn_bitsize = 0;
for (i = 0; i < MAX_ISAS; ++i)
if (((1 << i) & isas) != 0)
@@ -62411,7 +62401,7 @@ m32c_cgen_rebuild_tables (cd)
if (cd->default_insn_bitsize == UNSET)
cd->default_insn_bitsize = isa->default_insn_bitsize;
else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
- ; /* this is ok */
+ ; /* This is ok. */
else
cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
@@ -62420,7 +62410,7 @@ m32c_cgen_rebuild_tables (cd)
if (cd->base_insn_bitsize == UNSET)
cd->base_insn_bitsize = isa->base_insn_bitsize;
else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
- ; /* this is ok */
+ ; /* This is ok. */
else
cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
@@ -62532,12 +62522,12 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_a
}
va_end (ap);
- /* mach unspecified means "all" */
+ /* Mach unspecified means "all". */
if (machs == 0)
machs = (1 << MAX_MACHS) - 1;
- /* base mach is always selected */
+ /* Base mach is always selected. */
machs |= 1;
- /* isa unspecified means "all" */
+ /* ISA unspecified means "all". */
if (isas == 0)
isas = (1 << MAX_ISAS) - 1;
if (endian == CGEN_ENDIAN_UNKNOWN)
@@ -62570,9 +62560,7 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_a
MACH_NAME is the bfd name of the mach. */
CGEN_CPU_DESC
-m32c_cgen_cpu_open_1 (mach_name, endian)
- const char *mach_name;
- enum cgen_endian endian;
+m32c_cgen_cpu_open_1 (const char *mach_name, enum cgen_endian endian)
{
return m32c_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
CGEN_CPU_OPEN_ENDIAN, endian,
@@ -62585,8 +62573,7 @@ m32c_cgen_cpu_open_1 (mach_name, endian)
place as some simulator ports use this but they don't use libopcodes. */
void
-m32c_cgen_cpu_close (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_cpu_close (CGEN_CPU_DESC cd)
{
unsigned int i;
const CGEN_INSN *insns;
@@ -62595,23 +62582,17 @@ m32c_cgen_cpu_close (cd)
{
insns = cd->macro_insn_table.init_entries;
for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
- {
- if (CGEN_INSN_RX ((insns)))
- regfree (CGEN_INSN_RX (insns));
- }
+ if (CGEN_INSN_RX ((insns)))
+ regfree (CGEN_INSN_RX (insns));
}
if (cd->insn_table.init_entries)
{
insns = cd->insn_table.init_entries;
for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
- {
- if (CGEN_INSN_RX (insns))
- regfree (CGEN_INSN_RX (insns));
- }
- }
-
-
+ if (CGEN_INSN_RX (insns))
+ regfree (CGEN_INSN_RX (insns));
+ }
if (cd->macro_insn_table.init_entries)
free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
Index: opcodes/m32c-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/m32c-dis.c,v
retrieving revision 1.1
diff -u -p -r1.1 m32c-dis.c
--- opcodes/m32c-dis.c 14 Jul 2005 22:52:26 -0000 1.1
+++ opcodes/m32c-dis.c 17 Jul 2005 05:50:03 -0000
@@ -1,27 +1,27 @@
/* Disassembler interface for targets using CGEN. -*- C -*-
CGEN: Cpu tools GENerator
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-- the resultant file is machine generated, cgen-dis.in isn't
+ THIS FILE IS MACHINE GENERATED WITH CGEN.
+ - the resultant file is machine generated, cgen-dis.in isn't
-Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
-Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
+ Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
@@ -56,7 +56,7 @@ static int read_insn
(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
unsigned long *);
-/* -- disassembler routines inserted here */
+/* -- disassembler routines inserted here. */
/* -- dis.c */
@@ -272,8 +272,7 @@ print_boff (CGEN_CPU_DESC cd ATTRIBUTE_U
#endif /* not used? */
void m32c_cgen_print_operand
- PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
- void const *, bfd_vma, int));
+ (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
/* Main entry point for printing operands.
XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
@@ -291,16 +290,15 @@ void m32c_cgen_print_operand
the handlers. */
void
-m32c_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
- CGEN_CPU_DESC cd;
- int opindex;
- PTR xinfo;
- CGEN_FIELDS *fields;
- void const *attrs ATTRIBUTE_UNUSED;
- bfd_vma pc;
- int length;
+m32c_cgen_print_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ void * xinfo,
+ CGEN_FIELDS *fields,
+ void const *attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc,
+ int length)
{
- disassemble_info *info = (disassemble_info *) xinfo;
+ disassemble_info *info = (disassemble_info *) xinfo;
switch (opindex)
{
@@ -878,8 +876,7 @@ cgen_print_fn * const m32c_cgen_print_ha
void
-m32c_cgen_init_dis (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_init_dis (CGEN_CPU_DESC cd)
{
m32c_cgen_init_opcode_table (cd);
m32c_cgen_init_ibld_table (cd);
@@ -931,7 +928,7 @@ print_address (CGEN_CPU_DESC cd ATTRIBUT
/* Print the operand as directed by the attributes. */
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
- ; /* nothing to do */
+ ; /* Nothing to do. */
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
(*info->print_address_func) (value, info);
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
@@ -1013,6 +1010,7 @@ read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UN
unsigned long *insn_value)
{
int status = (*info->read_memory_func) (pc, buf, buflen, info);
+
if (status != 0)
{
(*info->memory_error_func) (status, pc, info);
@@ -1117,13 +1115,13 @@ print_insn (CGEN_CPU_DESC cd,
length = CGEN_EXTRACT_FN (cd, insn)
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
- /* length < 0 -> error */
+ /* Length < 0 -> error. */
if (length < 0)
return length;
if (length > 0)
{
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
- /* length is in bits, result is in bytes */
+ /* Length is in bits, result is in bytes. */
return length / 8;
}
}
@@ -1173,7 +1171,8 @@ default_print_insn (CGEN_CPU_DESC cd, bf
Print one instruction from PC on INFO->STREAM.
Return the size of the instruction (in bytes). */
-typedef struct cpu_desc_list {
+typedef struct cpu_desc_list
+{
struct cpu_desc_list *next;
int isa;
int mach;
@@ -1258,7 +1257,7 @@ print_insn_m32c (bfd_vma pc, disassemble
if (!cd)
abort ();
- /* save this away for future reference */
+ /* Save this away for future reference. */
cl = xmalloc (sizeof (struct cpu_desc_list));
cl->cd = cd;
cl->isa = isa;
Index: opcodes/m32c-ibld.c
===================================================================
RCS file: /cvs/src/src/opcodes/m32c-ibld.c,v
retrieving revision 1.1
diff -u -p -r1.1 m32c-ibld.c
--- opcodes/m32c-ibld.c 14 Jul 2005 22:52:26 -0000 1.1
+++ opcodes/m32c-ibld.c 17 Jul 2005 05:50:04 -0000
@@ -1,25 +1,26 @@
/* Instruction building/extraction support for m32c. -*- C -*-
-THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
-- the resultant file is machine generated, cgen-ibld.in isn't
+ THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
+ - the resultant file is machine generated, cgen-ibld.in isn't
-Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
+ Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
+ Free Software Foundation, Inc.
-This file is part of the GNU Binutils and GDB, the GNU debugger.
+ This file is part of the GNU Binutils and GDB, the GNU debugger.
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
/* ??? Eventually more and more of this stuff can go to cpu-independent files.
Keep that in mind. */
@@ -35,9 +36,9 @@ along with this program; if not, write t
#include "opintl.h"
#include "safe-ctype.h"
-#undef min
+#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
-#undef max
+#undef max
#define max(a,b) ((a) > (b) ? (a) : (b))
/* Used by the ifield rtx function. */
@@ -136,12 +137,6 @@ insert_normal (CGEN_CPU_DESC cd,
if (length == 0)
return NULL;
-#if 0
- if (CGEN_INT_INSN_P
- && word_offset != 0)
- abort ();
-#endif
-
if (word_length > 32)
abort ();
@@ -286,7 +281,7 @@ insert_insn_normal (CGEN_CPU_DESC cd,
#if CGEN_INT_INSN_P
/* Cover function to store an insn value into an integral insn. Must go here
- because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
+ because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
static void
put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
@@ -304,6 +299,7 @@ put_insn_int_value (CGEN_CPU_DESC cd ATT
int shift = insn_length - length;
/* Written this way to avoid undefined behaviour. */
CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
+
*buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
}
}
@@ -374,9 +370,7 @@ extract_1 (CGEN_CPU_DESC cd,
{
unsigned long x;
int shift;
-#if 0
- int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
-#endif
+
x = cgen_get_insn_value (cd, bufp, word_length);
if (CGEN_INSN_LSB0_P)
@@ -439,12 +433,6 @@ extract_normal (CGEN_CPU_DESC cd,
return 1;
}
-#if 0
- if (CGEN_INT_INSN_P
- && word_offset != 0)
- abort ();
-#endif
-
if (word_length > 32)
abort ();
@@ -539,10 +527,10 @@ extract_insn_normal (CGEN_CPU_DESC cd,
return CGEN_INSN_BITSIZE (insn);
}
-/* machine generated code added here */
+/* Machine generated code added here. */
const char * m32c_cgen_insert_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma));
+ (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
/* Main entry point for operand insertion.
@@ -559,12 +547,11 @@ const char * m32c_cgen_insert_operand
resolved during parsing. */
const char *
-m32c_cgen_insert_operand (cd, opindex, fields, buffer, pc)
- CGEN_CPU_DESC cd;
- int opindex;
- CGEN_FIELDS * fields;
- CGEN_INSN_BYTES_PTR buffer;
- bfd_vma pc ATTRIBUTE_UNUSED;
+m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_FIELDS * fields,
+ CGEN_INSN_BYTES_PTR buffer,
+ bfd_vma pc ATTRIBUTE_UNUSED)
{
const char * errmsg = NULL;
unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
@@ -1678,8 +1665,7 @@ m32c_cgen_insert_operand (cd, opindex, f
}
int m32c_cgen_extract_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
- CGEN_FIELDS *, bfd_vma));
+ (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
/* Main entry point for operand extraction.
The result is <= 0 for error, >0 for success.
@@ -1697,13 +1683,12 @@ int m32c_cgen_extract_operand
the handlers. */
int
-m32c_cgen_extract_operand (cd, opindex, ex_info, insn_value, fields, pc)
- CGEN_CPU_DESC cd;
- int opindex;
- CGEN_EXTRACT_INFO *ex_info;
- CGEN_INSN_INT insn_value;
- CGEN_FIELDS * fields;
- bfd_vma pc;
+m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
+ int opindex,
+ CGEN_EXTRACT_INFO *ex_info,
+ CGEN_INSN_INT insn_value,
+ CGEN_FIELDS * fields,
+ bfd_vma pc)
{
/* Assume success (for those operands that are nops). */
int length = 1;
@@ -2793,10 +2778,8 @@ cgen_extract_fn * const m32c_cgen_extrac
extract_insn_normal,
};
-int m32c_cgen_get_int_operand
- PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
-bfd_vma m32c_cgen_get_vma_operand
- PARAMS ((CGEN_CPU_DESC, int, const CGEN_FIELDS *));
+int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
+bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
/* Getting values from cgen_fields is handled by a collection of functions.
They are distinguished by the type of the VALUE argument they return.
@@ -2804,10 +2787,9 @@ bfd_vma m32c_cgen_get_vma_operand
not appropriate. */
int
-m32c_cgen_get_int_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- const CGEN_FIELDS * fields;
+m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
{
int value;
@@ -3383,10 +3365,9 @@ m32c_cgen_get_int_operand (cd, opindex,
}
bfd_vma
-m32c_cgen_get_vma_operand (cd, opindex, fields)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- const CGEN_FIELDS * fields;
+m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ const CGEN_FIELDS * fields)
{
bfd_vma value;
@@ -3961,10 +3942,8 @@ m32c_cgen_get_vma_operand (cd, opindex,
return value;
}
-void m32c_cgen_set_int_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, int));
-void m32c_cgen_set_vma_operand
- PARAMS ((CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma));
+void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
+void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
/* Stuffing values in cgen_fields is handled by a collection of functions.
They are distinguished by the type of the VALUE argument they accept.
@@ -3972,11 +3951,10 @@ void m32c_cgen_set_vma_operand
not appropriate. */
void
-m32c_cgen_set_int_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- CGEN_FIELDS * fields;
- int value;
+m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ int value)
{
switch (opindex)
{
@@ -4529,11 +4507,10 @@ m32c_cgen_set_int_operand (cd, opindex,
}
void
-m32c_cgen_set_vma_operand (cd, opindex, fields, value)
- CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
- int opindex;
- CGEN_FIELDS * fields;
- bfd_vma value;
+m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ int opindex,
+ CGEN_FIELDS * fields,
+ bfd_vma value)
{
switch (opindex)
{
@@ -5088,8 +5065,7 @@ m32c_cgen_set_vma_operand (cd, opindex,
/* Function to call before using the instruction builder tables. */
void
-m32c_cgen_init_ibld_table (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
{
cd->insert_handlers = & m32c_cgen_insert_handlers[0];
cd->extract_handlers = & m32c_cgen_extract_handlers[0];
Index: opcodes/m32c-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/m32c-opc.c,v
retrieving revision 1.1
diff -u -p -r1.1 m32c-opc.c
--- opcodes/m32c-opc.c 14 Jul 2005 22:52:26 -0000 1.1
+++ opcodes/m32c-opc.c 17 Jul 2005 05:50:22 -0000
@@ -53,10 +53,10 @@ m32c_asm_hash (const char *mnem)
/* The hash functions are recorded here to help keep assembler code out of
the disassembler and vice versa. */
-static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
-static unsigned int asm_hash_insn PARAMS ((const char *));
-static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
-static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
+static int asm_hash_insn_p (const CGEN_INSN *);
+static unsigned int asm_hash_insn (const char *);
+static int dis_hash_insn_p (const CGEN_INSN *);
+static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
/* Instruction formats. */
@@ -79353,14 +79353,10 @@ dis_hash_insn (buf, value)
return CGEN_DIS_HASH (buf, value);
}
-static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int));
-
/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
static void
-set_fields_bitsize (fields, size)
- CGEN_FIELDS *fields;
- int size;
+set_fields_bitsize (CGEN_FIELDS *fields, int size)
{
CGEN_FIELDS_BITSIZE (fields) = size;
}
@@ -79369,15 +79365,15 @@ set_fields_bitsize (fields, size)
This plugs the opcode entries and macro instructions into the cpu table. */
void
-m32c_cgen_init_opcode_table (cd)
- CGEN_CPU_DESC cd;
+m32c_cgen_init_opcode_table (CGEN_CPU_DESC cd)
{
int i;
int num_macros = (sizeof (m32c_cgen_macro_insn_table) /
sizeof (m32c_cgen_macro_insn_table[0]));
const CGEN_IBASE *ib = & m32c_cgen_macro_insn_table[0];
const CGEN_OPCODE *oc = & m32c_cgen_macro_insn_opcode_table[0];
- CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
+ CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
+
memset (insns, 0, num_macros * sizeof (CGEN_INSN));
for (i = 0; i < num_macros; ++i)
{
--
Alan Modra
IBM OzLabs - Linux Technology Centre