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Committed: fix CRIS disassembler for prefixed PC-assignment.


I have to change the (rarely emitted but still necessary) 32-bit
pre-v32 expansion of a PC-relative branch "ba .+N" from "add.d
N,pc" to one that doesn't change condition codes.  I noticed
that the candidate "move [pc=pc+N],$p0" wasn't even recognized
by the disassembler; it ignored prefixing and thus confused
prefix-side-effect assignments to PC with constants.

Committed.

gas/testsuite:
	* gas/cris/rd-pcplus.s, gas/cris/rd-pcplus.d: New test.

opcodes:
	* cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
	(print_with_operands): Check for prefix when [PC+] is seen.

--- /dev/null	2005-12-05 23:18:47.928433000 +0100
+++ gas/cris/rd-pcplus.d	2005-12-06 00:07:05.000000000 +0100
@@ -0,0 +1,16 @@
+#as: --em=criself --march=v10 --underscore
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+[ 	]+0:[ 	]+4715 3fbe[ 	]+move \[pc=r7\+r1\.b\],srp
+[ 	]+4:[ 	]+6ffd 0000 0100 3f0e[ 	]+move \[pc=pc\+10000 <a\+0x10000>\],p0
+[ 	]+c:[ 	]+4385 6f5e[ 	]+move\.d \[pc=r3\+r8\.b\],r5
+[ 	]+10:[ 	]+6ffd 0000 0100 6fbe[ 	]+move\.d \[pc=pc\+10000 <a\+0x10000>\],r11
+[ 	]+18:[ 	]+6f5d 0000 0a00 3f1e[ 	]+move \[pc=r5\+a0000 <a\+0xa0000>\],vr
+[ 	]+20:[ 	]+5f7d 8f02 6fde[ 	]+move\.d \[pc=r7\+655\],r13
+[ 	]+26:[ 	]+4161 6fae[ 	]+move\.d \[pc=r6\+65\],r10
+[ 	]+2a:[ 	]+0f05[ 	]+nop 
--- /dev/null	2005-12-05 23:18:47.928433000 +0100
+++ gas/cris/rd-pcplus.s	2005-12-05 23:55:41.000000000 +0100
@@ -0,0 +1,10 @@
+ .text
+a:
+ move [$pc=$r7+$r1.b],$srp
+ move [$pc=$pc+65536],$p0
+ move.d [$pc=$r3+$r8.b],$r5
+ move.d [$pc=$pc+65536],$r11
+ move [$pc=$r5+655360],$p1
+ move.d [$pc=$r7+655],$r13
+ move.d [$pc=$r6+65],$r10
+ nop
Index: cris-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/cris-dis.c,v
retrieving revision 1.15
diff -p -u -r1.15 cris-dis.c
--- cris-dis.c	7 Jul 2005 19:27:48 -0000	1.15
+++ cris-dis.c	5 Dec 2005 23:14:06 -0000
@@ -651,7 +651,8 @@ format_sup_reg (unsigned int regno,
 static unsigned
 bytes_to_skip (unsigned int insn,
 	       const struct cris_opcode *matchedp,
-	       enum cris_disass_family distype)
+	       enum cris_disass_family distype,
+	       const struct cris_opcode *prefix_matchedp)
 {
   /* Each insn is a word plus "immediate" operands.  */
   unsigned to_skip = 2;
@@ -660,7 +661,8 @@ bytes_to_skip (unsigned int insn,
 
   for (s = template; *s; s++)
     if ((*s == 's' || *s == 'N' || *s == 'Y')
-	&& (insn & 0x400) && (insn & 15) == 15)
+	&& (insn & 0x400) && (insn & 15) == 15
+	&& prefix_matchedp == NULL)
       {
 	/* Immediate via [pc+], so we have to check the size of the
 	   operand.  */
@@ -880,7 +882,7 @@ print_with_operands (const struct cris_o
       case 'S':
       case 's':
 	/* Any "normal" memory operand.  */
-	if ((insn & 0x400) && (insn & 15) == 15)
+	if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL)
 	  {
 	    /* We're looking at [pc+], i.e. we need to output an immediate
 	       number, where the size can depend on different things.  */
@@ -1495,7 +1497,7 @@ print_insn_cris_generic (bfd_vma memaddr
 	      /* If it's a prefix, put it into the prefix vars and get the
 		 main insn.  */
 	      prefix_size = bytes_to_skip (prefix_insn, matchedp,
-					   disdata->distype);
+					   disdata->distype, NULL);
 	      prefix_opcodep = matchedp;
 
 	      insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
@@ -1527,7 +1529,9 @@ print_insn_cris_generic (bfd_vma memaddr
 	    }
 	  else
 	    {
-	      advance += bytes_to_skip (insn, matchedp, disdata->distype);
+	      advance
+		+= bytes_to_skip (insn, matchedp, disdata->distype,
+				  prefix_opcodep);
 
 	      /* The info_type and assorted fields will be set according
 		 to the operands.   */

brgds, H-P


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