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PATCH: PR binutils/2428: rep and repz are misdisassembled


I will check in this patch to correctly disassembly rep/repz.


H.J.
----
gas/testsuite/

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
	x86-64-rep-suffix.

	* gas/i386/naked.d: Replace repz with rep.
	* gas/i386/x86_64.d: Likewise.

	* gas/i386/rep-suffix.d: New file. 
	* gas/i386/rep-suffix.s: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/rep.s: Likewise.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-rep.s: Likewise.

opcodes/

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

--- binutils/gas/testsuite/gas/i386/i386.exp.rep	2006-02-27 15:50:55.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/i386.exp	2006-03-07 11:26:52.000000000 -0800
@@ -69,6 +69,8 @@ if [expr ([istarget "i*86-*-*"] ||  [ist
     run_list_test "cr-err" ""
     run_dump_test "svme"
     run_dump_test "merom"
+    run_dump_test "rep"
+    run_dump_test "rep-suffix"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -138,6 +140,8 @@ if [expr ([istarget "i*86-*-*"] || [ista
     run_dump_test "x86-64-drx"
     run_dump_test "x86-64-drx-suffix"
     run_dump_test "x86-64-merom"
+    run_dump_test "x86-64-rep"
+    run_dump_test "x86-64-rep-suffix"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
--- binutils/gas/testsuite/gas/i386/naked.d.rep	2005-03-29 12:09:20.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/naked.d	2006-03-07 11:05:23.000000000 -0800
@@ -15,7 +15,7 @@ Disassembly of section .text:
   1b:	8c 2c ed 00 00 00 00 [ 	]*movw   %gs,0x0\(,%ebp,8\)
   22:	26 88 25 00 00 00 00 [ 	]*mov    %ah,%es:0x0
   29:	2e 8b 74 14 80 [ 	]*mov    %cs:0xffffff80\(%esp,%edx,1\),%esi
-  2e:	f3 65 a5 [ 	]*repz movsl %gs:\(%esi\),%es:\(%edi\)
+  2e:	f3 65 a5 [ 	]*rep movsl %gs:\(%esi\),%es:\(%edi\)
   31:	ec [ 	]*in     \(%dx\),%al
   32:	66 ef [ 	]*out    %ax,\(%dx\)
   34:	67 d2 14 [ 	]*addr16 rclb %cl,\(%si\)
--- binutils/gas/testsuite/gas/i386/rep-suffix.d.rep	2006-03-07 11:28:19.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/rep-suffix.d	2006-03-07 11:33:56.000000000 -0800
@@ -0,0 +1,15 @@
+#objdump: -dwMsuffix
+#name: i386 rep prefix (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_start>:
+   0:	f3 ac[ 	]+rep lodsb %ds:\(%esi\),%al
+   2:	f3 aa[ 	]+rep stosb %al,%es:\(%edi\)
+   4:	f3 66 ad[ 	]+rep lodsw %ds:\(%esi\),%ax
+   7:	f3 66 ab[ 	]+rep stosw %ax,%es:\(%edi\)
+   a:	f3 ad[ 	]+rep lodsl %ds:\(%esi\),%eax
+   c:	f3 ab[ 	]+rep stosl %eax,%es:\(%edi\)
+#pass
--- binutils/gas/testsuite/gas/i386/rep-suffix.s.rep	2006-03-07 11:28:17.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/rep-suffix.s	2006-03-07 11:29:02.000000000 -0800
@@ -0,0 +1,9 @@
+# Disassembling with -Msuffix.
+	.text
+_start:
+	rep lodsb
+	rep stosb
+	rep lodsw
+	rep stosw
+	rep lodsl
+	rep stosl
--- binutils/gas/testsuite/gas/i386/rep.d.rep	2006-03-07 11:12:47.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/rep.d	2006-03-07 11:25:15.000000000 -0800
@@ -0,0 +1,50 @@
+#objdump: -dw
+#name: i386 rep prefix
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+   0:	f3 6c[ 	]+rep insb \(%dx\),%es:\(%edi\)
+   2:	f3 6e[ 	]+rep outsb %ds:\(%esi\),\(%dx\)
+   4:	f3 a4[ 	]+rep movsb %ds:\(%esi\),%es:\(%edi\)
+   6:	f3 ac[ 	]+rep lods %ds:\(%esi\),%al
+   8:	f3 aa[ 	]+rep stos %al,%es:\(%edi\)
+   a:	f3 a6[ 	]+repz cmpsb %es:\(%edi\),%ds:\(%esi\)
+   c:	f3 ae[ 	]+repz scas %es:\(%edi\),%al
+   e:	f3 66 6d[ 	]+rep insw \(%dx\),%es:\(%edi\)
+  11:	f3 66 6f[ 	]+rep outsw %ds:\(%esi\),\(%dx\)
+  14:	f3 66 a5[ 	]+rep movsw %ds:\(%esi\),%es:\(%edi\)
+  17:	f3 66 ad[ 	]+rep lods %ds:\(%esi\),%ax
+  1a:	f3 66 ab[ 	]+rep stos %ax,%es:\(%edi\)
+  1d:	f3 66 a7[ 	]+repz cmpsw %es:\(%edi\),%ds:\(%esi\)
+  20:	f3 66 af[ 	]+repz scas %es:\(%edi\),%ax
+  23:	f3 6d[ 	]+rep insl \(%dx\),%es:\(%edi\)
+  25:	f3 6f[ 	]+rep outsl %ds:\(%esi\),\(%dx\)
+  27:	f3 a5[ 	]+rep movsl %ds:\(%esi\),%es:\(%edi\)
+  29:	f3 ad[ 	]+rep lods %ds:\(%esi\),%eax
+  2b:	f3 ab[ 	]+rep stos %eax,%es:\(%edi\)
+  2d:	f3 a7[ 	]+repz cmpsl %es:\(%edi\),%ds:\(%esi\)
+  2f:	f3 af[ 	]+repz scas %es:\(%edi\),%eax
+  31:	f3 67 6c[ 	]+rep addr16 insb \(%dx\),%es:\(%di\)
+  34:	f3 67 6e[ 	]+rep addr16 outsb %ds:\(%si\),\(%dx\)
+  37:	f3 67 a4[ 	]+rep addr16 movsb %ds:\(%si\),%es:\(%di\)
+  3a:	f3 67 ac[ 	]+rep addr16 lods %ds:\(%si\),%al
+  3d:	f3 67 aa[ 	]+rep addr16 stos %al,%es:\(%di\)
+  40:	f3 67 a6[ 	]+repz addr16 cmpsb %es:\(%di\),%ds:\(%si\)
+  43:	f3 67 ae[ 	]+repz addr16 scas %es:\(%di\),%al
+  46:	f3 67 66 6d[ 	]+rep addr16 insw \(%dx\),%es:\(%di\)
+  4a:	f3 67 66 6f[ 	]+rep addr16 outsw %ds:\(%si\),\(%dx\)
+  4e:	f3 67 66 a5[ 	]+rep addr16 movsw %ds:\(%si\),%es:\(%di\)
+  52:	f3 67 66 ad[ 	]+rep addr16 lods %ds:\(%si\),%ax
+  56:	f3 67 66 ab[ 	]+rep addr16 stos %ax,%es:\(%di\)
+  5a:	f3 67 66 a7[ 	]+repz addr16 cmpsw %es:\(%di\),%ds:\(%si\)
+  5e:	f3 67 66 af[ 	]+repz addr16 scas %es:\(%di\),%ax
+  62:	f3 67 6d[ 	]+rep addr16 insl \(%dx\),%es:\(%di\)
+  65:	f3 67 6f[ 	]+rep addr16 outsl %ds:\(%si\),\(%dx\)
+  68:	f3 67 a5[ 	]+rep addr16 movsl %ds:\(%si\),%es:\(%di\)
+  6b:	f3 67 ad[ 	]+rep addr16 lods %ds:\(%si\),%eax
+  6e:	f3 67 ab[ 	]+rep addr16 stos %eax,%es:\(%di\)
+  71:	f3 67 a7[ 	]+repz addr16 cmpsl %es:\(%di\),%ds:\(%si\)
+  74:	f3 67 af[ 	]+repz addr16 scas %es:\(%di\),%eax
--- binutils/gas/testsuite/gas/i386/rep.s.rep	2006-03-07 11:12:44.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/rep.s	2006-03-07 11:22:35.000000000 -0800
@@ -0,0 +1,50 @@
+ 	.text
+
+_start:
+	rep insb
+	rep outsb
+	rep movsb
+	rep lodsb
+	rep stosb
+	repz cmpsb
+	repz scasb
+
+	rep insw
+	rep outsw
+	rep movsw
+	rep lodsw
+	rep stosw
+	repz cmpsw
+	repz scasw
+
+	rep insl
+	rep outsl
+	rep movsl
+	rep lodsl
+	rep stosl
+	repz cmpsl
+	repz scasl
+
+	addr16 rep insb
+	addr16 rep outsb
+	addr16 rep movsb
+	addr16 rep lodsb
+	addr16 rep stosb
+	addr16 repz cmpsb
+	addr16 repz scasb
+
+	addr16 rep insw
+	addr16 rep outsw
+	addr16 rep movsw
+	addr16 rep lodsw
+	addr16 rep stosw
+	addr16 repz cmpsw
+	addr16 repz scasw
+
+	addr16 rep insl
+	addr16 rep outsl
+	addr16 rep movsl
+	addr16 rep lodsl
+	addr16 rep stosl
+	addr16 repz cmpsl
+	addr16 repz scasl
--- binutils/gas/testsuite/gas/i386/x86-64-rep-suffix.d.rep	2006-03-07 11:26:30.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-rep-suffix.d	2006-03-07 11:33:35.000000000 -0800
@@ -0,0 +1,17 @@
+#objdump: -dwMsuffix
+#name: x86-64 rep prefix (with suffixes)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <_start>:
+   0:	f3 ac[ 	]+rep lodsb %ds:\(%rsi\),%al
+   2:	f3 aa[ 	]+rep stosb %al,%es:\(%rdi\)
+   4:	f3 66 ad[ 	]+rep lodsw %ds:\(%rsi\),%ax
+   7:	f3 66 ab[ 	]+rep stosw %ax,%es:\(%rdi\)
+   a:	f3 ad[ 	]+rep lodsl %ds:\(%rsi\),%eax
+   c:	f3 ab[ 	]+rep stosl %eax,%es:\(%rdi\)
+   e:	f3 48 ad[ 	]+rep lodsq %ds:\(%rsi\),%rax
+  11:	f3 48 ab[ 	]+rep stosq %rax,%es:\(%rdi\)
+#pass
--- binutils/gas/testsuite/gas/i386/x86-64-rep-suffix.s.rep	2006-03-07 11:28:29.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-rep-suffix.s	2006-03-07 11:29:31.000000000 -0800
@@ -0,0 +1,11 @@
+# Disassembling with -Msuffix.
+	.text
+_start:
+	rep lodsb
+	rep stosb
+	rep lodsw
+	rep stosw
+	rep lodsl
+	rep stosl
+	rep lodsq
+	rep stosq
--- binutils/gas/testsuite/gas/i386/x86-64-rep.d.rep	2006-03-07 11:13:37.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-rep.d	2006-03-07 11:23:59.000000000 -0800
@@ -0,0 +1,61 @@
+#objdump: -dw
+#name: x86-64 rep prefix
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+   0:	f3 6c[ 	]+rep insb \(%dx\),%es:\(%rdi\)
+   2:	f3 6e[ 	]+rep outsb %ds:\(%rsi\),\(%dx\)
+   4:	f3 a4[ 	]+rep movsb %ds:\(%rsi\),%es:\(%rdi\)
+   6:	f3 ac[ 	]+rep lods %ds:\(%rsi\),%al
+   8:	f3 aa[ 	]+rep stos %al,%es:\(%rdi\)
+   a:	f3 a6[ 	]+repz cmpsb %es:\(%rdi\),%ds:\(%rsi\)
+   c:	f3 ae[ 	]+repz scas %es:\(%rdi\),%al
+   e:	f3 66 6d[ 	]+rep insw \(%dx\),%es:\(%rdi\)
+  11:	f3 66 6f[ 	]+rep outsw %ds:\(%rsi\),\(%dx\)
+  14:	f3 66 a5[ 	]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
+  17:	f3 66 ad[ 	]+rep lods %ds:\(%rsi\),%ax
+  1a:	f3 66 ab[ 	]+rep stos %ax,%es:\(%rdi\)
+  1d:	f3 66 a7[ 	]+repz cmpsw %es:\(%rdi\),%ds:\(%rsi\)
+  20:	f3 66 af[ 	]+repz scas %es:\(%rdi\),%ax
+  23:	f3 6d[ 	]+rep insl \(%dx\),%es:\(%rdi\)
+  25:	f3 6f[ 	]+rep outsl %ds:\(%rsi\),\(%dx\)
+  27:	f3 a5[ 	]+rep movsl %ds:\(%rsi\),%es:\(%rdi\)
+  29:	f3 ad[ 	]+rep lods %ds:\(%rsi\),%eax
+  2b:	f3 ab[ 	]+rep stos %eax,%es:\(%rdi\)
+  2d:	f3 a7[ 	]+repz cmpsl %es:\(%rdi\),%ds:\(%rsi\)
+  2f:	f3 af[ 	]+repz scas %es:\(%rdi\),%eax
+  31:	f3 48 a5[ 	]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
+  34:	f3 48 ad[ 	]+rep lods %ds:\(%rsi\),%rax
+  37:	f3 48 ab[ 	]+rep stos %rax,%es:\(%rdi\)
+  3a:	f3 48 a7[ 	]+repz cmpsq %es:\(%rdi\),%ds:\(%rsi\)
+  3d:	f3 48 af[ 	]+repz scas %es:\(%rdi\),%rax
+  40:	f3 67 6c[ 	]+rep addr32 insb \(%dx\),%es:\(%edi\)
+  43:	f3 67 6e[ 	]+rep addr32 outsb %ds:\(%esi\),\(%dx\)
+  46:	f3 67 a4[ 	]+rep addr32 movsb %ds:\(%esi\),%es:\(%edi\)
+  49:	f3 67 ac[ 	]+rep addr32 lods %ds:\(%esi\),%al
+  4c:	f3 67 aa[ 	]+rep addr32 stos %al,%es:\(%edi\)
+  4f:	f3 67 a6[ 	]+repz addr32 cmpsb %es:\(%edi\),%ds:\(%esi\)
+  52:	f3 67 ae[ 	]+repz addr32 scas %es:\(%edi\),%al
+  55:	f3 67 66 6d[ 	]+rep addr32 insw \(%dx\),%es:\(%edi\)
+  59:	f3 67 66 6f[ 	]+rep addr32 outsw %ds:\(%esi\),\(%dx\)
+  5d:	f3 67 66 a5[ 	]+rep addr32 movsw %ds:\(%esi\),%es:\(%edi\)
+  61:	f3 67 66 ad[ 	]+rep addr32 lods %ds:\(%esi\),%ax
+  65:	f3 67 66 ab[ 	]+rep addr32 stos %ax,%es:\(%edi\)
+  69:	f3 67 66 a7[ 	]+repz addr32 cmpsw %es:\(%edi\),%ds:\(%esi\)
+  6d:	f3 67 66 af[ 	]+repz addr32 scas %es:\(%edi\),%ax
+  71:	f3 67 6d[ 	]+rep addr32 insl \(%dx\),%es:\(%edi\)
+  74:	f3 67 6f[ 	]+rep addr32 outsl %ds:\(%esi\),\(%dx\)
+  77:	f3 67 a5[ 	]+rep addr32 movsl %ds:\(%esi\),%es:\(%edi\)
+  7a:	f3 67 ad[ 	]+rep addr32 lods %ds:\(%esi\),%eax
+  7d:	f3 67 ab[ 	]+rep addr32 stos %eax,%es:\(%edi\)
+  80:	f3 67 a7[ 	]+repz addr32 cmpsl %es:\(%edi\),%ds:\(%esi\)
+  83:	f3 67 af[ 	]+repz addr32 scas %es:\(%edi\),%eax
+  86:	f3 67 48 a5[ 	]+rep addr32 movsq %ds:\(%esi\),%es:\(%edi\)
+  8a:	f3 67 48 ad[ 	]+rep addr32 lods %ds:\(%esi\),%rax
+  8e:	f3 67 48 ab[ 	]+rep addr32 stos %rax,%es:\(%edi\)
+  92:	f3 67 48 a7[ 	]+repz addr32 cmpsq %es:\(%edi\),%ds:\(%esi\)
+  96:	f3 67 48 af[ 	]+repz addr32 scas %es:\(%edi\),%rax
+#pass
--- binutils/gas/testsuite/gas/i386/x86-64-rep.s.rep	2006-03-07 11:13:35.000000000 -0800
+++ binutils/gas/testsuite/gas/i386/x86-64-rep.s	2006-03-07 11:13:29.000000000 -0800
@@ -0,0 +1,62 @@
+ 	.text
+
+_start:
+	rep insb
+	rep outsb
+	rep movsb
+	rep lodsb
+	rep stosb
+	repz cmpsb
+	repz scasb
+
+	rep insw
+	rep outsw
+	rep movsw
+	rep lodsw
+	rep stosw
+	repz cmpsw
+	repz scasw
+
+	rep insl
+	rep outsl
+	rep movsl
+	rep lodsl
+	rep stosl
+	repz cmpsl
+	repz scasl
+
+	rep movsq
+	rep lodsq
+	rep stosq
+	repz cmpsq
+	repz scasq
+
+	addr32 rep insb
+	addr32 rep outsb
+	addr32 rep movsb
+	addr32 rep lodsb
+	addr32 rep stosb
+	addr32 repz cmpsb
+	addr32 repz scasb
+
+	addr32 rep insw
+	addr32 rep outsw
+	addr32 rep movsw
+	addr32 rep lodsw
+	addr32 rep stosw
+	addr32 repz cmpsw
+	addr32 repz scasw
+
+	addr32 rep insl
+	addr32 rep outsl
+	addr32 rep movsl
+	addr32 rep lodsl
+	addr32 rep stosl
+	addr32 repz cmpsl
+	addr32 repz scasl
+
+	addr32 rep movsq
+	addr32 rep lodsq
+	addr32 rep stosq
+	addr32 repz cmpsq
+	addr32 repz scasq
--- binutils/gas/testsuite/gas/i386/x86_64.d.rep	2005-07-11 14:08:22.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86_64.d	2006-03-07 11:05:18.000000000 -0800
@@ -37,9 +37,9 @@ Disassembly of section .text:
 [ 	]+56:	41 0f 20 c0[ 	]+mov[ 	]+%cr0,%r8
 [ 	]+5a:	44 0f 20 c0[ 	]+mov[ 	]+%cr8,%rax
 [ 	]+5e:	44 0f 22 c0[ 	]+mov[ 	]+%rax,%cr8
-[ 	]+62:	f3 48 a5[ 	]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
-[ 	]+65:	f3 66 a5[ 	]+repz movsw %ds:\(%rsi\),%es:\(%rdi\)
-[ 	]+68:	f3 48 a5[ 	]+repz movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ 	]+62:	f3 48 a5[ 	]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
+[ 	]+65:	f3 66 a5[ 	]+rep movsw %ds:\(%rsi\),%es:\(%rdi\)
+[ 	]+68:	f3 48 a5[ 	]+rep movsq %ds:\(%rsi\),%es:\(%rdi\)
 [ 	]+6b:	b0 11[ 	]+mov[ 	]+\$0x11,%al
 [ 	]+6d:	b4 11[ 	]+mov[ 	]+\$0x11,%ah
 [ 	]+6f:	40 b4 11[ 	]+mov[ 	]+\$0x11,%spl
--- binutils/opcodes/i386-dis.c.rep	2006-02-27 15:50:52.000000000 -0800
+++ binutils/opcodes/i386-dis.c	2006-03-07 11:58:26.000000000 -0800
@@ -101,6 +101,7 @@ static void INVLPG_Fixup (int, int);
 static void BadOp (void);
 static void SEG_Fixup (int, int);
 static void VMX_Fixup (int, int);
+static void REP_Fixup (int, int);
 
 struct dis_private {
   /* Points to first byte not fetched.  */
@@ -276,7 +277,6 @@ fetch_data (struct disassemble_info *inf
 #define eSI OP_IMREG, eSI_reg
 #define eDI OP_IMREG, eDI_reg
 #define AL OP_IMREG, al_reg
-#define AL OP_IMREG, al_reg
 #define CL OP_IMREG, cl_reg
 #define DL OP_IMREG, dl_reg
 #define BL OP_IMREG, bl_reg
@@ -315,6 +315,15 @@ fetch_data (struct disassemble_info *inf
 #define OPSUF OP_3DNowSuffix, 0
 #define OPSIMD OP_SIMD_Suffix, 0
 
+/* Used handle "rep" prefix for string instructions.  */
+#define Xbr REP_Fixup, eSI_reg
+#define Xvr REP_Fixup, eSI_reg
+#define Ybr REP_Fixup, eDI_reg
+#define Yvr REP_Fixup, eDI_reg
+#define indirDXr REP_Fixup, indir_dx_reg
+#define ALr REP_Fixup, al_reg
+#define eAXr REP_Fixup, eAX_reg
+
 #define cond_jump_flag NULL, cond_jump_mode
 #define loop_jcxz_flag NULL, loop_jcxz_mode
 
@@ -629,10 +638,10 @@ static const struct dis386 dis386[] = {
   { "imulS",		Gv, Ev, Iv },
   { "pushT",		sIb, XX, XX },
   { "imulS",		Gv, Ev, sIb },
-  { "ins{b||b|}",	Yb, indirDX, XX },
-  { "ins{R||R|}",	Yv, indirDX, XX },
-  { "outs{b||b|}",	indirDX, Xb, XX },
-  { "outs{R||R|}",	indirDX, Xv, XX },
+  { "ins{b||b|}",	Ybr, indirDX, XX },
+  { "ins{R||R|}",	Yvr, indirDX, XX },
+  { "outs{b||b|}",	indirDXr, Xb, XX },
+  { "outs{R||R|}",	indirDXr, Xv, XX },
   /* 70 */
   { "joH",		Jb, XX, cond_jump_flag },
   { "jnoH",		Jb, XX, cond_jump_flag },
@@ -692,17 +701,17 @@ static const struct dis386 dis386[] = {
   { "movS",		eAX, Ov, XX },
   { "movB",		Ob, AL, XX },
   { "movS",		Ov, eAX, XX },
-  { "movs{b||b|}",	Yb, Xb, XX },
-  { "movs{R||R|}",	Yv, Xv, XX },
+  { "movs{b||b|}",	Ybr, Xb, XX },
+  { "movs{R||R|}",	Yvr, Xv, XX },
   { "cmps{b||b|}",	Xb, Yb, XX },
   { "cmps{R||R|}",	Xv, Yv, XX },
   /* a8 */
   { "testB",		AL, Ib, XX },
   { "testS",		eAX, Iv, XX },
-  { "stosB",		Yb, AL, XX },
-  { "stosS",		Yv, eAX, XX },
-  { "lodsB",		AL, Xb, XX },
-  { "lodsS",		eAX, Xv, XX },
+  { "stosB",		Ybr, AL, XX },
+  { "stosS",		Yvr, eAX, XX },
+  { "lodsB",		ALr, Xb, XX },
+  { "lodsS",		eAXr, Xv, XX },
   { "scasB",		AL, Yb, XX },
   { "scasS",		eAX, Yv, XX },
   /* b0 */
@@ -4777,3 +4786,76 @@ OP_VMX (int bytemode, int sizeflag)
     strcpy (obuf, "vmptrld");
   OP_E (bytemode, sizeflag);
 }
+
+static void
+REP_Fixup (int bytemode, int sizeflag)
+{
+  /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
+     lods and stos.  */
+  size_t ilen = 0;
+
+  if (prefixes & PREFIX_REPZ)
+    switch (*insn_codep) 
+      {
+      case 0x6e:	/* outsb */
+      case 0x6f:	/* outsw/outsl */
+      case 0xa4:	/* movsb */
+      case 0xa5:	/* movsw/movsl/movsq */
+	if (!intel_syntax)
+	  ilen = 5;
+	else
+	  ilen = 4;
+	break;
+      case 0xaa:	/* stosb */
+      case 0xab:	/* stosw/stosl/stosq */
+      case 0xac:	/* lodsb */
+      case 0xad:	/* lodsw/lodsl/lodsq */
+	if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
+	  ilen = 5;
+	else
+	  ilen = 4;
+	break;
+      case 0x6c:	/* insb */
+      case 0x6d:	/* insl/insw */
+	if (!intel_syntax)
+	  ilen = 4;
+	else
+	  ilen = 3;
+	break;
+      default:
+	abort ();
+	break;
+      }
+
+  if (ilen != 0)
+    {
+      size_t olen;
+      char *p;
+
+      olen = strlen (obuf);
+      p = obuf + olen - ilen - 1 - 4;
+      /* Handle "repz [addr16|addr32]".  */
+      if ((prefixes & PREFIX_ADDR))
+	p -= 1 + 6;
+
+      memmove (p + 3, p + 4, olen - (p + 3 - obuf));
+    }
+
+  switch (bytemode)
+    {
+    case al_reg:
+    case eAX_reg:
+    case indir_dx_reg:
+      OP_IMREG (bytemode, sizeflag);
+      break;
+    case eDI_reg:
+      OP_ESreg (bytemode, sizeflag);
+      break;
+    case eSI_reg:
+      OP_DSreg (bytemode, sizeflag);
+      break;
+    default:
+      abort ();
+      break;
+    }
+}


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