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[PATCH] Add initial POWER6 support


Hi,

The following patch adds some initial POWER6 support so that we
recognize the -mpower6 option.  This support will be expanded
as IBM releases more POWER6 technical details.  However, we need
this minimal initial support so we can work on getting GLIBC POWER6
cpu tuned library support added.

Peter

--
Peter Bergner
Linux on Power Toolchain
IBM Linux Technology Center


gas/
2006-06-06  Ben Elliston  <bje@au.ibm.com>
	    Anton Blanchard  <anton@samba.org>

	* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
	(md_show_usage): Document it.
	(ppc_setup_opcodes): Test power6 opcode flag bits.
	* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".

include/opcode/
2006-06-06  Ben Elliston  <bje@au.ibm.com>
	    Anton Blanchard  <anton@samba.org>

	* ppc.h (PPC_OPCODE_POWER6): Define.
	Adjust whitespace.

opcodes/
2006-06-06  Ben Elliston  <bje@au.ibm.com>
	    Anton Blanchard  <anton@samba.org>
	    Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-dis.c (powerpc_dialect): Handle power6 option.
	(print_ppc_disassembler_options): Mention power6.



Index: gas/config/tc-ppc.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-ppc.c,v
retrieving revision 1.110
diff -u -p -r1.110 tc-ppc.c
--- gas/config/tc-ppc.c	19 May 2006 11:26:11 -0000	1.110
+++ gas/config/tc-ppc.c	6 Jun 2006 15:51:49 -0000
@@ -917,6 +917,12 @@ parse_cpu (const char *arg)
 		 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
 		 | PPC_OPCODE_POWER5);
     }
+  else if (strcmp (arg, "power6") == 0)
+    {
+      ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
+		 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+		 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
+    }
   /* -mcom means assemble for the common intersection between Power
      and PowerPC.  At present, we just allow the union, rather
      than the intersection.  */
@@ -1112,6 +1118,7 @@ PowerPC options:\n\
 -mbooke, mbooke32	generate code for 32-bit PowerPC BookE\n\
 -mpower4		generate code for Power4 architecture\n\
 -mpower5		generate code for Power5 architecture\n\
+-mpower6		generate code for Power6 architecture\n\
 -mcom			generate code Power/PowerPC common instructions\n\
 -many			generate code for any architecture (PWR/PWRX/PPC)\n"));
   fprintf (stream, _("\
@@ -1270,7 +1277,10 @@ ppc_setup_opcodes (void)
 		  == (ppc_cpu & PPC_OPCODE_POWER4)))
 	  && ((op->flags & PPC_OPCODE_POWER5) == 0
 	      || ((op->flags & PPC_OPCODE_POWER5)
-		  == (ppc_cpu & PPC_OPCODE_POWER5))))
+		  == (ppc_cpu & PPC_OPCODE_POWER5)))
+	  && ((op->flags & PPC_OPCODE_POWER6) == 0
+	      || ((op->flags & PPC_OPCODE_POWER6)
+		  == (ppc_cpu & PPC_OPCODE_POWER6))))
 	{
 	  const char *retval;
 
Index: gas/doc/c-ppc.texi
===================================================================
RCS file: /cvs/src/src/gas/doc/c-ppc.texi,v
retrieving revision 1.7
diff -u -p -r1.7 c-ppc.texi
--- gas/doc/c-ppc.texi	15 Aug 2005 15:37:15 -0000	1.7
+++ gas/doc/c-ppc.texi	6 Jun 2006 15:51:49 -0000
@@ -79,6 +79,9 @@ Generate code for Power4 architecture.
 @item -mpower5
 Generate code for Power5 architecture.
 
+@item -mpower6
+Generate code for Power6 architecture.
+
 @item -mcom
 Generate code Power/PowerPC common instructions.
 
Index: include/opcode/ppc.h
===================================================================
RCS file: /cvs/src/src/include/opcode/ppc.h,v
retrieving revision 1.21
diff -u -p -r1.21 ppc.h
--- include/opcode/ppc.h	15 Aug 2005 15:37:15 -0000	1.21
+++ include/opcode/ppc.h	6 Jun 2006 15:51:50 -0000
@@ -135,10 +135,14 @@ extern const int powerpc_num_opcodes;
 #define PPC_OPCODE_RFMCI	  0x800000
 
 /* Opcode is only supported by Power5 architecture.  */
-#define PPC_OPCODE_POWER5	    0x1000000
+#define PPC_OPCODE_POWER5	 0x1000000
 
 /* Opcode is supported by PowerPC e300 family.  */
-#define PPC_OPCODE_E300           0x2000000
+#define PPC_OPCODE_E300          0x2000000
+
+/* Opcode is only supported by Power6 architecture.  */
+#define PPC_OPCODE_POWER6	 0x4000000
+
 
 /* A macro to extract the major opcode from an instruction.  */
 #define PPC_OP(i) (((i) >> 26) & 0x3f)
Index: opcodes/ppc-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/ppc-dis.c,v
retrieving revision 1.22
diff -u -p -r1.22 ppc-dis.c
--- opcodes/ppc-dis.c	6 Oct 2005 19:21:14 -0000	1.22
+++ opcodes/ppc-dis.c	6 Jun 2006 15:51:50 -0000
@@ -74,6 +74,10 @@ powerpc_dialect (struct disassemble_info
     dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
 
   if (info->disassembler_options
+      && strstr (info->disassembler_options, "power6") != NULL)
+    dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
+
+  if (info->disassembler_options
       && strstr (info->disassembler_options, "any") != NULL)
     dialect |= PPC_OPCODE_ANY;
 
@@ -306,6 +314,7 @@ the -M switch:\n");
   fprintf (stream, "  efs                      Disassemble the EFS instructions\n");
   fprintf (stream, "  power4                   Disassemble the Power4 instructions\n");
   fprintf (stream, "  power5                   Disassemble the Power5 instructions\n");
+  fprintf (stream, "  power6                   Disassemble the Power6 instructions\n");
   fprintf (stream, "  32                       Do not disassemble 64-bit instructions\n");
   fprintf (stream, "  64                       Allow disassembly of 64-bit instructions\n");
 }

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