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PATCH: Fix x86 4 operand instruction handling
- From: "H. J. Lu" <hjl at lucon dot org>
- To: binutils at sources dot redhat dot com
- Cc: michael dot meissner at amd dot com, dwarak dot rajagopal at amd dot com
- Date: Thu, 28 Dec 2006 14:39:40 -0800
- Subject: PATCH: Fix x86 4 operand instruction handling
The current code has
if ((i.operands == 4)&&(i.imm_operands=2)) source++;
^^^^^^^^^^^^^^^^^
It is wrong. I am checking in this patch.
H.J.
---
2006-12-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Fix 4 operand instruction
handling.
--- config/tc-i386.c.imm 2006-12-28 14:22:14.000000000 -0800
+++ config/tc-i386.c 2006-12-28 14:32:30.000000000 -0800
@@ -3433,17 +3433,24 @@ build_modrm_byte ()
| Control | Debug | Test))
? 0 : 1);
- /* In 4 operands instructions with 2 immediate operands, the first
- two are immediate bytes and hence source operand will be in the
- next byte after the immediates */
switch (i.operands)
{
case 2:
case 3:
break;
+ case 4:
+ /* When there are 4 operands, the first two must be immediate
+ operands. The source operand will be the 3rd one. */
+ if (i.imm_operands != 2
+ || (i.types[0] & Imm) == 0
+ || (i.types[1] & Imm) == 0)
+ abort ();
+ source = 2;
+ break;
+ default:
+ abort ();
}
- if ((i.operands == 4)&&(i.imm_operands=2)) source++;
dest = source + 1;
i.rm.mode = 3;