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Re: [PATCH, ARM] Fix encoding for VSHL/VQSHL by register
- From: Nick Clifton <nickc at redhat dot com>
- To: Julian Brown <julian at codesourcery dot com>
- Cc: binutils at sources dot redhat dot com, Richard Earnshaw <Richard dot Earnshaw at arm dot com>, Paul Brook <paul at codesourcery dot com>
- Date: Thu, 04 Jan 2007 04:02:23 +0000
- Subject: Re: [PATCH, ARM] Fix encoding for VSHL/VQSHL by register
- References: <459BE2D8.8080402@codesourcery.com>
Hi Julian,
gas/
* config/tc-arm.c (do_neon_shl_imm): Swap rN, rM.
(do_neon_qshl_imm): Likewise.
(do_neon_rshl): New function. Handle rounding variants of
v{q}shl-by-register.
(insns): Use do_neon_rshl for vrshl, vqrshl.
gas/testsuite/
* gas/arm/neon-omit.d: Fix expected encodings for vshl, vqshl.
opcodes/
* arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
vqrshl instructions.
Approved - please apply.
+ {
+ enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL);
+ struct neon_type_el et = neon_check_type (3, rs,
+ N_EQK, N_EQK, N_SU_ALL | N_KEY);
+ unsigned int tmp;
+ tmp = inst.operands[2].reg;
+ inst.operands[2].reg = inst.operands[1].reg;
+ inst.operands[1].reg = tmp;
+ neon_three_same (neon_quad (rs), et.type == NT_unsigned, et.size);
> + }
Note - stylistically it is good to have a blank line between the end of
the declaration of the variables and the start of the code in a block, ie:
> + {
> + enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL);
> + struct neon_type_el et = neon_check_type (3, rs,
> + N_EQK, N_EQK, N_SU_ALL | N_KEY);
> + unsigned int tmp;
> +
> + tmp = inst.operands[2].reg;
> + inst.operands[2].reg = inst.operands[1].reg;
> + inst.operands[1].reg = tmp;
> + neon_three_same (neon_quad (rs), et.type == NT_unsigned, et.size);
> + }
Cheers
Nick