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PATCH: Update doc/c-i386.texi


doc/c-i386.texi has

   * AT&T and Intel syntax use the opposite order for source and
     destination operands.  Intel `add eax, 4' is `addl $4, %eax'.  The
     `source, dest' convention is maintained for compatibility with
     previous Unix assemblers.  Note that instructions with more than
     one source operand, such as the `enter' instruction, do _not_ have
     reversed order.  *Note i386-Bugs::.

But the code does

  /* All intel opcodes have reversed operands except for "bound" and
     "enter".  We also don't reverse intersegment "jmp" and "call"
     instructions with 2 immediate operands so that the immediate segment
     precedes the offset, as it does when in AT&T mode. */
  if (intel_syntax
      && i.operands > 1
      && (strcmp (mnemonic, "bound") != 0)
      && (strcmp (mnemonic, "invlpga") != 0)
      && !(operand_type_check (i.types[0], imm)
	   && operand_type_check (i.types[1], imm)))
    swap_operands ();

I am checking in this patch to make doc/c-i386.texi to match what
the assembler really does.


H.J.
----
2007-10-11  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Update which instruction's operands are
	swapped.

--- doc/c-i386.texi.swap	2007-04-18 15:01:29.000000000 -0700
+++ doc/c-i386.texi	2007-10-11 06:59:32.000000000 -0700
@@ -178,9 +178,9 @@ operands are prefixed by @samp{*}; they 
 AT&T and Intel syntax use the opposite order for source and destination
 operands.  Intel @samp{add eax, 4} is @samp{addl $4, %eax}.  The
 @samp{source, dest} convention is maintained for compatibility with
-previous Unix assemblers.  Note that instructions with more than one
-source operand, such as the @samp{enter} instruction, do @emph{not} have
-reversed order.  @ref{i386-Bugs}.
+previous Unix assemblers.  Note that @samp{bound}, @samp{invlpga}, and
+instructions with 2 immediate operands, such as the @samp{enter}
+instruction, do @emph{not} have reversed order.  @ref{i386-Bugs}.
 
 @cindex mnemonic suffixes, i386
 @cindex sizes operands, i386


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