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fix coldfire %sr & %ccr moves


I've applied this obvious patch to fix disassembling constant moves to the %sr and %ccr registers. The opcode mask was not correctly set for the register source operand case, and so we'd disassemble constant moves as moves from register d4 followed by a random instruction.

nathan
--
Nathan Sidwell    ::   http://www.codesourcery.com   ::         CodeSourcery

2007-10-17  Nathan Sidwell  <nathan@codesourcery.com>

	opcodes/
	* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
	coldfire.

	gas/testsuite/
	* gas/m68k/mcf-movsr.s: New.
	* gas/m68k/mcf-movsr.d: New.
	* gas/m68k/all.exp: Add mcf-movsr test.

Index: opcodes/m68k-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/m68k-opc.c,v
retrieving revision 1.27
diff -c -3 -p -r1.27 m68k-opc.c
*** opcodes/m68k-opc.c	5 Jul 2007 09:49:02 -0000	1.27
--- opcodes/m68k-opc.c	17 Oct 2007 13:42:57 -0000
*************** const struct m68k_opcode m68k_opcodes[] 
*** 1593,1602 ****
  {"movew", 2,	one(0041300),	one(0177700), "Cs$s", m68010up },
  {"movew", 2,	one(0041300),	one(0177770), "CsDs", mcfisa_a },
  {"movew", 2,	one(0042300),	one(0177700), ";wCd", m68000up },
! {"movew", 2,	one(0042300),	one(0177700), "DsCd", mcfisa_a },
  {"movew", 4,	one(0042374),	one(0177777), "#wCd", mcfisa_a },
  {"movew", 2,	one(0043300),	one(0177700), ";wSd", m68000up },
! {"movew", 2,	one(0043300),	one(0177700), "DsSd", mcfisa_a },
  {"movew", 4,	one(0043374),	one(0177777), "#wSd", mcfisa_a },
  
  {"movel", 2,	one(0070000),	one(0170400), "MsDd", m68000up | mcfisa_a },
--- 1593,1602 ----
  {"movew", 2,	one(0041300),	one(0177700), "Cs$s", m68010up },
  {"movew", 2,	one(0041300),	one(0177770), "CsDs", mcfisa_a },
  {"movew", 2,	one(0042300),	one(0177700), ";wCd", m68000up },
! {"movew", 2,	one(0042300),	one(0177770), "DsCd", mcfisa_a },
  {"movew", 4,	one(0042374),	one(0177777), "#wCd", mcfisa_a },
  {"movew", 2,	one(0043300),	one(0177700), ";wSd", m68000up },
! {"movew", 2,	one(0043300),	one(0177770), "DsSd", mcfisa_a },
  {"movew", 4,	one(0043374),	one(0177777), "#wSd", mcfisa_a },
  
  {"movel", 2,	one(0070000),	one(0170400), "MsDd", m68000up | mcfisa_a },
Index: gas/testsuite/gas/m68k/all.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68k/all.exp,v
retrieving revision 1.17
diff -c -3 -p -r1.17 all.exp
*** gas/testsuite/gas/m68k/all.exp	3 Jul 2007 07:54:19 -0000	1.17
--- gas/testsuite/gas/m68k/all.exp	17 Oct 2007 13:42:57 -0000
*************** if { [istarget m68*-*-*] || [istarget fi
*** 49,54 ****
--- 49,55 ----
      }
  
      run_dump_test mcf-mov3q
+     run_dump_test mcf-movsr
      run_dump_test mode5
      run_dump_test mcf-mac
      run_dump_test mcf-emac
Index: gas/testsuite/gas/m68k/mcf-movsr.d
===================================================================
RCS file: gas/testsuite/gas/m68k/mcf-movsr.d
diff -N gas/testsuite/gas/m68k/mcf-movsr.d
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/m68k/mcf-movsr.d	17 Oct 2007 13:42:57 -0000
***************
*** 0 ****
--- 1,15 ----
+ #name: mcf-movsr
+ #objdump: -d
+ #as: -mcpu=5329
+ 
+ .*:     file format .*
+ 
+ Disassembly of section .text:
+ 
+ 0+ <test_movsr>:
+    0:	46c3           	movew %d3,%sr
+    2:	46fc ffff      	movew #-1,%sr
+    6:	40c3           	movew %sr,%d3
+    8:	44c3           	movew %d3,%ccr
+    a:	44fc ffff      	movew #-1,%ccr
+    e:	42c3           	movew %ccr,%d3
Index: gas/testsuite/gas/m68k/mcf-movsr.s
===================================================================
RCS file: gas/testsuite/gas/m68k/mcf-movsr.s
diff -N gas/testsuite/gas/m68k/mcf-movsr.s
*** /dev/null	1 Jan 1970 00:00:00 -0000
--- gas/testsuite/gas/m68k/mcf-movsr.s	17 Oct 2007 13:42:57 -0000
***************
*** 0 ****
--- 1,13 ----
+ .text
+ |*****************************************************************
+ | Test all permutations of movew sr and movew ccr
+ |*****************************************************************
+ 	.global test_movsr
+ test_movsr:
+ 	move.w	%d3,%sr			| Mode 0
+ 	move.w	#-1,%sr			| Mode 7.4
+ 	move.w	%sr,%d3			| Mode 0
+ 
+ 	move.w	%d3,%ccr		| Mode 0
+ 	move.w	#-1,%ccr		| Mode 7.4
+ 	move.w	%ccr,%d3		| Mode 0

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