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PR9743 / ARM: long branch stubs to PLT
- From: Christophe LYON <christophe dot lyon at st dot com>
- To: Binutils <binutils at sourceware dot org>
- Date: Thu, 05 Feb 2009 17:28:22 +0100
- Subject: PR9743 / ARM: long branch stubs to PLT
Hello,
I propose the attached patch to fix PR9743. In summary, long branch
stubs were not inserted if the target was a PLT entry. In addition to
adding support for these, I:
- took this opportunity to improve some comments and rename the stubs in
a hopefully more consistent way.
- fixed a stub in thumb only mode (elf32_arm_stub_long_branch_thumb_only).
- I hope I got all the stubs right this time :-)
- I removed some interworking warnings because I don't feel very
confortable with them. More skilled people are welcome to explain me if
I got it wrong.
- I added a few new tests for the new stubs, and updated a few old ones.
- validated on arm-none-eabi, arm-linux-gnueabi, arm-elf.
- I also checked that GCC's cc1-dummy now links in the configuration of
the original bug report - and "cc1-dummy --help" correctly displays the
help message.
Christophe.
2009-02-04 Christophe Lyon <christophe.lyon@st.com>
PR 9743
* elf32-arm.c (arm_long_branch_stub,
arm_thumb_v4t_long_branch_stub,
arm_thumb_thumb_long_branch_stub,
arm_thumb_arm_v4t_long_branch_stub,
arm_thumb_arm_v4t_short_branch_stub,
arm_pic_long_branch_stub):
Renamed to elf32_arm_stub_long_branch_any_any,
elf32_arm_stub_long_branch_v4t_arm_thumb,
elf32_arm_stub_long_branch_thumb_only,
elf32_arm_stub_long_branch_v4t_thumb_arm,
elf32_arm_stub_short_branch_v4t_thumb_arm,
elf32_arm_stub_long_branch_any_any_pic.
(elf32_arm_stub_long_branch_v4t_arm_thumb_pic,
elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
elf32_arm_stub_long_branch_thumb_only_pic): Define new stubs.
(arm_stub_long_branch, arm_thumb_v4t_stub_long_branch,
arm_thumb_thumb_stub_long_branch,
arm_thumb_arm_v4t_stub_long_branch,
arm_thumb_arm_v4t_stub_short_branch, arm_stub_pic_long_branch):
Renamed to arm_stub_long_branch_any_any,
arm_stub_long_branch_v4t_arm_thumb,
arm_stub_long_branch_thumb_only,
arm_stub_long_branch_v4t_thumb_arm,
arm_stub_short_branch_v4t_thumb_arm,
arm_stub_long_branch_any_any_pic.
(arm_stub_long_branch_v4t_arm_thumb_pic,
arm_stub_long_branch_v4t_thumb_arm_pic,
arm_stub_long_branch_thumb_only_pic): Define.
(elf32_arm_stub_long_branch_thumb_only): Fixed stub code.
(arm_stub_is_thumb): Handle new cases.
(arm_type_of_stub): Handle R_ARM_THM_JUMP24, R_ARM_JUMP24,
R_ARM_PLT32 relocations and calls through PLT.
(arm_build_one_stub): Handle new stubs. Fix handling of
arm_stub_long_branch_any_any_pic.
(elf32_arm_size_stubs): Handle R_ARM_THM_JUMP24, R_ARM_JUMP24,
R_ARM_PLT32 relocations. Use new arm_type_of_stub prototype.
(record_thumb_to_arm_glue): Remove now unused function.
(bfd_elf32_arm_process_before_allocation): Stop handling
R_ARM_THM_JUMP24, R_ARM_JUMP24, R_ARM_PLT32 relocations.
(elf32_arm_final_link_relocate): Handle calls through PLT too far away.
(arm_map_one_stub): Added missing Thumb map symbol in
arm_stub_short_branch_v4t_thumb_arm stub. Handle new stubs.
2009-02-04 Christophe Lyon <christophe.lyon@st.com>
PR 9743
* ld-arm/arm-elf.exp (thumb2-bl-as-thumb1-bad-noeabi,
thumb2-bl-bad-noeabi): Removed tests on non-EABI
targets. (farcall-thumb-thumb, farcall-thumb-thumb-pic-veneer,
farcall-thumb-thumb-m-pic-veneer, farcall-thumb-arm-pic-veneer):
Updated as they now pass. (farcall-arm-thumb-blx-pic-veneer):
Fixed. (farcall-armthumb-lib.so, farcall-mixed-app,
farcall-mixed-lib.so, farcall-mixed-app-v5): New tests.
* ld-arm/arm-call.d: Updated to expect new stub.
* ld-arm/arm-pic-veneer.d: Likewise.
* ld-arm/arm-pic-veneer.s: Fixed formatting.
* ld-arm/farcall-arm-arm-pic-veneer.d: Fixed.
* ld-arm/farcall-arm-dyn.ld: New file.
* ld-arm/farcall-arm-lib.ld: New file.
* ld-arm/farcall-arm-thumb-blx-pic-veneer.d: Fixed.
* ld-arm/farcall-arm-thumb-pic-veneer.d: Fixed.
* ld-arm/farcall-armthumb-lib.d: New file.
* ld-arm/farcall-armthumb-lib.sym: New file.
* ld-arm/farcall-mixed-app-v5.d: New file.
* ld-arm/farcall-mixed-app.d: New file.
* ld-arm/farcall-mixed-app.r: New file.
* ld-arm/farcall-mixed-app.s: New file.
* ld-arm/farcall-mixed-app.sym: New file.
* ld-arm/farcall-mixed-lib.d: New file.
* ld-arm/farcall-mixed-lib.r: New file.
* ld-arm/farcall-mixed-lib.s: New file.
* ld-arm/farcall-mixed-lib.sym: New file.
* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Fixed.
* ld-arm/farcall-thumb-arm-pic-veneer.d: Updated to expect new stub.
* ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Fixed.
* ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Updated to expect new stub.
* ld-arm/farcall-thumb-thumb-m.d: Fixed.
* ld-arm/farcall-thumb-thumb-pic-veneer.d: Updated to expect new stub.
* ld-arm/farcall-thumb-thumb.d: Updated to expect new stub.
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./bfd/elf32-arm.c ../../binutils-cvs-ref/src/bfd/elf32-arm.c
2013,2015c2013
< /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
< to reach the stub if necessary. */
< static const bfd_vma elf32_arm_stub_long_branch_any_any[] =
---
> static const bfd_vma arm_long_branch_stub[] =
2021,2023c2019
< /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
< available. */
< static const bfd_vma elf32_arm_stub_long_branch_v4t_arm_thumb[] =
---
> static const bfd_vma arm_thumb_v4t_long_branch_stub[] =
2030,2033c2026
< /* Thumb -> Thumb long branch stub. Used on architectures which
< support only this mode, or on V4T where it is expensive to switch
< to ARM. */
< static const bfd_vma elf32_arm_stub_long_branch_thumb_only[] =
---
> static const bfd_vma arm_thumb_thumb_long_branch_stub[] =
2037,2038c2030,2031
< 0x46b746fe, /* mov lr, pc */
< /* mov pc, r6 */
---
> 0x473046fe, /* mov lr, pc */
> /* bx r6 */
2044,2046c2037
< /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
< available. */
< static const bfd_vma elf32_arm_stub_long_branch_v4t_thumb_arm[] =
---
> static const bfd_vma arm_thumb_arm_v4t_long_branch_stub[] =
2057,2059c2048
< /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
< one, when the destination is close enough. */
< static const bfd_vma elf32_arm_stub_short_branch_v4t_thumb_arm[] =
---
> static const bfd_vma arm_thumb_arm_v4t_short_branch_stub[] =
2066,2068c2055
< /* ARM/Thumb -> ARM/Thumb long branch stub, PIC. On V5T and above, use
< blx to reach the stub if necessary. */
< static const bfd_vma elf32_arm_stub_long_branch_any_any_pic[] =
---
> static const bfd_vma arm_pic_long_branch_stub[] =
2075,2109d2061
< /* V4T ARM -> ARM long branch stub, PIC. */
< static const bfd_vma elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
< {
< 0xe59fc004, /* ldr r12, [pc, #4] */
< 0xe08cc00f, /* add r12, r12, pc */
< 0xe12fff1c, /* bx r12 */
< 0x00000000, /* dcd R_ARM_REL32(X) */
< };
<
< /* V4T Thumb -> ARM long branch stub, PIC. */
< static const bfd_vma elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
< {
< 0x46c04778, /* bx pc */
< /* nop */
< 0xe59fc004, /* ldr r12, [pc, #4] */
< 0xe08cc00f, /* add r12, r12, pc */
< 0xe1a0f00c, /* mov pc, r12 */
< 0x00000000, /* dcd R_ARM_REL32(X) */
< };
<
< /* Thumb -> Thumb long branch stub, PIC. Used on architectures which
< support only this mode, or on V4T where it is expensive to switch
< to ARM. */
< static const bfd_vma elf32_arm_stub_long_branch_thumb_only_pic[] =
< {
< 0x4e02b540, /* push {r6, lr} */
< /* ldr r6, [pc, #8] */
< 0x44b746fe, /* mov lr, pc */
< /* add pc, r6 */
< 0xbf00bd40, /* pop {r6, pc} */
< /* nop */
< 0x00000000, /* dcd R_ARM_REL32(X) */
< };
<
<
2117,2125c2069,2074
< arm_stub_long_branch_any_any,
< arm_stub_long_branch_v4t_arm_thumb,
< arm_stub_long_branch_thumb_only,
< arm_stub_long_branch_v4t_thumb_arm,
< arm_stub_short_branch_v4t_thumb_arm,
< arm_stub_long_branch_any_any_pic,
< arm_stub_long_branch_v4t_arm_thumb_pic,
< arm_stub_long_branch_v4t_thumb_arm_pic,
< arm_stub_long_branch_thumb_only_pic,
---
> arm_stub_long_branch,
> arm_thumb_v4t_stub_long_branch,
> arm_thumb_thumb_stub_long_branch,
> arm_thumb_arm_v4t_stub_long_branch,
> arm_thumb_arm_v4t_stub_short_branch,
> arm_stub_pic_long_branch,
2785,2789c2734,2736
< case arm_stub_long_branch_thumb_only:
< case arm_stub_long_branch_v4t_thumb_arm:
< case arm_stub_short_branch_v4t_thumb_arm:
< case arm_stub_long_branch_v4t_thumb_arm_pic:
< case arm_stub_long_branch_thumb_only_pic:
---
> case arm_thumb_thumb_stub_long_branch:
> case arm_thumb_arm_v4t_stub_long_branch:
> case arm_thumb_arm_v4t_stub_short_branch:
2808c2755,2758
< bfd_vma destination)
---
> bfd_vma destination,
> asection *sym_sec,
> bfd *input_bfd,
> const char *name)
2817d2766
< int use_plt = 0;
2839c2788,2789
< /* Keep a simpler condition, for the sake of clarity. */
---
> /* If the call will go through a PLT entry then we do not need
> glue. */
2840a2791,2793
> return stub_type;
>
> if (r_type == R_ARM_THM_CALL)
2842,2859d2794
< use_plt = 1;
< /* Note when dealing with PLT entries: the main PLT stub is in
< ARM mode, so if we are in Thumb mode, another Thumb->ARM stub
< will be inserted just before the ARM PLT stub. We don't take
< this extra distance into account here, because if a long
< branch stub is needed, we'll add a Thumb->Arm one and branch
< directly to the ARM PLT entry because it avoids spreading
< offset corrections in several places. */
< }
<
< if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
< {
< /* Check cases where:
< - this call goes too far (different Thumb/Thumb2 distance)
< - it's a Thumb->Arm call and blx is not available. A stub is
< needed in this case, but only if this call is not through a
< PLT entry. Indeed, PLT stubs handle mode switching already.
< */
2866,2869c2801
< || ((st_type != STT_ARM_TFUNC)
< && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
< || (r_type == R_ARM_THM_JUMP24))
< && !use_plt))
---
> || ((st_type != STT_ARM_TFUNC) && !globals->use_blx))
2878,2882c2810,2814
< ? arm_stub_long_branch_any_any_pic
< : arm_stub_long_branch_thumb_only_pic)
< : ((globals->use_blx)
< ? arm_stub_long_branch_any_any
< : arm_stub_long_branch_thumb_only);
---
> ? arm_stub_pic_long_branch
> : arm_stub_none)
> : (globals->use_blx)
> ? arm_stub_long_branch
> : arm_stub_none;
2887,2888c2819,2822
< ? arm_stub_long_branch_thumb_only_pic
< : arm_stub_long_branch_thumb_only;
---
> ? arm_stub_none
> : (globals->use_blx)
> ? arm_thumb_thumb_stub_long_branch
> : arm_stub_none;
2893a2828,2837
> if (sym_sec != NULL
> && sym_sec->owner != NULL
> && !INTERWORK_FLAG (sym_sec->owner))
> {
> (*_bfd_error_handler)
> (_("%B(%s): warning: interworking not enabled.\n"
> " first occurrence: %B: Thumb call to ARM"),
> sym_sec->owner, input_bfd, name);
> }
>
2896,2900c2840,2844
< ? arm_stub_long_branch_any_any_pic
< : arm_stub_long_branch_v4t_thumb_arm_pic)
< : ((globals->use_blx)
< ? arm_stub_long_branch_any_any
< : arm_stub_long_branch_v4t_thumb_arm);
---
> ? arm_stub_pic_long_branch
> : arm_stub_none)
> : (globals->use_blx)
> ? arm_stub_long_branch
> : arm_thumb_arm_v4t_stub_long_branch;
2903c2847
< if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
---
> if ((stub_type == arm_thumb_arm_v4t_stub_long_branch)
2906c2850
< stub_type = arm_stub_short_branch_v4t_thumb_arm;
---
> stub_type = arm_thumb_arm_v4t_stub_short_branch;
2910c2854
< else if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
---
> else if (r_type == R_ARM_CALL)
2915a2860,2869
> if (sym_sec != NULL
> && sym_sec->owner != NULL
> && !INTERWORK_FLAG (sym_sec->owner))
> {
> (*_bfd_error_handler)
> (_("%B(%s): warning: interworking not enabled.\n"
> " first occurrence: %B: Thumb call to ARM"),
> sym_sec->owner, input_bfd, name);
> }
>
2920,2921c2874
< || ((r_type == R_ARM_CALL) && !globals->use_blx)
< || (r_type == R_ARM_JUMP24) || r_type == R_ARM_PLT32)
---
> || !globals->use_blx)
2924,2929c2877,2880
< ? ((globals->use_blx)
< ? arm_stub_long_branch_any_any_pic
< : arm_stub_long_branch_v4t_arm_thumb_pic)
< : ((globals->use_blx)
< ? arm_stub_long_branch_any_any
< : arm_stub_long_branch_v4t_arm_thumb);
---
> ? arm_stub_pic_long_branch
> : (globals->use_blx)
> ? arm_stub_long_branch
> : arm_thumb_v4t_stub_long_branch;
2939,2940c2890,2891
< ? arm_stub_long_branch_any_any_pic
< : arm_stub_long_branch_any_any;
---
> ? arm_stub_pic_long_branch
> : arm_stub_long_branch;
3160,3194c3111,3133
< case arm_stub_long_branch_any_any:
< template = elf32_arm_stub_long_branch_any_any;
< template_size = (sizeof (elf32_arm_stub_long_branch_any_any) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_arm_thumb:
< template = elf32_arm_stub_long_branch_v4t_arm_thumb;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_arm_thumb) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_thumb_only:
< template = elf32_arm_stub_long_branch_thumb_only;
< template_size = (sizeof (elf32_arm_stub_long_branch_thumb_only) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_thumb_arm:
< template = elf32_arm_stub_long_branch_v4t_thumb_arm;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_thumb_arm) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_short_branch_v4t_thumb_arm:
< template = elf32_arm_stub_short_branch_v4t_thumb_arm;
< template_size = (sizeof(elf32_arm_stub_short_branch_v4t_thumb_arm) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_any_any_pic:
< template = elf32_arm_stub_long_branch_any_any_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_any_any_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_arm_thumb_pic:
< template = elf32_arm_stub_long_branch_v4t_arm_thumb_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_arm_thumb_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_thumb_arm_pic:
< template = elf32_arm_stub_long_branch_v4t_thumb_arm_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_thumb_arm_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_thumb_only_pic:
< template = elf32_arm_stub_long_branch_thumb_only_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_thumb_only_pic) / sizeof (bfd_vma)) * 4;
---
> case arm_stub_long_branch:
> template = arm_long_branch_stub;
> template_size = (sizeof (arm_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_v4t_stub_long_branch:
> template = arm_thumb_v4t_long_branch_stub;
> template_size = (sizeof (arm_thumb_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_thumb_stub_long_branch:
> template = arm_thumb_thumb_long_branch_stub;
> template_size = (sizeof (arm_thumb_thumb_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_arm_v4t_stub_long_branch:
> template = arm_thumb_arm_v4t_long_branch_stub;
> template_size = (sizeof (arm_thumb_arm_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_arm_v4t_stub_short_branch:
> template = arm_thumb_arm_v4t_short_branch_stub;
> template_size = (sizeof(arm_thumb_arm_v4t_short_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_stub_pic_long_branch:
> template = arm_pic_long_branch_stub;
> template_size = (sizeof (arm_pic_long_branch_stub) / sizeof (bfd_vma)) * 4;
3221c3160
< case arm_stub_long_branch_any_any:
---
> case arm_stub_long_branch:
3226c3165
< case arm_stub_long_branch_v4t_arm_thumb:
---
> case arm_thumb_v4t_stub_long_branch:
3231c3170
< case arm_stub_long_branch_thumb_only:
---
> case arm_thumb_thumb_stub_long_branch:
3236c3175
< case arm_stub_long_branch_v4t_thumb_arm:
---
> case arm_thumb_arm_v4t_stub_long_branch:
3241c3180
< case arm_stub_short_branch_v4t_thumb_arm:
---
> case arm_thumb_arm_v4t_stub_short_branch:
3254c3193
< case arm_stub_long_branch_any_any_pic:
---
> case arm_stub_pic_long_branch:
3259,3280c3198
< stub_entry->stub_offset + 8, sym_value, -4);
< break;
< case arm_stub_long_branch_v4t_arm_thumb_pic:
< /* We want the value relative to the address 12 bytes from the
< start of the stub. */
< _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_REL32),
< stub_bfd, stub_sec, stub_sec->contents,
< stub_entry->stub_offset + 12, sym_value, 0);
< break;
< case arm_stub_long_branch_v4t_thumb_arm_pic:
< /* We want the value relative to the address 16 bytes from the
< start of the stub. */
< _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_REL32),
< stub_bfd, stub_sec, stub_sec->contents,
< stub_entry->stub_offset + 16, sym_value, 0);
< break;
< case arm_stub_long_branch_thumb_only_pic:
< /* We want the value relative to the address 12 bytes from the
< start of the stub. */
< _bfd_final_link_relocate (elf32_arm_howto_from_type (R_ARM_REL32),
< stub_bfd, stub_sec, stub_sec->contents,
< stub_entry->stub_offset + 12, sym_value, 2);
---
> stub_entry->stub_offset + 8, sym_value, 0);
3283d3200
< BFD_FAIL ();
3310,3344c3227,3249
< case arm_stub_long_branch_any_any:
< template = elf32_arm_stub_long_branch_any_any;
< template_size = (sizeof (elf32_arm_stub_long_branch_any_any) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_arm_thumb:
< template = elf32_arm_stub_long_branch_v4t_arm_thumb;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_arm_thumb) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_thumb_only:
< template = elf32_arm_stub_long_branch_thumb_only;
< template_size = (sizeof (elf32_arm_stub_long_branch_thumb_only) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_thumb_arm:
< template = elf32_arm_stub_long_branch_v4t_thumb_arm;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_thumb_arm) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_short_branch_v4t_thumb_arm:
< template = elf32_arm_stub_short_branch_v4t_thumb_arm;
< template_size = (sizeof(elf32_arm_stub_short_branch_v4t_thumb_arm) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_any_any_pic:
< template = elf32_arm_stub_long_branch_any_any_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_any_any_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_arm_thumb_pic:
< template = elf32_arm_stub_long_branch_v4t_arm_thumb_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_arm_thumb_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_v4t_thumb_arm_pic:
< template = elf32_arm_stub_long_branch_v4t_thumb_arm_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_v4t_thumb_arm_pic) / sizeof (bfd_vma)) * 4;
< break;
< case arm_stub_long_branch_thumb_only_pic:
< template = elf32_arm_stub_long_branch_thumb_only_pic;
< template_size = (sizeof (elf32_arm_stub_long_branch_thumb_only_pic) / sizeof (bfd_vma)) * 4;
---
> case arm_stub_long_branch:
> template = arm_long_branch_stub;
> template_size = (sizeof (arm_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_v4t_stub_long_branch:
> template = arm_thumb_v4t_long_branch_stub;
> template_size = (sizeof (arm_thumb_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_thumb_stub_long_branch:
> template = arm_thumb_thumb_long_branch_stub;
> template_size = (sizeof (arm_thumb_thumb_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_arm_v4t_stub_long_branch:
> template = arm_thumb_arm_v4t_long_branch_stub;
> template_size = (sizeof (arm_thumb_arm_v4t_long_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_thumb_arm_v4t_stub_short_branch:
> template = arm_thumb_arm_v4t_short_branch_stub;
> template_size = (sizeof(arm_thumb_arm_v4t_short_branch_stub) / sizeof (bfd_vma)) * 4;
> break;
> case arm_stub_pic_long_branch:
> template = arm_pic_long_branch_stub;
> template_size = (sizeof (arm_pic_long_branch_stub) / sizeof (bfd_vma)) * 4;
3662c3567
< /* Only look for stubs on branch instructions. */
---
> /* Only look for stubs on call instructions. */
3664,3667c3569
< && (r_type != (unsigned int) R_ARM_THM_CALL)
< && (r_type != (unsigned int) R_ARM_JUMP24)
< && (r_type != (unsigned int) R_ARM_THM_JUMP24)
< && (r_type != (unsigned int) R_ARM_PLT32))
---
> && (r_type != (unsigned int) R_ARM_THM_CALL))
3751c3653,3654
< hash, destination);
---
> hash, destination, sym_sec,
> input_bfd, sym_name);
4138a4042,4121
> static void
> record_thumb_to_arm_glue (struct bfd_link_info *link_info,
> struct elf_link_hash_entry *h)
> {
> const char *name = h->root.root.string;
> asection *s;
> char *tmp_name;
> struct elf_link_hash_entry *myh;
> struct bfd_link_hash_entry *bh;
> struct elf32_arm_link_hash_table *hash_table;
> bfd_vma val;
>
> hash_table = elf32_arm_hash_table (link_info);
>
> BFD_ASSERT (hash_table != NULL);
> BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
>
> s = bfd_get_section_by_name
> (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
>
> BFD_ASSERT (s != NULL);
>
> tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
> + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
>
> BFD_ASSERT (tmp_name);
>
> sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
>
> myh = elf_link_hash_lookup
> (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
>
> if (myh != NULL)
> {
> /* We've already seen this guy. */
> free (tmp_name);
> return;
> }
>
> /* The only trick here is using hash_table->thumb_glue_size as the value.
> Even though the section isn't allocated yet, this is where we will be
> putting it. The +1 on the value marks that the stub has not been
> output yet - not that it is a Thumb function. */
> bh = NULL;
> val = hash_table->thumb_glue_size + 1;
> _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
> tmp_name, BSF_GLOBAL, s, val,
> NULL, TRUE, FALSE, &bh);
>
> /* If we mark it 'Thumb', the disassembler will do a better job. */
> myh = (struct elf_link_hash_entry *) bh;
> myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
> myh->forced_local = 1;
>
> free (tmp_name);
>
> #define CHANGE_TO_ARM "__%s_change_to_arm"
> #define BACK_FROM_ARM "__%s_back_from_arm"
>
> /* Allocate another symbol to mark where we switch to Arm mode. */
> tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
> + strlen (CHANGE_TO_ARM) + 1);
>
> BFD_ASSERT (tmp_name);
>
> sprintf (tmp_name, CHANGE_TO_ARM, name);
>
> bh = NULL;
> val = hash_table->thumb_glue_size + 4,
> _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
> tmp_name, BSF_LOCAL, s, val,
> NULL, TRUE, FALSE, &bh);
>
> free (tmp_name);
>
> s->size += THUMB2ARM_GLUE_SIZE;
> hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
> }
>
>
4513c4496,4499
< if (r_type != R_ARM_PC24
---
> if ( r_type != R_ARM_PC24
> && r_type != R_ARM_PLT32
> && r_type != R_ARM_JUMP24
> && r_type != R_ARM_THM_JUMP24
4564a4551,4552
> case R_ARM_PLT32:
> case R_ARM_JUMP24:
4568c4556,4557
< if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
---
> if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
> && !(r_type == R_ARM_CALL && globals->use_blx))
4571a4561,4570
> case R_ARM_THM_JUMP24:
> /* This one is a call from thumb code. We look
> up the target of the call. If it is not a thumb
> target, we insert glue. */
> if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
> && !(globals->use_blx && r_type == R_ARM_THM_CALL)
> && h->root.type != bfd_link_hash_undefweak)
> record_thumb_to_arm_glue (link_info, h);
> break;
>
5913,5914c5912
< branches in this object should go to it, except if the PLT is too
< far away, in which case a long branch stub should be inserted. */
---
> branches in this object should go to it. */
5916,5917c5914
< && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
< && r_type != R_ARM_CALL && r_type != R_ARM_JUMP24 && r_type != R_ARM_PLT32)
---
> && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
6073a6071,6075
> from = (input_section->output_section->vma
> + input_section->output_offset
> + rel->r_offset);
> branch_offset = (bfd_signed_vma)(value - from);
>
6085c6087
< else if (r_type != R_ARM_CALL && r_type != R_ARM_JUMP24 && r_type != R_ARM_PLT32)
---
> else if (r_type != R_ARM_CALL)
6103c6105
< if (r_type == R_ARM_CALL || r_type == R_ARM_JUMP24 || r_type == R_ARM_PLT32)
---
> if (r_type == R_ARM_CALL)
6105,6119d6106
< /* If the call goes through a PLT entry, make sure to
< use the right destination address. */
< if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
< {
< value = (splt->output_section->vma
< + splt->output_offset
< + h->plt.offset);
< *unresolved_reloc_p = FALSE;
< }
<
< from = (input_section->output_section->vma
< + input_section->output_offset
< + rel->r_offset);
< branch_offset = (bfd_signed_vma)(value - from);
<
6122,6126c6109
< || ((sym_flags == STT_ARM_TFUNC)
< && (((r_type == R_ARM_CALL) && !globals->use_blx)
< || (r_type == R_ARM_JUMP24)
< || (r_type == R_ARM_PLT32) ))
< )
---
> || sym_flags == STT_ARM_TFUNC)
6191a6175,6181
> if (sym_flags == STT_ARM_TFUNC)
> {
> if (addend)
> value |= (1 << 24);
> else
> value &= ~(bfd_vma)(1 << 24);
> }
6194,6201d6183
< if (sym_flags == STT_ARM_TFUNC)
< {
< if (addend)
< value |= (1 << 24);
< else
< value &= ~(bfd_vma)(1 << 24);
< }
<
6445c6427
< else if (r_type != R_ARM_THM_CALL && r_type != R_ARM_THM_JUMP24)
---
> else if (r_type != R_ARM_THM_CALL)
6482c6464
< if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
---
> if (r_type == R_ARM_THM_CALL)
6502,6504c6484
< || ((sym_flags != STT_ARM_TFUNC)
< && (((r_type == R_ARM_THM_CALL) && !globals->use_blx)
< || r_type == R_ARM_THM_JUMP24)))
---
> || ((sym_flags != STT_ARM_TFUNC) && !globals->use_blx))
6518c6498
< if (globals->use_blx && (r_type == R_ARM_THM_CALL))
---
> if (globals->use_blx)
11677c11657
< case arm_stub_long_branch_any_any:
---
> case arm_stub_long_branch:
11685c11665
< case arm_stub_long_branch_v4t_arm_thumb:
---
> case arm_thumb_v4t_stub_long_branch:
11693c11673
< case arm_stub_long_branch_thumb_only:
---
> case arm_thumb_thumb_stub_long_branch:
11701c11681
< case arm_stub_long_branch_v4t_thumb_arm:
---
> case arm_thumb_arm_v4t_stub_long_branch:
11711c11691
< case arm_stub_short_branch_v4t_thumb_arm:
---
> case arm_thumb_arm_v4t_stub_short_branch:
11714,11715d11693
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
< return FALSE;
11719c11697
< case arm_stub_long_branch_any_any_pic:
---
> case arm_stub_pic_long_branch:
11727,11752d11704
< case arm_stub_long_branch_v4t_arm_thumb_pic:
< if (!elf32_arm_output_stub_sym (osi, stub_name, addr, 16))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
< return FALSE;
< break;
< case arm_stub_long_branch_v4t_thumb_arm_pic:
< if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, 20))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 4))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 16))
< return FALSE;
< break;
< case arm_stub_long_branch_thumb_only_pic:
< if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, 16))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
< return FALSE;
< if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
< return FALSE;
< break;
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/arm-call.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/arm-call.d
6,56c6,56
< 00008000 <__t1_veneer>:
< 8000: e51ff004 ldr pc, \[pc, #-4\] ; 8004 <__t1_veneer\+0x4>
< 8004: 00008051 .word 0x00008051
<
< 00008008 <__t2_veneer>:
< 8008: e51ff004 ldr pc, \[pc, #-4\] ; 800c <__t2_veneer\+0x4>
< 800c: 00008053 .word 0x00008053
<
< 00008010 <_start>:
< 8010: eb00000d bl 804c <arm>
< 8014: fa00000d blx 8050 <t1>
< 8018: fb00000c blx 8052 <t2>
< 801c: fb00000d blx 805a <t5>
< 8020: fa00000a blx 8050 <t1>
< 8024: fb000009 blx 8052 <t2>
< 8028: eafffff4 b 8000 <__t1_veneer>
< 802c: eafffff5 b 8008 <__t2_veneer>
< 8030: 1bfffff2 blne 8000 <__t1_veneer>
< 8034: 1bfffff3 blne 8008 <__t2_veneer>
< 8038: 1b000003 blne 804c <arm>
< 803c: eb000002 bl 804c <arm>
< 8040: faffffff blx 8044 <thumblocal>
<
< 00008044 <thumblocal>:
< 8044: 4770 bx lr
<
< 00008046 <t3>:
< 8046: 4770 bx lr
<
< 00008048 <t4>:
< 8048: 4770 bx lr
< 804a: 46c0 nop \(mov r8, r8\)
<
< 0000804c <arm>:
< 804c: e12fff1e bx lr
<
< 00008050 <t1>:
< 8050: 4770 bx lr
<
< 00008052 <t2>:
< 8052: f7ff fff8 bl 8046 <t3>
< 8056: f7ff fff7 bl 8048 <t4>
<
< 0000805a <t5>:
< 805a: f000 f801 bl 8060 <local_thumb>
< 805e: 46c0 nop \(mov r8, r8\)
<
< 00008060 <local_thumb>:
< 8060: f7ff fff1 bl 8046 <t3>
< 8064: f7ff efd4 blx 8010 <_start>
< 8068: f7ff efd2 blx 8010 <_start>
---
> 00008000 <_start>:
> 8000: eb00000d bl 803c <arm>
> 8004: fa00000d blx 8040 <t1>
> 8008: fb00000c blx 8042 <t2>
> 800c: fb00000d blx 804a <t5>
> 8010: fa00000a blx 8040 <t1>
> 8014: fb000009 blx 8042 <t2>
> 8018: ea00000f b 805c <__t1_from_arm>
> 801c: ea000010 b 8064 <__t2_from_arm>
> 8020: 1b00000d blne 805c <__t1_from_arm>
> 8024: 1b00000e blne 8064 <__t2_from_arm>
> 8028: 1b000003 blne 803c <arm>
> 802c: eb000002 bl 803c <arm>
> 8030: faffffff blx 8034 <thumblocal>
>
> 00008034 <thumblocal>:
> 8034: 4770 bx lr
>
> 00008036 <t3>:
> 8036: 4770 bx lr
>
> 00008038 <t4>:
> 8038: 4770 bx lr
> 803a: 46c0 nop \(mov r8, r8\)
>
> 0000803c <arm>:
> 803c: e12fff1e bx lr
>
> 00008040 <t1>:
> 8040: 4770 bx lr
>
> 00008042 <t2>:
> 8042: f7ff fff8 bl 8036 <t3>
> 8046: f7ff fff7 bl 8038 <t4>
>
> 0000804a <t5>:
> 804a: f000 f801 bl 8050 <local_thumb>
> 804e: 46c0 nop \(mov r8, r8\)
>
> 00008050 <local_thumb>:
> 8050: f7ff fff1 bl 8036 <t3>
> 8054: f7ff efd4 blx 8000 <_start>
> 8058: f7ff efd2 blx 8000 <_start>
>
> 0000805c <__t1_from_arm>:
> 805c: e51ff004 ldr pc, \[pc, #-4\] ; 8060 <__t1_from_arm\+0x4>
> 8060: 00008041 .word 0x00008041
>
> 00008064 <__t2_from_arm>:
> 8064: e51ff004 ldr pc, \[pc, #-4\] ; 8068 <__t2_from_arm\+0x4>
> 8068: 00008043 .word 0x00008043
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/arm-elf.exp ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/arm-elf.exp
192a193,196
> # Special variants of these tests, as no farcall stub is generated
> # for a non-ARM-EABI target
> run_dump_test "thumb2-bl-as-thumb1-bad-noeabi"
> run_dump_test "thumb2-bl-bad-noeabi"
264c268
< {"ARM-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2002014 --pic-veneer" "-march=armv5t" {farcall-arm-thumb.s}
---
> {"ARM-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv5t" {farcall-arm-thumb.s}
274,276d277
< {"Thumb-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "-march=armv4t" {farcall-thumb-thumb.s}
< {{objdump -d farcall-thumb-thumb.d}}
< "farcall-thumb-thumb"}
280,285d280
< {"Thumb-Thumb farcall M profile (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv7m" {farcall-thumb-thumb.s}
< {{objdump -d farcall-thumb-thumb-m-pic-veneer.d}}
< "farcall-thumb-thumb-m-pic-veneer"}
< {"Thumb-Thumb farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-march=armv4t" {farcall-thumb-thumb.s}
< {{objdump -d farcall-thumb-thumb-pic-veneer.d}}
< "farcall-thumb-thumb-pic-veneer"}
299,301d293
< {"Thumb-ARM farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "-W" {farcall-thumb-arm.s}
< {{objdump -d farcall-thumb-arm-pic-veneer.d}}
< "farcall-thumb-arm-pic-veneer"}
316,337d307
<
< {"Thumb shared library with ARM entry points and farcalls" "-shared -T farcall-arm-lib.ld" "-mthumb-interwork"
< {farcall-mixed-lib.s}
< {{objdump -fdw farcall-armthumb-lib.d} {readelf -Ds farcall-armthumb-lib.sym}}
< "farcall-armthumb-lib.so"}
< {"Mixed ARM/Thumb dynamic application with farcalls" "tmpdir/farcall-mixed-lib.so -T farcall-arm-dyn.ld --section-start .far_arm=0x2100000 --section-start .far_thumb=0x2200000" ""
< {farcall-mixed-app.s}
< {{objdump -fdw farcall-mixed-app.d} {objdump -Rw farcall-mixed-app.r}
< {readelf -Ds farcall-mixed-app.sym}}
< "farcall-mixed-app"}
<
< {"Mixed ARM/Thumb shared library and farcalls" "-shared -T farcall-arm-lib.ld -use-blx" ""
< {farcall-mixed-lib.s}
< {{objdump -fdw farcall-mixed-lib.d} {objdump -Rw farcall-mixed-lib.r}
< {readelf -Ds farcall-mixed-lib.sym}}
< "farcall-mixed-lib.so"}
< {"Mixed ARM/Thumb arch5 dynamic application with farcalls" "tmpdir/farcall-mixed-lib.so -T farcall-arm-dyn.ld --use-blx --section-start .far_arm=0x2100000 --section-start .far_thumb=0x2200000" ""
< {farcall-mixed-app.s}
< {{objdump -fdw farcall-mixed-app-v5.d} {objdump -Rw farcall-mixed-app.r}
< {readelf -Ds farcall-mixed-app.sym}}
< "farcall-mixed-app-v5"}
<
358a329,332
> run_dump_test "farcall-thumb-thumb"
> run_dump_test "farcall-thumb-thumb-pic-veneer"
> run_dump_test "farcall-thumb-thumb-m-pic-veneer"
> run_dump_test "farcall-thumb-arm-pic-veneer"
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/arm-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/arm-pic-veneer.d
6,10c6,7
< 00008000 <__foo_veneer>:
< 8000: e59fc004 ldr ip, \[pc, #4\] ; 800c <__foo_veneer\+0xc>
< 8004: e08cc00f add ip, ip, pc
< 8008: e12fff1c bx ip
< 800c: 00000009 .word 0x00000009
---
> 00008000 <_start>:
> 8000: ea000000 b 8008 <__foo_from_arm>
12,13c9,11
< 00008010 <_start>:
< 8010: eafffffa b 8000 <__foo_veneer>
---
> 00008004 <foo>:
> 8004: 46c0 nop \(mov r8, r8\)
> 8006: 4770 bx lr
15,17c13,17
< 00008014 <foo>:
< 8014: 46c0 nop \(mov r8, r8\)
< 8016: 4770 bx lr
---
> 00008008 <__foo_from_arm>:
> 8008: e59fc004 ldr ip, \[pc, #4\] ; 8014 <__foo_from_arm\+0xc>
> 800c: e08cc00f add ip, ip, pc
> 8010: e12fff1c bx ip
> 8014: fffffff1 .word 0xfffffff1
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/arm-pic-veneer.s ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/arm-pic-veneer.s
1,4c1,4
< .text
< .arm
< .global _start
< .type _start, %function
---
> .text
> .arm
> .global _start
> .type _start, %function
6c6
< b foo
---
> b foo
8,10c8,10
< .thumb
< .global foo
< .type foo, %function
---
> .thumb
> .global foo
> .type foo, %function
12,13c12,13
< nop
< bx lr
---
> nop
> bx lr
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d
8c8
< 1008: 02000014 .word 0x02000014
---
> 1008: 02000018 .word 0x02000018
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-arm-dyn.ld ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-arm-dyn.ld
1,194d0
< /* Script for -z combreloc: combine and sort reloc sections */
< OUTPUT_ARCH(arm)
< ENTRY(_start)
< /* Do we need any of these for elf?
< __DYNAMIC = 0; */
< SECTIONS
< {
< /* Read-only sections, merged into text segment: */
< PROVIDE (__executable_start = 0x8000); . = 0x8000;
< .interp : { *(.interp) }
< .hash : { *(.hash) }
< .dynsym : { *(.dynsym) }
< .dynstr : { *(.dynstr) }
< .gnu.version : { *(.gnu.version) }
< .gnu.version_d : { *(.gnu.version_d) }
< .gnu.version_r : { *(.gnu.version_r) }
< .rel.dyn :
< {
< *(.rel.init)
< *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
< *(.rel.fini)
< *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
< *(.rel.data.rel.ro*)
< *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
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diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-arm-lib.ld ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-arm-lib.ld
1,187d0
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diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d
8c8
< 1008: 02001009 .word 0x02001009
---
> 1008: 0200000d .word 0x0200000d
15,16c15,16
< 02002014 <bar>:
< 2002014: 4770 bx lr
---
> 02001014 <bar>:
> 2001014: 4770 bx lr
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d
6,9c6,9
< 1000: e59fc004 ldr ip, \[pc, #4\] ; 100c <__bar_from_arm\+0xc>
< 1004: e08cc00f add ip, ip, pc
< 1008: e12fff1c bx ip
< 100c: 02000009 .word 0x02000009
---
> 1000: e59fc000 ldr ip, \[pc, #0\] ; 1008 <__bar_from_arm\+0x8>
> 1004: e08ff00c add pc, pc, ip
> 1008: 0200000d .word 0x0200000d
> 100c: 00000000 .word 0x00000000
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-armthumb-lib.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-armthumb-lib.d
1,44d0
<
< tmpdir/farcall-armthumb-lib.so: file format elf32-(little|big)arm
< architecture: arm, flags 0x00000150:
< HAS_SYMS, DYNAMIC, D_PAGED
< start address 0x.*
<
< Disassembly of section .plt:
<
< .* <.plt>:
< .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
< .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1.>
< .*: e08fe00e add lr, pc, lr
< .*: e5bef008 ldr pc, \[lr, #8\]!
< .*: .*
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
< Disassembly of section .text:
<
< .* <lib_func1>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebfffff. bl .* <lib_func1-0x..?>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <__real_lib_func2>:
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
<
< .* <lib_func2>:
< .*: e59fc004 ldr ip, \[pc, #4\] ; .* <lib_func2\+0xc>
< .*: e08cc00f add ip, ip, pc
< .*: e12fff1c bx ip
< .*: ffffffe5 .*
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-armthumb-lib.sym ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-armthumb-lib.sym
1,17d0
<
< Symbol table for image:
< Num Buc: Value Size Type Bind Vis Ndx Name
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end
< .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
< .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
< .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2
< .. ..: .......0 2 FUNC GLOBAL DEFAULT 6 lib_func2
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
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diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-app-v5.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-app-v5.d
1,85d0
<
< tmpdir/farcall-mixed-app-v5: file format elf32-(little|big)arm
< architecture: arm, flags 0x00000112:
< EXEC_P, HAS_SYMS, D_PAGED
< start address 0x.*
<
< Disassembly of section .plt:
<
< .* <.plt>:
< .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
< .*: e59fe004 ldr lr, \[pc, #4\] ; .* <__app_func_veneer-0x24>
< .*: e08fe00e add lr, pc, lr
< .*: e5bef008 ldr pc, \[lr, #8\]!
< .*: .*
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
<
< Disassembly of section .text:
<
< .* <__app_func_veneer>:
< .*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__app_func_veneer\+0x4>
< .*: 02100010 .word 0x02100010
< ...
<
< .* <_start>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebfffff8 bl .* <__app_func_veneer>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <app_tfunc_close>:
< .*: b500 push {lr}
< .*: f7ff efd6 blx .* <__app_func_veneer-0x20>
< .*: bd00 pop {pc}
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
<
< Disassembly of section .far_arm:
<
< .* <__lib_func1_veneer>:
< .*: e51ff004 ldr pc, \[pc, #-4\] ; 2100004 <__lib_func1_veneer\+0x4>
< .*: 0000822c .word 0x0000822c
< ...
<
< .* <app_func>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebfffff. bl .* <__lib_func1_veneer>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <app_func2>:
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< Disassembly of section .far_thumb:
<
< .* <__lib_func2_from_thumb>:
< .*: e51ff004 ldr pc, \[pc, #-4\] ; 2200004 <__lib_func2_from_thumb\+0x4>
< .*: 00008220 .word 0x00008220
< ...
<
< .* <app_tfunc>:
< .*: b500 push {lr}
< .*: f7ff eff6 blx .* <__lib_func2_from_thumb>
< .*: bd00 pop {pc}
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-app.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-app.d
1,92d0
<
< tmpdir/farcall-mixed-app: file format elf32-(little|big)arm
< architecture: arm, flags 0x00000112:
< EXEC_P, HAS_SYMS, D_PAGED
< start address 0x.*
<
< Disassembly of section .plt:
<
< .* <.plt>:
< .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
< .*: e59fe004 ldr lr, \[pc, #4\] ; .* <__app_func_veneer-0x24>
< .*: e08fe00e add lr, pc, lr
< .*: e5bef008 ldr pc, \[lr, #8\]!
< .*: .*
< .*: 4778 bx pc
< .*: 46c0 nop \(mov r8, r8\)
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
<
< Disassembly of section .text:
<
< .* <__app_func_veneer>:
< .*: e51ff004 ldr pc, \[pc, #-4\] ; 8244 <__app_func_veneer\+0x4>
< .*: 02100010 .word 0x02100010
< ...
<
< .* <_start>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebfffff8 bl .* <__app_func_veneer>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <app_tfunc_close>:
< .*: b500 push {lr}
< .*: f7ff ffd5 bl 8220 <__app_func_veneer-0x20>
< .*: bd00 pop {pc}
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
<
< Disassembly of section .far_arm:
<
< .* <__lib_func1_veneer>:
< .*: e51ff004 ldr pc, \[pc, #-4\] ; 2100004 <__lib_func1_veneer\+0x4>
< .*: 00008230 .word 0x00008230
< ...
<
< .* <app_func>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebffff.. bl .* <__lib_func1_veneer>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <app_func2>:
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< Disassembly of section .far_thumb:
<
< .* <__lib_func2_from_thumb>:
< .*: b540 push {r6, lr}
< .*: 4e03 ldr r6, \[pc, #12\] \(2200010 <__lib_func2_from_thumb\+0x10>\)
< .*: 46fe mov lr, pc
< .*: 4730 bx r6
< .*: e8bd4040 pop {r6, lr}
< .*: e12fff1e bx lr
< .*: 00008224 .word 0x00008224
< ...
<
< .* <app_tfunc>:
< .*: b500 push {lr}
< .*: f7ff ffed bl .* <__lib_func2_from_thumb>
< .*: bd00 pop {pc}
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-app.r ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-app.r
1,10d0
<
< tmpdir/farcall-mixed-app.*: file format elf32-(little|big)arm
<
< DYNAMIC RELOCATION RECORDS
< OFFSET TYPE VALUE
< .* R_ARM_COPY data_obj
< .* R_ARM_JUMP_SLOT lib_func2
< .* R_ARM_JUMP_SLOT lib_func1
<
<
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-app.s ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-app.s
1,61d0
< .text
< .p2align 4
< .globl _start
< _start:
< mov ip, sp
< stmdb sp!, {r11, ip, lr, pc}
< bl app_func
< ldmia sp, {r11, sp, lr}
< bx lr
<
< .p2align 4
< .globl app_tfunc_close
< .type app_tfunc_close,%function
< .thumb_func
< .code 16
< app_tfunc_close:
< push {lr}
< bl lib_func2
< pop {pc}
< bx lr
<
< @ We will place the section .far_arm at 0x2100000.
< .section .far_arm, "xa"
<
< .arm
< .p2align 4
< .globl app_func
< .type app_func,%function
< app_func:
< mov ip, sp
< stmdb sp!, {r11, ip, lr, pc}
< bl lib_func1
< ldmia sp, {r11, sp, lr}
< bx lr
<
< .arm
< .p2align 4
< .globl app_func2
< .type app_func2,%function
< app_func2:
< bx lr
< nop
< nop
< nop
<
< @ We will place the section .far_thumb at 0x2200000.
< .section .far_thumb, "xa"
<
< .p2align 4
< .globl app_tfunc
< .type app_tfunc,%function
< .thumb_func
< .code 16
< app_tfunc:
< push {lr}
< bl lib_func2
< pop {pc}
< bx lr
<
< .data
< .long data_obj
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-app.sym ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-app.sym
1,17d0
<
< Symbol table for image:
< Num Buc: Value Size Type Bind Vis Ndx Name
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end
< .. ..: ........ 4 OBJECT GLOBAL DEFAULT 12 data_obj
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
< .. ..: 0*[^0]*.* 0 FUNC GLOBAL DEFAULT UND lib_func1
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 11 __data_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
< .. ..: .......0 0 FUNC GLOBAL DEFAULT 14 app_func2
< .. ..: 0*[^0]*.* 0 FUNC GLOBAL DEFAULT UND lib_func2
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-lib.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-lib.d
1,38d0
<
< tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm
< architecture: arm, flags 0x00000150:
< HAS_SYMS, DYNAMIC, D_PAGED
< start address 0x.*
<
< Disassembly of section .plt:
<
< .* <.plt>:
< .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
< .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x.*>
< .*: e08fe00e add lr, pc, lr
< .*: e5bef008 ldr pc, \[lr, #8\]!
< .*: .*
< .*: e28fc6.* add ip, pc, #.* ; 0x.*
< .*: e28cca.* add ip, ip, #.* ; 0x.*
< .*: e5bcf.* ldr pc, \[ip, #.*\]!
< Disassembly of section .text:
<
< .* <lib_func1>:
< .*: e1a0c00d mov ip, sp
< .*: e92dd800 push {fp, ip, lr, pc}
< .*: ebfffff. bl .* <lib_func1-0x..?>
< .*: e89d6800 ldm sp, {fp, sp, lr}
< .*: e12fff1e bx lr
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
< .*: e1a00000 nop \(mov r0,r0\)
<
< .* <lib_func2>:
< .*: 4770 bx lr
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
< .*: 46c0 nop \(mov r8, r8\)
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-lib.r ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-lib.r
1,8d0
<
< tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm
<
< DYNAMIC RELOCATION RECORDS
< OFFSET TYPE VALUE
< .* R_ARM_JUMP_SLOT app_func2
<
<
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-lib.s ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-lib.s
1,28d0
< .text
<
< .p2align 4
< .globl lib_func1
< .type lib_func1, %function
< lib_func1:
< mov ip, sp
< stmdb sp!, {r11, ip, lr, pc}
< bl app_func2
< ldmia sp, {r11, sp, lr}
< bx lr
< .size lib_func1, . - lib_func1
<
< .p2align 4
< .globl lib_func2
< .type lib_func2, %function
< .thumb_func
< .code 16
< lib_func2:
< bx lr
< .size lib_func2, . - lib_func2
<
< .data
< .globl data_obj
< .type data_obj, %object
< data_obj:
< .long 0
< .size data_obj, . - data_obj
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-mixed-lib.sym ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-mixed-lib.sym
1,17d0
<
< Symbol table for image:
< Num Buc: Value Size Type Bind Vis Ndx Name
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end
< .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
< .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
< .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2
< .. ..: .......1 2 FUNC GLOBAL DEFAULT 6 lib_func2
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
< .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d
8c8
< 1008: 02000008 .word 0x02000008
---
> 1008: 0200000c .word 0x0200000c
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d
1,19c1,5
< .*: file format .*
<
< Disassembly of section .text:
<
< 00001000 <__bar_from_thumb>:
< 1000: 4778 bx pc
< 1002: 46c0 nop \(mov r8, r8\)
< 1004: e59fc004 ldr ip, \[pc, #4\] ; 1010 <__bar_from_thumb\+0x10>
< 1008: e08cc00f add ip, ip, pc
< 100c: e1a0f00c mov pc, ip
< 1010: 02000004 .word 0x02000004
< 1014: 00000000 .word 0x00000000
<
< 00001018 <_start>:
< 1018: f7ff fff2 bl 1000 <__bar_from_thumb>
< Disassembly of section .foo:
<
< 02001014 <bar>:
< 2001014: e12fff1e bx lr
---
> #name: Thumb-Thumb farcall without BLX
> #source: farcall-thumb-thumb.s
> #as: -march=armv4t
> #ld: -Ttext 0x1000 --section-start .foo=0x2001014
> #error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d
8c8
< 1008: 02000009 .word 0x02000009
---
> 1008: 0200000d .word 0x0200000d
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d
1,19c1,5
< .*: file format .*
<
< Disassembly of section .text:
<
< 00001000 <__bar_veneer>:
< 1000: b540 push {r6, lr}
< 1002: 4e02 ldr r6, \[pc, #8\] \(100c <__bar_veneer\+0xc>\)
< 1004: 46fe mov lr, pc
< 1006: 44b7 add pc, r6
< 1008: bd40 pop {r6, pc}
< 100a: bf00 nop
< 100c: 0200000b .word 0x0200000b
<
< 00001010 <_start>:
< 1010: f7ff fff6 bl 1000 <__bar_veneer>
< Disassembly of section .foo:
<
< 02001014 <bar>:
< 2001014: 4770 bx lr
---
> #name: Thumb-Thumb farcall without BLX
> #source: farcall-thumb-thumb.s
> #as: -march=armv4t
> #ld: -Ttext 0x1000 --section-start .foo=0x2001014
> #error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-thumb-m.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-thumb-m.d
9c9
< 1006: 46b7 mov pc, r6
---
> 1006: 4730 bx r6
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d
1,19c1,5
< .*: file format .*
<
< Disassembly of section .text:
<
< 00001000 <__bar_veneer>:
< 1000: b540 push {r6, lr}
< 1002: 4e02 ldr r6, \[pc, #8\] \(100c <__bar_veneer\+0xc>\)
< 1004: 46fe mov lr, pc
< 1006: 44b7 add pc, r6
< 1008: bd40 pop {r6, pc}
< 100a: bf00 nop
< 100c: 0200000b .word 0x0200000b
<
< 00001010 <_start>:
< 1010: f7ff fff6 bl 1000 <__bar_veneer>
< Disassembly of section .foo:
<
< 02001014 <bar>:
< 2001014: 4770 bx lr
---
> #name: Thumb-Thumb farcall without BLX
> #source: farcall-thumb-thumb.s
> #as: -march=armv4t
> #ld: -Ttext 0x1000 --section-start .foo=0x2001014
> #error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'
diff -N -r --exclude=CVS --exclude='*~' --exclude='.#*' ./ld/testsuite/ld-arm/farcall-thumb-thumb.d ../../binutils-cvs-ref/src/ld/testsuite/ld-arm/farcall-thumb-thumb.d
1,19c1,5
< .*: file format .*
<
< Disassembly of section .text:
<
< 00001000 <__bar_veneer>:
< 1000: b540 push {r6, lr}
< 1002: 4e02 ldr r6, \[pc, #8\] \(100c <__bar_veneer\+0xc>\)
< 1004: 46fe mov lr, pc
< 1006: 46b7 mov pc, r6
< 1008: bd40 pop {r6, pc}
< 100a: bf00 nop
< 100c: 02001015 .word 0x02001015
<
< 00001010 <_start>:
< 1010: f7ff fff6 bl 1000 <__bar_veneer>
< Disassembly of section .foo:
<
< 02001014 <bar>:
< 2001014: 4770 bx lr
---
> #name: Thumb-Thumb farcall without BLX
> #source: farcall-thumb-thumb.s
> #as: -march=armv4t
> #ld: -Ttext 0x1000 --section-start .foo=0x2001014
> #error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_THM_CALL against `bar'