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Add more coldfire cores


This patch adds a bunch of coldfire cores and fixes a couple of other issues

1) newer gcc's are picky about passing non-constant strings to printf. Gcc'll optimize the printf to fputs btw.

2) A couple of cpus didn't have complete control register lists

3) There's a new stldsr in isa-c, missing from previous changes

4) we want -fno-mac to disable both emac and mac, rather than just mac instructions.

ok?

nathan
--
Nathan Sidwell    ::   http://www.codesourcery.com   ::         CodeSourcery

2009-02-09  Nathan Sidwell  <nathan@codesourcery.com>

	gas/
	* config/tc-m68k.c (mcf51qe_ctrl): Add CPUCR.
	(mcf52259_ctrl, mcf52277_ctrl, mcf53017_ctrl): New.
	(mcf5307_ctrl): Add VBR.
	(no_mac): New variable.
	(m68k_extensions): Refer to no_mac mask.
	(m68k_cpus): Add 51, 51ac, 51cn, 51em, 51jm, 52274, 52277,
	52252..52259, 53011..53017.
	(m68k_ip): Process CPUCR.
	(init_table): Add cpucr entry.
	(m68k_set_extension): Allow negated mask to refer to a variable.
	(md_show_usage): Use '%s' to silence fprintf warning.
	* config/m68k-parse.h (CPUCR): New control register.

	gas/testsuite/
	* m68k/br-isac.d, m68k/br-isac.s: Add stldsr test.

	opcodes/
	* m68k-opc.c (m68k_opcodes): Add stldsr instruction.

Index: gas/config/m68k-parse.h
===================================================================
RCS file: /cvs/src/src/gas/config/m68k-parse.h,v
retrieving revision 1.15
diff -c -3 -p -r1.15 m68k-parse.h
*** gas/config/m68k-parse.h	3 Feb 2009 14:36:46 -0000	1.15
--- gas/config/m68k-parse.h	9 Feb 2009 15:02:58 -0000
*************** enum m68k_register
*** 101,106 ****
--- 101,107 ----
    CACR,
    VBR,
    CAAR,
+   CPUCR,
    MSP,
    ITT0,
    ITT1,
Index: gas/config/tc-m68k.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-m68k.c,v
retrieving revision 1.107
diff -c -3 -p -r1.107 tc-m68k.c
*** gas/config/tc-m68k.c	3 Feb 2009 14:36:46 -0000	1.107
--- gas/config/tc-m68k.c	9 Feb 2009 15:03:04 -0000
*************** static const enum m68k_register mcf_ctrl
*** 181,188 ****
    RAMBAR0, RAMBAR1, RAMBAR, MBAR,
    0
  };
! static const enum m68k_register mcf51qe_ctrl[] = {
!   VBR,
    0
  };
  static const enum m68k_register mcf5206_ctrl[] = {
--- 181,188 ----
    RAMBAR0, RAMBAR1, RAMBAR, MBAR,
    0
  };
! static const enum m68k_register mcf51_ctrl[] = {
!   VBR, CPUCR,
    0
  };
  static const enum m68k_register mcf5206_ctrl[] = {
*************** static const enum m68k_register mcf5225_
*** 217,222 ****
--- 217,230 ----
    VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, MBAR, RAMBAR1,
    0
  };
+ static const enum m68k_register mcf52259_ctrl[] = {
+   VBR, FLASHBAR, RAMBAR, RAMBAR1,
+   0
+ };
+ static const enum m68k_register mcf52277_ctrl[] = {
+   VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
+   0
+ };
  static const enum m68k_register mcf5235_ctrl[] = {
    VBR, CACR, ACR0, ACR1, RAMBAR, RAMBAR1,
    0
*************** static const enum m68k_register mcf5282_
*** 249,256 ****
    VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
    0
  };
  static const enum m68k_register mcf5307_ctrl[] = {
!   CACR, ACR0, ACR1,  VBR, RAMBAR0, RAMBAR_ALT, MBAR,
    0
  };
  static const enum m68k_register mcf5329_ctrl[] = {
--- 257,268 ----
    VBR, CACR, ACR0, ACR1, FLASHBAR, RAMBAR, RAMBAR1,
    0
  };
+ static const enum m68k_register mcf53017_ctrl[] = {
+   VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR,
+   0
+ };
  static const enum m68k_register mcf5307_ctrl[] = {
!   VBR, CACR, ACR0, ACR1, RAMBAR0, RAMBAR_ALT, MBAR,
    0
  };
  static const enum m68k_register mcf5329_ctrl[] = {
*************** static const struct m68k_cpu m68k_archs[
*** 525,530 ****
--- 537,545 ----
    {0,0,NULL, 0}
  };
  
+ /* For -mno-mac we want to turn off all types of mac.  */
+ static const unsigned no_mac = mcfmac | mcfemac;
+ 
  /* Architecture extensions, here 'alias' -1 for m68k, +1 for cf and 0
     for either.  */
  static const struct m68k_cpu m68k_extensions[] =
*************** static const struct m68k_cpu m68k_extens
*** 537,543 ****
  
    {mcfhwdiv,					NULL, "div", 1},
    {mcfusp,					NULL, "usp", 1},
!   {mcfmac,					NULL, "mac", 1},
    {mcfemac,					NULL, "emac", 1},
  
    {0,NULL,NULL, 0}
--- 552,558 ----
  
    {mcfhwdiv,					NULL, "div", 1},
    {mcfusp,					NULL, "usp", 1},
!   {mcfmac,					(void *)&no_mac, "mac", 1},
    {mcfemac,					NULL, "emac", 1},
  
    {0,NULL,NULL, 0}
*************** static const struct m68k_cpu m68k_cpus[]
*** 579,585 ****
    {cpu32|m68881,				cpu32_ctrl, "68349", 1},
    {cpu32|m68881,				cpu32_ctrl, "68360", 1},
  
!   {mcfisa_a|mcfisa_c|mcfusp,                    mcf51qe_ctrl, "51qe", 0},
  
    {mcfisa_a,					mcf_ctrl, "5200", 0},
    {mcfisa_a,					mcf_ctrl, "5202", 1},
--- 594,605 ----
    {cpu32|m68881,				cpu32_ctrl, "68349", 1},
    {cpu32|m68881,				cpu32_ctrl, "68360", 1},
  
!   {mcfisa_a|mcfisa_c|mcfusp,                    mcf51_ctrl, "51", 0},
!   {mcfisa_a|mcfisa_c|mcfusp,                    mcf51_ctrl, "51ac", 1},
!   {mcfisa_a|mcfisa_c|mcfusp,                    mcf51_ctrl, "51cn", 1},
!   {mcfisa_a|mcfisa_c|mcfusp|mcfmac,  		mcf51_ctrl, "51em", 1},
!   {mcfisa_a|mcfisa_c|mcfusp,  			mcf51_ctrl, "51jm", 1},
!   {mcfisa_a|mcfisa_c|mcfusp,                    mcf51_ctrl, "51qe", 1},
  
    {mcfisa_a,					mcf_ctrl, "5200", 0},
    {mcfisa_a,					mcf_ctrl, "5202", 1},
*************** static const struct m68k_cpu m68k_cpus[]
*** 613,618 ****
--- 633,641 ----
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp,   mcf5225_ctrl, "5224", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfmac|mcfusp,   mcf5225_ctrl, "5225", 0},
  
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,  mcf52277_ctrl, "52274", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,  mcf52277_ctrl, "52277", 0},
+   
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5235_ctrl, "5232", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5235_ctrl, "5233", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5235_ctrl, "5234", -1},
*************** static const struct m68k_cpu m68k_cpus[]
*** 622,628 ****
    {mcfisa_a|mcfhwdiv|mcfemac,			mcf5249_ctrl, "5249", 0},
    {mcfisa_a|mcfhwdiv|mcfemac,			mcf5250_ctrl, "5250", 0},
    {mcfisa_a|mcfhwdiv|mcfemac, 			mcf5253_ctrl, "5253", 0},
!   
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5271_ctrl, "5270", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5271_ctrl, "5271", 0},
    
--- 645,658 ----
    {mcfisa_a|mcfhwdiv|mcfemac,			mcf5249_ctrl, "5249", 0},
    {mcfisa_a|mcfhwdiv|mcfemac,			mcf5250_ctrl, "5250", 0},
    {mcfisa_a|mcfhwdiv|mcfemac, 			mcf5253_ctrl, "5253", 0},
! 
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52252", -1},
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52254", -1},
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52255", -1},
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52256", -1},
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52258", -1},
!   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf52259_ctrl, "52259", 0},
!    
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5271_ctrl, "5270", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5271_ctrl, "5271", 0},
    
*************** static const struct m68k_cpu m68k_cpus[]
*** 636,641 ****
--- 666,679 ----
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5282_ctrl, "5282", -1},
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5282_ctrl, "528x", 0},
    
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53011", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53012", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53013", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53014", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53015", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53016", -1},
+   {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf53017_ctrl, "53017", 0},
+   
    {mcfisa_a|mcfhwdiv|mcfmac,			mcf5307_ctrl, "5307", 0},
    
    {mcfisa_a|mcfisa_aa|mcfhwdiv|mcfemac|mcfusp,	mcf5329_ctrl, "5327", -1},
*************** m68k_ip (char *instring)
*** 3275,3280 ****
--- 3313,3319 ----
  	      tmpreg = 0x801;
  	      break;
  	    case CAAR:
+ 	    case CPUCR:
  	      tmpreg = 0x802;
  	      break;
  	    case MSP:
*************** static const struct init_entry init_tabl
*** 4036,4041 ****
--- 4075,4081 ----
    { "dfcr", DFC },
    { "cacr", CACR },		/* Cache Control Register.  */
    { "caar", CAAR },		/* Cache Address Register.  */
+   { "cpucr", CPUCR },		/* CPU Control Register.  */
  
    { "usp", USP },		/* User Stack Pointer.  */
    { "vbr", VBR },		/* Vector Base Register.  */
*************** m68k_set_extension (char const *name, in
*** 7407,7413 ****
      }
  
    if (negated)
!     not_current_architecture |= ext->arch;
    else
      current_architecture |= ext->arch;
    return 1;
--- 7447,7454 ----
      }
  
    if (negated)
!     not_current_architecture |= (ext->control_regs
! 				 ? *(unsigned *)ext->control_regs: ext->arch);
    else
      current_architecture |= ext->arch;
    return 1;
*************** md_show_usage (FILE *stream)
*** 7665,7671 ****
      {
        if (i)
  	fprintf (stream, " | ");
!       fprintf (stream, m68k_archs[i].name);
      }
    fprintf (stream, "\n");
  
--- 7706,7712 ----
      {
        if (i)
  	fprintf (stream, " | ");
!       fprintf (stream, "%s", m68k_archs[i].name);
      }
    fprintf (stream, "\n");
  
*************** md_show_usage (FILE *stream)
*** 7674,7680 ****
      {
        if (i)
  	fprintf (stream, " | ");
!       fprintf (stream, m68k_cpus[i].name);
      }
    fprintf (stream, _("\n"));
  }
--- 7715,7721 ----
      {
        if (i)
  	fprintf (stream, " | ");
!       fprintf (stream, "%s", m68k_cpus[i].name);
      }
    fprintf (stream, _("\n"));
  }
Index: gas/testsuite/gas/m68k/br-isac.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68k/br-isac.d,v
retrieving revision 1.3
diff -c -3 -p -r1.3 br-isac.d
*** gas/testsuite/gas/m68k/br-isac.d	25 Sep 2007 15:31:05 -0000	1.3
--- gas/testsuite/gas/m68k/br-isac.d	9 Feb 2009 15:03:14 -0000
*************** Disassembly of section .text:
*** 18,20 ****
--- 18,21 ----
    18:	61ff 0000 0000 	bsrl 1a <foo\+0x1a>
  			1a: R_68K_PC32	bar
    1e:	4e71           	nop
+   20:	40e7 46fc 04d2 	stldsr #1234
Index: gas/testsuite/gas/m68k/br-isac.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/m68k/br-isac.s,v
retrieving revision 1.1
diff -c -3 -p -r1.1 br-isac.s
*** gas/testsuite/gas/m68k/br-isac.s	23 Apr 2007 07:51:27 -0000	1.1
--- gas/testsuite/gas/m68k/br-isac.s	9 Feb 2009 15:03:14 -0000
*************** foo:	nop
*** 5,7 ****
--- 5,8 ----
  	jbsr foo
  	jbsr bar
  	nop
+ 	stldsr	#1234
Index: opcodes/m68k-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/m68k-opc.c,v
retrieving revision 1.29
diff -c -3 -p -r1.29 m68k-opc.c
*** opcodes/m68k-opc.c	7 Nov 2007 16:37:44 -0000	1.29
--- opcodes/m68k-opc.c	9 Feb 2009 15:03:24 -0000
*************** const struct m68k_opcode m68k_opcodes[] 
*** 2025,2031 ****
  
  {"sbcd", 2,	one(0100400),		one(0170770), "DsDd", m68000up },
  {"sbcd", 2,	one(0100410),		one(0170770), "-s-d", m68000up },
! 
    /* Traps have to come before conditional sets, as they have a more
       specific opcode.  */
  {"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 | fido_a },
--- 2025,2033 ----
  
  {"sbcd", 2,	one(0100400),		one(0170770), "DsDd", m68000up },
  {"sbcd", 2,	one(0100410),		one(0170770), "-s-d", m68000up },
!   
! {"stldsr", 6,   two(0x40e7, 0x46fc),    two(0xffff, 0xffff), "#w", mcfisa_c },
!   
    /* Traps have to come before conditional sets, as they have a more
       specific opcode.  */
  {"trapcc", 2,	one(0052374),	one(0177777), "", m68020up | cpu32 | fido_a },

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