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[RFA] Patch to conform to Power ISA 2.06
- From: Edmar Wienskoski-RA8797 <edmar at freescale dot com>
- To: binutils at sourceware dot org
- Date: Wed, 18 Feb 2009 13:40:18 -0600
- Subject: [RFA] Patch to conform to Power ISA 2.06
Freescale would like to contribute this patch to binutils.
We would like to request a PowerPC maintainer to review and commit the
patch since we have no CVS write permissions.
Recently, Power.org released the ISA 2.06 in which the wait instruction
has a 2 bit unsigned argument. The form: "wait 0" is equivalent to the
old form: "wait".
This patch adds a 2 bit unsigned argument as an optional argument to the
wait instruction, keeping it backward compatible.
Dejagnu tests were performed in a e500mc target using a G5 as a host with
no regressions.
Thanks,
Edmar
gas/testsuite/ChangeLog
2009-02-18 Edmar Wienskoski <edmar@freescale.com>
* gas/ppc/e500mc.s, gas/ppc/e500mc.d: Added new forms of the
wait instruction.
opcodes/ChangeLog
2009-02-18 Edmar Wienskoski <edmar@freescale.com>
* ppc-opc.c (WC): New.
(powerpc_opcodes): Add optional argument to wait instruction.
Only in binutils: binutils-2.19
diff -rc binutils-20090218/gas/testsuite/gas/ppc/e500mc.d binutils/gas/testsuite/gas/ppc/e500mc.d
*** binutils-20090218/gas/testsuite/gas/ppc/e500mc.d 2008-04-14 06:01:38.000000000 -0500
--- binutils/gas/testsuite/gas/ppc/e500mc.d 2009-02-18 13:07:46.000000000 -0600
***************
*** 14,51 ****
10: 7c 09 57 be icbiep r9,r10
14: 7c 00 69 dc msgclr r13
18: 7c 00 71 9c msgsnd r14
! 1c: 7c 00 00 7c wait
! 20: 7f 9c e3 78 mdors
! 24: 7c 00 02 1c ehpriv
! 28: 7c 18 cb c6 dsn r24,r25
! 2c: 7c 22 18 be lbepx r1,r2,r3
! 30: 7c 85 32 3e lhepx r4,r5,r6
! 34: 7c e8 48 3e lwepx r7,r8,r9
! 38: 7d 4b 60 3a ldepx r10,r11,r12
! 3c: 7d ae 7c be lfdepx r13,r14,r15
! 40: 7e 11 91 be stbepx r16,r17,r18
! 44: 7e 74 ab 3e sthepx r19,r20,r21
! 48: 7e d7 c1 3e stwepx r22,r23,r24
! 4c: 7f 3a d9 3a stdepx r25,r26,r27
! 50: 7f 9d f5 be stfdepx r28,r29,r30
! 54: 7c 01 14 06 lbdx r0,r1,r2
! 58: 7d 8d 74 46 lhdx r12,r13,r14
! 5c: 7c 64 2c 86 lwdx r3,r4,r5
! 60: 7f 5b e6 46 lfddx f26,r27,r28
! 64: 7d f0 8c c6 lddx r15,r16,r17
! 68: 7c c7 45 06 stbdx r6,r7,r8
! 6c: 7e 53 a5 46 sthdx r18,r19,r20
! 70: 7d 2a 5d 86 stwdx r9,r10,r11
! 74: 7f be ff 46 stfddx f29,r30,r31
! 78: 7e b6 bd c6 stddx r21,r22,r23
! 7c: 7c 20 0d ec dcbal r0,r1
! 80: 7c 26 3f ec dcbzl r6,r7
! 84: 7c 1f 00 7e dcbstep r31,r0
! 88: 7c 01 10 fe dcbfep r1,r2
! 8c: 7c 64 29 fe dcbtstep r3,r4,r5
! 90: 7c c7 42 7e dcbtep r6,r7,r8
! 94: 7c 0b 67 fe dcbzep r11,r12
! 98: 7c 00 06 26 tlbilx 0,0,r0
! 9c: 7c 20 06 26 tlbilx 1,0,r0
! a0: 7c 62 1e 26 tlbilx 3,r2,r3
! a4: 7c 64 2e 26 tlbilx 3,r4,r5
--- 14,55 ----
10: 7c 09 57 be icbiep r9,r10
14: 7c 00 69 dc msgclr r13
18: 7c 00 71 9c msgsnd r14
! 1c: 7c 00 00 7c wait
! 20: 7c 00 00 7c wait
! 24: 7c 20 00 7c wait 1
! 28: 7c 40 00 7c wait 2
! 2c: 7c 60 00 7c wait 3
! 30: 7f 9c e3 78 mdors
! 34: 7c 00 02 1c ehpriv
! 38: 7c 18 cb c6 dsn r24,r25
! 3c: 7c 22 18 be lbepx r1,r2,r3
! 40: 7c 85 32 3e lhepx r4,r5,r6
! 44: 7c e8 48 3e lwepx r7,r8,r9
! 48: 7d 4b 60 3a ldepx r10,r11,r12
! 4c: 7d ae 7c be lfdepx r13,r14,r15
! 50: 7e 11 91 be stbepx r16,r17,r18
! 54: 7e 74 ab 3e sthepx r19,r20,r21
! 58: 7e d7 c1 3e stwepx r22,r23,r24
! 5c: 7f 3a d9 3a stdepx r25,r26,r27
! 60: 7f 9d f5 be stfdepx r28,r29,r30
! 64: 7c 01 14 06 lbdx r0,r1,r2
! 68: 7d 8d 74 46 lhdx r12,r13,r14
! 6c: 7c 64 2c 86 lwdx r3,r4,r5
! 70: 7f 5b e6 46 lfddx f26,r27,r28
! 74: 7d f0 8c c6 lddx r15,r16,r17
! 78: 7c c7 45 06 stbdx r6,r7,r8
! 7c: 7e 53 a5 46 sthdx r18,r19,r20
! 80: 7d 2a 5d 86 stwdx r9,r10,r11
! 84: 7f be ff 46 stfddx f29,r30,r31
! 88: 7e b6 bd c6 stddx r21,r22,r23
! 8c: 7c 20 0d ec dcbal r0,r1
! 90: 7c 26 3f ec dcbzl r6,r7
! 94: 7c 1f 00 7e dcbstep r31,r0
! 98: 7c 01 10 fe dcbfep r1,r2
! 9c: 7c 64 29 fe dcbtstep r3,r4,r5
! a0: 7c c7 42 7e dcbtep r6,r7,r8
! a4: 7c 0b 67 fe dcbzep r11,r12
! a8: 7c 00 06 26 tlbilx 0,0,r0
! ac: 7c 20 06 26 tlbilx 1,0,r0
! b0: 7c 62 1e 26 tlbilx 3,r2,r3
! b4: 7c 64 2e 26 tlbilx 3,r4,r5
diff -rc binutils-20090218/gas/testsuite/gas/ppc/e500mc.s binutils/gas/testsuite/gas/ppc/e500mc.s
*** binutils-20090218/gas/testsuite/gas/ppc/e500mc.s 2008-04-14 06:01:38.000000000 -0500
--- binutils/gas/testsuite/gas/ppc/e500mc.s 2009-02-18 12:43:57.000000000 -0600
***************
*** 9,14 ****
--- 9,18 ----
msgclr 13
msgsnd 14
wait
+ wait 0
+ wait 1
+ wait 2
+ wait 3
mdors
ehpriv
dsn 24, 25
diff -rc binutils-20090218/opcodes/ppc-opc.c binutils/opcodes/ppc-opc.c
*** binutils-20090218/opcodes/ppc-opc.c 2009-02-18 11:04:19.000000000 -0600
--- binutils/opcodes/ppc-opc.c 2009-02-18 12:57:04.000000000 -0600
***************
*** 312,317 ****
--- 312,318 ----
/* The LS field in an X (sync) form instruction. */
#define LS LIA + 1
+ #define WC LS
{ 0x3, 21, NULL, NULL, PPC_OPERAND_OPTIONAL },
/* The ME field in an M form instruction. */
***************
*** 3447,3453 ****
{"andc", XRC(31,60,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
{"andc.", XRC(31,60,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
! {"wait", X(31,62), 0xffffffff, E500MC, PPCNONE, {0}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC, PPCNONE, {RA, RB}},
--- 3448,3454 ----
{"andc", XRC(31,60,0), X_MASK, COM, PPCNONE, {RA, RS, RB}},
{"andc.", XRC(31,60,1), X_MASK, COM, PPCNONE, {RA, RS, RB}},
! {"wait", X(31,62), X_MASK, E500MC, PPCNONE, {WC}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC, PPCNONE, {RA, RB}},