Re: PATCH: Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX

[Sebastian Pop <sebastian dot pop at amd dot com>]

Hi,

On Tue, Dec 15, 2009 at 13:00, H.J. Lu <hongjiu.lu@intel.com> wrote:
> AVX spec says:
>
> ---
> For new AVX instructions where VEX.W has no defined function (typically
> these meant the combination of the opcode byte and VEX.mmmmm did not
> have any equivalent SSE functions), VEX.W is reserved as zero and setting
> to other than zero will cause instruction to #UD.
> ---
>
> I checked in this patch to handle the unused VEX.W bit. Sebastian,
> Quentin, you may want to check if FM4 and XOP insns should be updated.
>

For FMA4 and XOP with 4 and 3 operands, the VEX.W bit is used to
select between two modes of decoding the operands.  For the 2 operands
XOP insns, the VEX.mmmmm should be set to 11111, and VEX.W should be
clear, otherwise the insn is #UD.  So we should do something similar
to your patch only for the 2 operand XOP insns.

Sebastian Pop
--
AMD / Open Source Compiler Engineering / GNU Tools


> Thanks.
>
>
> H.J.
> ---
> 2009-12-15 ÂH.J. Lu Â<hongjiu.lu@intel.com>
>
> Â Â Â Â* i386-dis.c (USE_VEX_W_TABLE): New.
> Â Â Â Â(VEX_W_TABLE): Likewise.
> Â Â Â Â(VEX_W_XXX): Likewise.
> Â Â Â Â(vex_w_table): Likewise.
> Â Â Â Â(prefix_table): Use VEX_W_XXX.
> Â Â Â Â(vex_table): Likewise.
> Â Â Â Â(vex_len_table): Likewise.
> Â Â Â Â(mod_table): Likewise.
> Â Â Â Â(get_valid_dis386): Handle USE_VEX_W_TABLE.
>
> Â Â Â Â* i386-opc.tbl: Add VexW0 to AVX instructions where the VEX.W bit
> Â Â Â Âisn't used.
> Â Â Â Â* i386-tbl.h: Regenerated.
>