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[PATCH] Enhanced GAS validation for bad neon insns addressing
- From: Daniel Gutson <dgutson at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Fri, 25 Dec 2009 16:33:21 -0300
- Subject: [PATCH] Enhanced GAS validation for bad neon insns addressing
The attached patch adds some validations to avoid bad addressing modes
such as:
.globl foo
foo:
VLD1.8 {Q1}, R0
VSRI.8 Q0,Q1, #7
VST1.8 {Q0}, R0
BX LR
Note the missing [] around R0. It assembled fine (with -mfpu=neon), but:
00000000 <foo>:
0: f42f2a0f vld1.8 {d2-d3}, [pc]
4: f3890452 vsri.8 q0, q1, #7
8: f40f0a0f vst1.8 {d0-d1}, [pc]
c: e12fff1e bx lr
c: R_ARM_V4BX *ABS*
became [pc].
I tested this by running the ld, binutils, and gas testsuites, the
latter including a new testcase I added.
Please let me know if OK to commit.
Daniel.
ChangeLog:
2009-12-25 Daniel Gutson <dgutson@codesourcery.com>
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
--
Daniel Gutson
CodeSourcery
www.codesourcery.com
? neon_bad_addressing.patch
Index: gas/config/tc-arm.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-arm.c,v
retrieving revision 1.422
diff -u -p -r1.422 tc-arm.c
--- gas/config/tc-arm.c 21 Dec 2009 12:56:41 -0000 1.422
+++ gas/config/tc-arm.c 25 Dec 2009 19:25:47 -0000
@@ -14780,6 +14780,9 @@ do_neon_ld_dup (void)
static void
do_neon_ldx_stx (void)
{
+ if (inst.operands[1].isreg)
+ constraint (inst.operands[1].reg == REG_PC, BAD_PC);
+
switch (NEON_LANE (inst.operands[0].imm))
{
case NEON_INTERLEAVE_LANES:
Index: gas/testsuite/gas/arm/neon-addressing-bad.d
===================================================================
RCS file: gas/testsuite/gas/arm/neon-addressing-bad.d
diff -N gas/testsuite/gas/arm/neon-addressing-bad.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/neon-addressing-bad.d 25 Dec 2009 19:25:47 -0000
@@ -0,0 +1,3 @@
+# name: Bad operand in Advanced SIMD Neon instructions
+# as: -mfpu=neon
+# error-output: neon-addressing-bad.l
Index: gas/testsuite/gas/arm/neon-addressing-bad.l
===================================================================
RCS file: gas/testsuite/gas/arm/neon-addressing-bad.l
diff -N gas/testsuite/gas/arm/neon-addressing-bad.l
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/neon-addressing-bad.l 25 Dec 2009 19:25:47 -0000
@@ -0,0 +1,19 @@
+[^:]*: Assembler messages:
+[^:]*:3: Error: r15 not allowed here -- `vld1.8 {d0},1f'
+[^:]*:5: Error: r15 not allowed here -- `vld1.8 {D0},R0'
+[^:]*:6: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
+[^:]*:7: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
+[^:]*:8: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
+[^:]*:9: Error: r15 not allowed here -- `vst1.8 {D0},R0'
+[^:]*:10: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
+[^:]*:11: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
+[^:]*:12: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'
+[^:]*:14: Error: r15 not allowed here -- `vld1.8 {d0},2f'
+[^:]*:16: Error: r15 not allowed here -- `vld1.8 {D0},R0'
+[^:]*:17: Error: r15 not allowed here -- `vld1.8 {Q1},R0'
+[^:]*:18: Error: r15 not allowed here -- `vld1.8 {D0},\[PC\]'
+[^:]*:19: Error: r15 not allowed here -- `vld1.8 {D0},\[PC,#0\]'
+[^:]*:20: Error: r15 not allowed here -- `vst1.8 {D0},R0'
+[^:]*:21: Error: r15 not allowed here -- `vst1.8 {Q1},R0'
+[^:]*:22: Error: r15 not allowed here -- `vst1.8 {D0},\[PC\]'
+[^:]*:23: Error: r15 not allowed here -- `vst1.8 {D0},\[PC,#0\]'
Index: gas/testsuite/gas/arm/neon-addressing-bad.s
===================================================================
RCS file: gas/testsuite/gas/arm/neon-addressing-bad.s
diff -N gas/testsuite/gas/arm/neon-addressing-bad.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/arm/neon-addressing-bad.s 25 Dec 2009 19:25:47 -0000
@@ -0,0 +1,23 @@
+.syntax unified
+
+VLD1.8 {d0}, 1f
+1:
+VLD1.8 {D0}, R0
+VLD1.8 {Q1}, R0
+VLD1.8 {D0}, [PC]
+VLD1.8 {D0}, [PC, #0]
+VST1.8 {D0}, R0
+VST1.8 {Q1}, R0
+VST1.8 {D0}, [PC]
+VST1.8 {D0}, [PC, #0]
+.thumb
+VLD1.8 {d0}, 2f
+2:
+VLD1.8 {D0}, R0
+VLD1.8 {Q1}, R0
+VLD1.8 {D0}, [PC]
+VLD1.8 {D0}, [PC, #0]
+VST1.8 {D0}, R0
+VST1.8 {Q1}, R0
+VST1.8 {D0}, [PC]
+VST1.8 {D0}, [PC, #0]