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[PATCH ARM 4/6]: Architectural Extensions - Operating System Extensions
- From: Matthew Gretton-Dann <matthew dot gretton-dann at arm dot com>
- To: binutils at sourceware dot org
- Cc: Richard Earnshaw <Richard dot Earnshaw at arm dot com>
- Date: Thu, 23 Sep 2010 10:21:33 +0100
- Subject: [PATCH ARM 4/6]: Architectural Extensions - Operating System Extensions
- References: <1285232920.17086.138.camel@e102319-lin.cambridge.arm.com>
All,
The attached patch adds support for the Operating System Extensions to
v6-M, under the 'os' extension, and also as -march=armv6s-m.
The features of this patch are:
* Add the 'os' architectural extension.
* In v6-M only allow the SVC instruction if we also have the OS
extension.
* Ensure we emit the correct build attributes for the different
varieties of v6-M.
Proposed ChangeLogs:
gas/ChangeLog:
2010-09-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (arm_ext_v6m): Add.
(arm_ext_m): Add support for OS extension.
(arm_ext_os): Add.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
gas/testsuite/ChangeLog:
2010-09-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/archv6s-m-bad.d: New test.
* gas/arm/archv6s-m-bad.l: Likewise.
* gas/arm/archv6s-m.d: Likewise.
* gas/arm/archv6s-m.s: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
include/opcode/ChangeLog:
2010-09-22 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm.h (ARM_EXT_OS): Add.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
Thanks,
Matt
--
Matthew Gretton-Dann
Principal Engineer - PDSW Tools
ARM Ltd
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index c6fa61f..76013ed 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -185,6 +185,7 @@ static const arm_feature_set arm_ext_v5j = ARM_FEATURE (ARM_EXT_V5J, 0);
static const arm_feature_set arm_ext_v6 = ARM_FEATURE (ARM_EXT_V6, 0);
static const arm_feature_set arm_ext_v6k = ARM_FEATURE (ARM_EXT_V6K, 0);
static const arm_feature_set arm_ext_v6t2 = ARM_FEATURE (ARM_EXT_V6T2, 0);
+static const arm_feature_set arm_ext_v6m = ARM_FEATURE (ARM_EXT_V6M, 0);
static const arm_feature_set arm_ext_v6_notm = ARM_FEATURE (ARM_EXT_V6_NOTM, 0);
static const arm_feature_set arm_ext_v6_dsp = ARM_FEATURE (ARM_EXT_V6_DSP, 0);
static const arm_feature_set arm_ext_barrier = ARM_FEATURE (ARM_EXT_BARRIER, 0);
@@ -195,9 +196,10 @@ static const arm_feature_set arm_ext_v7a = ARM_FEATURE (ARM_EXT_V7A, 0);
static const arm_feature_set arm_ext_v7r = ARM_FEATURE (ARM_EXT_V7R, 0);
static const arm_feature_set arm_ext_v7m = ARM_FEATURE (ARM_EXT_V7M, 0);
static const arm_feature_set arm_ext_m =
- ARM_FEATURE (ARM_EXT_V6M | ARM_EXT_V7M, 0);
+ ARM_FEATURE (ARM_EXT_V6M | ARM_EXT_OS | ARM_EXT_V7M, 0);
static const arm_feature_set arm_ext_mp = ARM_FEATURE (ARM_EXT_MP, 0);
static const arm_feature_set arm_ext_sec = ARM_FEATURE (ARM_EXT_SEC, 0);
+static const arm_feature_set arm_ext_os = ARM_FEATURE (ARM_EXT_OS, 0);
static const arm_feature_set arm_arch_any = ARM_ANY;
static const arm_feature_set arm_arch_full = ARM_FEATURE (-1, -1);
@@ -11519,6 +11521,15 @@ do_t_sxth (void)
static void
do_t_swi (void)
{
+ /* We have to do the following check manually as ARM_EXT_OS only applies
+ to ARM_EXT_V6M. */
+ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6m))
+ {
+ if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os))
+ as_bad (_("SVC is not permitted on this architecture"));
+ ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, arm_ext_os);
+ }
+
inst.reloc.type = BFD_RELOC_ARM_SWI;
}
@@ -22405,8 +22416,8 @@ static const struct arm_cpu_option_table arm_cpus[] =
"Cortex-R4F"},
{"cortex-m4", ARM_ARCH_V7EM, FPU_NONE, "Cortex-M4"},
{"cortex-m3", ARM_ARCH_V7M, FPU_NONE, "Cortex-M3"},
- {"cortex-m1", ARM_ARCH_V6M, FPU_NONE, "Cortex-M1"},
- {"cortex-m0", ARM_ARCH_V6M, FPU_NONE, "Cortex-M0"},
+ {"cortex-m1", ARM_ARCH_V6SM, FPU_NONE, "Cortex-M1"},
+ {"cortex-m0", ARM_ARCH_V6SM, FPU_NONE, "Cortex-M0"},
/* ??? XSCALE is really an architecture. */
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL},
/* ??? iwmmxt is not a processor. */
@@ -22456,6 +22467,7 @@ static const struct arm_arch_option_table arm_archs[] =
{"armv6zt2", ARM_ARCH_V6ZT2, FPU_ARCH_VFP},
{"armv6zkt2", ARM_ARCH_V6ZKT2, FPU_ARCH_VFP},
{"armv6-m", ARM_ARCH_V6M, FPU_ARCH_VFP},
+ {"armv6s-m", ARM_ARCH_V6SM, FPU_ARCH_VFP},
{"armv7", ARM_ARCH_V7, FPU_ARCH_VFP},
/* The official spelling of the ARMv7 profile variants is the dashed form.
Accept the non-dashed form for compatibility with old toolchains. */
@@ -22489,6 +22501,8 @@ static const struct arm_option_extension_value_table arm_extensions[] =
{"maverick", ARM_FEATURE (0, ARM_CEXT_MAVERICK), ARM_ANY},
{"mp", ARM_FEATURE (ARM_EXT_MP, 0),
ARM_FEATURE (ARM_EXT_V7A | ARM_EXT_V7R, 0)},
+ {"os", ARM_FEATURE (ARM_EXT_OS, 0),
+ ARM_FEATURE (ARM_EXT_V6M, 0)},
{"sec", ARM_FEATURE (ARM_EXT_SEC, 0),
ARM_FEATURE (ARM_EXT_V6K | ARM_EXT_V7A, 0)},
{"xscale", ARM_FEATURE (0, ARM_CEXT_XSCALE), ARM_ANY},
@@ -23014,6 +23028,7 @@ static const cpu_arch_ver_table cpu_arch_ver[] =
{9, ARM_ARCH_V6K},
{7, ARM_ARCH_V6Z},
{11, ARM_ARCH_V6M},
+ {12, ARM_ARCH_V6SM},
{8, ARM_ARCH_V6T2},
{10, ARM_ARCH_V7A},
{10, ARM_ARCH_V7R},
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index c8e535d..0106a8d 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -153,6 +153,7 @@ The following extensions are currently supported:
@code{iwmmxt2},
@code{maverick},
@code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures),
+@code{os} (Operating System for v6M architecture),
@code{sec} (Security Extensions for v6K and v7-A architectures),
and
@code{xscale}.
@@ -183,6 +184,8 @@ names are recognized:
@code{armv6k},
@code{armv6z},
@code{armv6zk},
+@code{armv6-m},
+@code{armv6s-m},
@code{armv7},
@code{armv7-a},
@code{armv7-r},
diff --git a/gas/testsuite/gas/arm/archv6s-m-bad.d b/gas/testsuite/gas/arm/archv6s-m-bad.d
new file mode 100644
index 0000000..d50d34f
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv6s-m-bad.d
@@ -0,0 +1,4 @@
+#name: Valid v6S-M, invalid v6-M
+#as: -march=armv6-m
+#source: archv6s-m.s
+#error-output: archv6s-m-bad.l
diff --git a/gas/testsuite/gas/arm/archv6s-m-bad.l b/gas/testsuite/gas/arm/archv6s-m-bad.l
new file mode 100644
index 0000000..e17420b
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv6s-m-bad.l
@@ -0,0 +1,2 @@
+[^:]*: Assembler messages:
+[^:]*:7: Error: SVC is not permitted on this architecture
diff --git a/gas/testsuite/gas/arm/archv6s-m.d b/gas/testsuite/gas/arm/archv6s-m.d
new file mode 100644
index 0000000..dd7f12c
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv6s-m.d
@@ -0,0 +1,9 @@
+#name: Valid v6S-M
+#as: -march=armv6s-m
+#objdump: -dr --prefix-addresses --show-raw-insn
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+0[0-9a-f]+ <[^>]+> df00 svc 0
+0[0-9a-f]+ <[^>]+> 46c0 nop.+
diff --git a/gas/testsuite/gas/arm/archv6s-m.s b/gas/testsuite/gas/arm/archv6s-m.s
new file mode 100644
index 0000000..6cd5653
--- /dev/null
+++ b/gas/testsuite/gas/arm/archv6s-m.s
@@ -0,0 +1,8 @@
+ .syntax unified
+ .thumb
+ .text
+ .align 2
+ .global foo
+foo:
+ svc #0
+ nop
diff --git a/gas/testsuite/gas/arm/attr-march-armv6-m+os.d b/gas/testsuite/gas/arm/attr-march-armv6-m+os.d
new file mode 100644
index 0000000..7dd7a73
--- /dev/null
+++ b/gas/testsuite/gas/arm/attr-march-armv6-m+os.d
@@ -0,0 +1,14 @@
+# name: attributes for -march=armv6-m+os
+# source: blank.s
+# as: -march=armv6-m+os
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi
+
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "6-M"
+ Tag_CPU_arch: v6S-M
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
diff --git a/gas/testsuite/gas/arm/attr-march-armv6s-m.d b/gas/testsuite/gas/arm/attr-march-armv6s-m.d
new file mode 100644
index 0000000..36ac3c8
--- /dev/null
+++ b/gas/testsuite/gas/arm/attr-march-armv6s-m.d
@@ -0,0 +1,14 @@
+# name: attributes for -march=armv6-m
+# source: blank.s
+# as: -march=armv6-m
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi
+
+Attribute Section: aeabi
+File Attributes
+ Tag_CPU_name: "6-M"
+ Tag_CPU_arch: v6-M
+ Tag_CPU_arch_profile: Microcontroller
+ Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 8e64ac3..4c9324d 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -51,6 +51,7 @@
not in v7-M. */
#define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */
#define ARM_EXT_SEC 0x10000000 /* Security extensions. */
+#define ARM_EXT_OS 0x20000000 /* OS Extensions. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
@@ -114,6 +115,7 @@
#define ARM_AEXT_V6M \
((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
& ~(ARM_AEXT_NOTM))
+#define ARM_AEXT_V6SM (ARM_AEXT_V6M | ARM_EXT_OS)
#define ARM_AEXT_V7M \
((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
& ~(ARM_AEXT_NOTM))
@@ -199,6 +201,7 @@
#define ARM_ARCH_V6ZT2 ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
#define ARM_ARCH_V6M ARM_FEATURE (ARM_AEXT_V6M, 0)
+#define ARM_ARCH_V6SM ARM_FEATURE (ARM_AEXT_V6SM, 0)
#define ARM_ARCH_V7 ARM_FEATURE (ARM_AEXT_V7, 0)
#define ARM_ARCH_V7A ARM_FEATURE (ARM_AEXT_V7A, 0)
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)