[PATCH 00/15] MIPS: LD macro and related fixes

["Maciej W. Rozycki" <macro at linux-mips dot org>]

Hi,

 I have not heard back from the original bug submitter, but I have finally 
found some time to get back to the issue discussed here:

http://sourceware.org/ml/binutils/2010-05/msg00246.html

I have now implemented the thought I had back then, that is that we should 
improve our test coverage for basic load/store operations as there are 
subtle differences throughout the family of macros and instructions 
involved.  Similar operations may expand to dissimilar sequences of 
hardware operations based on whether a load or store is performed, whether 
a CPU or an FPU register is addressed, then endianness, the ABI involved 
and even the executable format.

 This is a series of patches to clean up and extend the "ld" test case, to 
cover six operations, namely LD, SD, L.D, S.D, LDC1 and SDC1, i.e. ones in 
the doubleword family.  Bitrotten pieces have either been revived or 
discarded, bug fixes to actual code added as discovered on the way, some 
test framework improvements made and the whole set has been painstakingly 
regression-tested for the mips-linux, mips64-linux, mipstx39-elf, 
mipsisa64-elf and mips-ecoff targets as well as their respective 
little-endian counterparts.

 Specific details will be given alongside each submission and any feedback 
or (especially ;) ) approval will be appreciated.  Further encouragement 
may convince me to follow with other test cases, like these covering word 
or byte transfers, time permitting as usually.

  Maciej