[PATCH] MIPS/GAS: Warn about $at in the pair addressed by o32 LD/SD

["Maciej W. Rozycki" <macro at linux-mips dot org>]

Hi,

 Hopefully the last one:

$ cat ldsd-at.s
	.set	at=$k1
	lw	$k1, ($a0)
	ld	$k0, ($a0)
	sw	$k1, ($a0)
	sd	$k0, ($a0)
$ mips-linux-as -o ldsd-at.o ldsd-at.s
ldsd-at.s: Assembler messages:
ldsd-at.s:2: Warning: used $27 with ".set at=$27"
ldsd-at.s:4: Warning: used $27 with ".set at=$27"
$ mips-linux-objdump -d ldsd-at.o

ldsd-at.o:     file format elf32-tradbigmips


Disassembly of section .text:

00000000 <.text>:
   0:	8c9b0000 	lw	k1,0(a0)
   4:	8c9a0000 	lw	k0,0(a0)
   8:	8c9b0004 	lw	k1,4(a0)
   c:	00000000 	nop
  10:	ac9b0000 	sw	k1,0(a0)
  14:	ac9a0000 	sw	k0,0(a0)
  18:	ac9b0004 	sw	k1,4(a0)
  1c:	00000000 	nop

Hmm...  How about this:

$ mips-linux-as -o ldsd-at.o ldsd-at.s
ldsd-at.s: Assembler messages:
ldsd-at.s:2: Warning: used $27 with ".set at=$27"
ldsd-at.s:3: Warning: used $27 with ".set at=$27"
ldsd-at.s:4: Warning: used $27 with ".set at=$27"
ldsd-at.s:5: Warning: used $27 with ".set at=$27"
$ 

?

 Fixed thus and regression tested for mips-linux, mips64-linux, 
mipstx39-elf, mipsisa64-elf and mips-ecoff targets and their little-endian 
counterparts.

2010-10-17  Maciej W. Rozycki  <macro@linux-mips.org>

	include/opcode/
	* mips.h (INSN2_M_GP_D): New macro.

	opcodes/
	* mips-opc.c (M_GP_D): New macro.
	(mips_builtin_opcodes): Use it for "ld" and "sd".

	gas/
	* config/tc-mips.c (mips_ip): Also warn about $at used as the
	implicit second register of a general register pair.

 OK?

  Maciej

binutils-2.20.51-20100925-mips-gas-ldsd-at.patch
Index: binutils-2.20.51/gas/config/tc-mips.c
===================================================================
--- binutils-2.20.51.orig/gas/config/tc-mips.c
+++ binutils-2.20.51/gas/config/tc-mips.c
@@ -9515,13 +9515,19 @@ do_msbd:
 	      else
 		{
 		  ok = reg_lookup (&s, RTYPE_NUM | RTYPE_GP, &regno);
-		  if (regno == AT && mips_opts.at)
+		  if ((regno == AT
+		      || (regno + 1 == AT
+			  && insn->pinfo == INSN_MACRO
+			  && (insn->pinfo2 & INSN2_M_GP_D) != 0
+			  && *args == 't'
+			  && !HAVE_64BIT_GPRS))
+		      && mips_opts.at)
 		    {
 		      if (mips_opts.at == ATREG)
 			as_warn (_("used $at without \".set noat\""));
 		      else
 			as_warn (_("used $%u with \".set at=$%u\""),
-				 regno, mips_opts.at);
+				 AT, mips_opts.at);
 		    }
 		}
 	      if (ok)
Index: binutils-2.20.51/include/opcode/mips.h
===================================================================
--- binutils-2.20.51.orig/include/opcode/mips.h
+++ binutils-2.20.51/include/opcode/mips.h
@@ -503,6 +503,9 @@ struct mips_opcode
    only be set for macros.  For instructions, FP_D in pinfo carries the
    same information.  */
 #define INSN2_M_FP_D		    0x00000010
+/* Macro uses double-precision integer data on 32-bit targets.  This should
+   only be set for macros.  */
+#define INSN2_M_GP_D		    0x00000020
 
 /* Masks used to mark instructions to indicate which MIPS ISA level
    they were introduced in.  INSN_ISA_MASK masks an enumeration that
Index: binutils-2.20.51/opcodes/mips-opc.c
===================================================================
--- binutils-2.20.51.orig/opcodes/mips-opc.c
+++ binutils-2.20.51/opcodes/mips-opc.c
@@ -80,6 +80,7 @@
 
 #define WR_MACC INSN2_WRITE_MDMX_ACC
 #define RD_MACC INSN2_READ_MDMX_ACC
+#define M_GP_D	INSN2_M_GP_D
 
 #define I1	INSN_ISA1
 #define I2	INSN_ISA2
@@ -744,9 +745,9 @@ const struct mips_opcode mips_builtin_op
 {"lbu",     "t,A(b)",	0,    (int) M_LBU_AB,	INSN_MACRO,		0,		I1	},
 {"lca",     "t,A(b)",	0,    (int) M_LCA_AB,	INSN_MACRO,		0,		I1	},
 /* The macro has to be first to handle o32 correctly.  */
-{"ld",      "t,o(b)",	0,    (int) M_LD_OB,	INSN_MACRO,		0,		I1	},
+{"ld",      "t,o(b)",	0,    (int) M_LD_OB,	INSN_MACRO,		M_GP_D,		I1	},
 {"ld",      "t,o(b)",   0xdc000000, 0xfc000000, WR_t|RD_b,		0,		I3	},
-{"ld",      "t,A(b)",	0,    (int) M_LD_AB,	INSN_MACRO,		0,		I1	},
+{"ld",      "t,A(b)",	0,    (int) M_LD_AB,	INSN_MACRO,		M_GP_D,		I1	},
 {"ldaddw",  "t,b",	0x70000010, 0xfc00ffff,	SM|RD_t|WR_t|RD_b,	0,		XLR	},
 {"ldaddwu", "t,b",	0x70000011, 0xfc00ffff,	SM|RD_t|WR_t|RD_b,	0,		XLR	},
 {"ldaddd",  "t,b",	0x70000012, 0xfc00ffff,	SM|RD_t|WR_t|RD_b,	0,		XLR	},
@@ -1175,9 +1176,9 @@ const struct mips_opcode mips_builtin_op
 {"scd",	    "t,o(b)",	0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,	0,		I3	},
 {"scd",	    "t,A(b)",	0,    (int) M_SCD_AB,	INSN_MACRO,		0,		I3	},
 /* The macro has to be first to handle o32 correctly.  */
-{"sd",      "t,o(b)",	0,    (int) M_SD_OB,	INSN_MACRO,		0,		I1	},
+{"sd",      "t,o(b)",	0,    (int) M_SD_OB,	INSN_MACRO,		M_GP_D,		I1	},
 {"sd",      "t,o(b)",	0xfc000000, 0xfc000000,	SM|RD_t|RD_b,		0,		I3	},
-{"sd",      "t,A(b)",	0,    (int) M_SD_AB,	INSN_MACRO,		0,		I1	},
+{"sd",      "t,A(b)",	0,    (int) M_SD_AB,	INSN_MACRO,		M_GP_D,		I1	},
 {"sdbbp",   "",		0x0000000e, 0xffffffff,	TRAP,           	0,		G2	},
 {"sdbbp",   "c",	0x0000000e, 0xfc00ffff,	TRAP,			0,		G2	},
 {"sdbbp",   "c,q",	0x0000000e, 0xfc00003f,	TRAP,			0,		G2	},