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PowerPC64 plt call stubs
- From: Alan Modra <amodra at gmail dot com>
- To: binutils at sourceware dot org
- Date: Thu, 14 Jul 2011 12:58:35 +0930
- Subject: PowerPC64 plt call stubs
This makes plt call stubs omit the load of r11. As far as I know,
there isn't any reason to ever load r11 when making a call via the
PLT, so the default is to omit. Committed.
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add plt_static_chain.
(build_plt_stub): Add plt_static_chain param, don't load r11 if false.
(build_tls_get_addr_stub): Likewise.
(ppc_build_one_stub): Update calls to above.
(ppc_size_one_stub): Adjust stub size.
(ppc64_elf_size_stubs): Add plt_static_chain param, save to htab.
* elf64-ppc.h (ppc64_elf_size_stubs): Update prototype.
ld/
* emultempl/ppc64elf.em (plt_static_chain): New var.
(gld${EMULATION_NAME}_after_allocation): Pass to ppc64_elf_size_stubs.
(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_LONGOPTS,
PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Handle
--plt-static-chain and --no-plt-static-chain.
ld/testsuite/
* ld-powerpc/tlsexe.d, * ld-powerpc/tlsexe.g. *ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g,
* ld-powerpc/tlsexetoc.r, * ld-powerpc/tlsso.d,
* ld-powerpc/tlstocso.d: Update for plt stub change.
Index: bfd/elf64-ppc.c
===================================================================
RCS file: /cvs/src/src/bfd/elf64-ppc.c,v
retrieving revision 1.355
diff -u -p -r1.355 elf64-ppc.c
--- bfd/elf64-ppc.c 1 Jul 2011 07:49:08 -0000 1.355
+++ bfd/elf64-ppc.c 14 Jul 2011 02:52:05 -0000
@@ -3734,6 +3734,9 @@ struct ppc_link_hash_table
/* Number of stubs against global syms. */
unsigned long stub_globals;
+ /* Set if PLT call stubs should load r11. */
+ unsigned int plt_static_chain:1;
+
/* Set if we should emit symbols for stubs. */
unsigned int emit_stub_syms:1;
@@ -9253,7 +9256,8 @@ ppc_type_of_stub (asection *input_sec,
/* Build a .plt call stub. */
static inline bfd_byte *
-build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r)
+build_plt_stub (bfd *obfd, bfd_byte *p, int offset, Elf_Internal_Rela *r,
+ bfd_boolean plt_static_chain)
{
#define PPC_LO(v) ((v) & 0xffff)
#define PPC_HI(v) (((v) >> 16) & 0xffff)
@@ -9286,14 +9290,15 @@ build_plt_stub (bfd *obfd, bfd_byte *p,
bfd_put_32 (obfd, ADDIS_R12_R2 | PPC_HA (offset), p), p += 4;
bfd_put_32 (obfd, STD_R2_40R1, p), p += 4;
bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset), p), p += 4;
- if (PPC_HA (offset + 16) != PPC_HA (offset))
+ if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset))
{
bfd_put_32 (obfd, ADDI_R12_R12 | PPC_LO (offset), p), p += 4;
offset = 0;
}
bfd_put_32 (obfd, MTCTR_R11, p), p += 4;
bfd_put_32 (obfd, LD_R2_0R12 | PPC_LO (offset + 8), p), p += 4;
- bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset + 16), p), p += 4;
+ if (plt_static_chain)
+ bfd_put_32 (obfd, LD_R11_0R12 | PPC_LO (offset + 16), p), p += 4;
bfd_put_32 (obfd, BCTR, p), p += 4;
}
else
@@ -9320,13 +9325,14 @@ build_plt_stub (bfd *obfd, bfd_byte *p,
}
bfd_put_32 (obfd, STD_R2_40R1, p), p += 4;
bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset), p), p += 4;
- if (PPC_HA (offset + 16) != PPC_HA (offset))
+ if (PPC_HA (offset + 8 + 8 * plt_static_chain) != PPC_HA (offset))
{
bfd_put_32 (obfd, ADDI_R2_R2 | PPC_LO (offset), p), p += 4;
offset = 0;
}
bfd_put_32 (obfd, MTCTR_R11, p), p += 4;
- bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset + 16), p), p += 4;
+ if (plt_static_chain)
+ bfd_put_32 (obfd, LD_R11_0R2 | PPC_LO (offset + 16), p), p += 4;
bfd_put_32 (obfd, LD_R2_0R2 | PPC_LO (offset + 8), p), p += 4;
bfd_put_32 (obfd, BCTR, p), p += 4;
}
@@ -9351,7 +9357,7 @@ build_plt_stub (bfd *obfd, bfd_byte *p,
static inline bfd_byte *
build_tls_get_addr_stub (bfd *obfd, bfd_byte *p, int offset,
- Elf_Internal_Rela *r)
+ Elf_Internal_Rela *r, bfd_boolean plt_static_chain)
{
bfd_put_32 (obfd, LD_R11_0R3 + 0, p), p += 4;
bfd_put_32 (obfd, LD_R12_0R3 + 8, p), p += 4;
@@ -9365,7 +9371,7 @@ build_tls_get_addr_stub (bfd *obfd, bfd_
if (r != NULL)
r[0].r_offset += 9 * 4;
- p = build_plt_stub (obfd, p, offset, r);
+ p = build_plt_stub (obfd, p, offset, r, plt_static_chain);
bfd_put_32 (obfd, BCTRL, p - 4);
bfd_put_32 (obfd, LD_R11_0R1 + 32, p), p += 4;
@@ -9795,9 +9801,11 @@ ppc_build_one_stub (struct bfd_hash_entr
&& (stub_entry->h == htab->tls_get_addr_fd
|| stub_entry->h == htab->tls_get_addr)
&& !htab->no_tls_get_addr_opt)
- p = build_tls_get_addr_stub (htab->stub_bfd, loc, off, r);
+ p = build_tls_get_addr_stub (htab->stub_bfd, loc, off, r,
+ htab->plt_static_chain);
else
- p = build_plt_stub (htab->stub_bfd, loc, off, r);
+ p = build_plt_stub (htab->stub_bfd, loc, off, r,
+ htab->plt_static_chain);
size = p - loc;
break;
@@ -9884,6 +9892,8 @@ ppc_size_one_stub (struct bfd_hash_entry
- htab->stub_group[stub_entry->id_sec->id].toc_off);
size = PLT_CALL_STUB_SIZE;
+ if (!htab->plt_static_chain)
+ size -= 4;
if (PPC_HA (off) == 0)
size -= 4;
if (PPC_HA (off + 16) != PPC_HA (off))
@@ -10823,7 +10833,8 @@ group_sections (struct ppc_link_hash_tab
instruction. */
bfd_boolean
-ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size)
+ppc64_elf_size_stubs (struct bfd_link_info *info, bfd_signed_vma group_size,
+ bfd_boolean plt_static_chain)
{
bfd_size_type stub_group_size;
bfd_boolean stubs_always_before_branch;
@@ -10832,6 +10843,7 @@ ppc64_elf_size_stubs (struct bfd_link_in
if (htab == NULL)
return FALSE;
+ htab->plt_static_chain = plt_static_chain;
stubs_always_before_branch = group_size < 0;
if (group_size < 0)
stub_group_size = -group_size;
Index: bfd/elf64-ppc.h
===================================================================
RCS file: /cvs/src/src/bfd/elf64-ppc.h,v
retrieving revision 1.30
diff -u -p -r1.30 elf64-ppc.h
--- bfd/elf64-ppc.h 15 Mar 2010 01:59:57 -0000 1.30
+++ bfd/elf64-ppc.h 14 Jul 2011 02:52:05 -0000
@@ -1,5 +1,5 @@
/* PowerPC64-specific support for 64-bit ELF.
- Copyright 2002, 2003, 2004, 2005, 2007, 2008, 2010
+ Copyright 2002, 2003, 2004, 2005, 2007, 2008, 2010, 2011
Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -49,7 +49,7 @@ bfd_boolean ppc64_elf_check_init_fini
bfd_boolean ppc64_elf_next_input_section
(struct bfd_link_info *, asection *);
bfd_boolean ppc64_elf_size_stubs
- (struct bfd_link_info *, bfd_signed_vma);
+ (struct bfd_link_info *, bfd_signed_vma, bfd_boolean);
bfd_boolean ppc64_elf_build_stubs
(bfd_boolean, struct bfd_link_info *, char **);
void ppc64_elf_restore_symbols
Index: ld/emultempl/ppc64elf.em
===================================================================
RCS file: /cvs/src/src/ld/emultempl/ppc64elf.em,v
retrieving revision 1.73
diff -u -p -r1.73 ppc64elf.em
--- ld/emultempl/ppc64elf.em 14 Jan 2011 12:37:17 -0000 1.73
+++ ld/emultempl/ppc64elf.em 14 Jul 2011 02:52:47 -0000
@@ -61,6 +61,9 @@ static int no_multi_toc = 0;
/* Whether to sort input toc and got sections. */
static int no_toc_sort = 0;
+/* Set if PLT call stubs should load r11. */
+static int plt_static_chain = 0;
+
/* Whether to emit symbols for stubs. */
static int emit_stub_syms = -1;
@@ -500,7 +503,7 @@ gld${EMULATION_NAME}_after_allocation (v
einfo ("%P: .init/.fini fragments use differing TOC pointers\n");
/* Call into the BFD backend to do the real work. */
- if (!ppc64_elf_size_stubs (&link_info, group_size))
+ if (!ppc64_elf_size_stubs (&link_info, group_size, plt_static_chain))
einfo ("%X%P: can not size stub section: %E\n");
}
}
@@ -651,7 +654,9 @@ fi
#
PARSE_AND_LIST_PROLOGUE='
#define OPTION_STUBGROUP_SIZE 301
-#define OPTION_STUBSYMS (OPTION_STUBGROUP_SIZE + 1)
+#define OPTION_PLT_STATIC_CHAIN (OPTION_STUBGROUP_SIZE + 1)
+#define OPTION_NO_PLT_STATIC_CHAIN (OPTION_PLT_STATIC_CHAIN + 1)
+#define OPTION_STUBSYMS (OPTION_NO_PLT_STATIC_CHAIN + 1)
#define OPTION_NO_STUBSYMS (OPTION_STUBSYMS + 1)
#define OPTION_DOTSYMS (OPTION_NO_STUBSYMS + 1)
#define OPTION_NO_DOTSYMS (OPTION_DOTSYMS + 1)
@@ -666,6 +671,8 @@ PARSE_AND_LIST_PROLOGUE='
PARSE_AND_LIST_LONGOPTS='
{ "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
+ { "plt-static-chain", no_argument, NULL, OPTION_PLT_STATIC_CHAIN },
+ { "no-plt-static-chain", no_argument, NULL, OPTION_NO_PLT_STATIC_CHAIN },
{ "emit-stub-syms", no_argument, NULL, OPTION_STUBSYMS },
{ "no-emit-stub-syms", no_argument, NULL, OPTION_NO_STUBSYMS },
{ "dotsyms", no_argument, NULL, OPTION_DOTSYMS },
@@ -691,6 +698,12 @@ PARSE_AND_LIST_OPTIONS='
choose suitable defaults.\n"
));
fprintf (file, _("\
+ --plt-static-chain PLT call stubs should load r11.\n"
+ ));
+ fprintf (file, _("\
+ --no-plt-static-chain PLT call stubs should not load r11. (default)\n"
+ ));
+ fprintf (file, _("\
--emit-stub-syms Label linker stubs with a symbol.\n"
));
fprintf (file, _("\
@@ -739,6 +752,14 @@ PARSE_AND_LIST_ARGS_CASES='
}
break;
+ case OPTION_PLT_STATIC_CHAIN:
+ plt_static_chain = 1;
+ break;
+
+ case OPTION_NO_PLT_STATIC_CHAIN:
+ plt_static_chain = 0;
+ break;
+
case OPTION_STUBSYMS:
emit_stub_syms = 1;
break;
Index: ld/testsuite/ld-powerpc/tlsexe.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexe.d,v
retrieving revision 1.9
diff -u -p -r1.9 tlsexe.d
--- ld/testsuite/ld-powerpc/tlsexe.d 2 Oct 2009 15:00:30 -0000 1.9
+++ ld/testsuite/ld-powerpc/tlsexe.d 14 Jul 2011 02:52:49 -0000
@@ -21,7 +21,6 @@ Disassembly of section \.text:
.* f8 41 00 28 std r2,40\(r1\)
.* e9 62 80 48 ld r11,-32696\(r2\)
.* 7d 69 03 a6 mtctr r11
-.* e9 62 80 58 ld r11,-32680\(r2\)
.* e8 42 80 50 ld r2,-32688\(r2\)
.* 4e 80 04 21 bctrl
.* e9 61 00 20 ld r11,32\(r1\)
@@ -34,7 +33,7 @@ Disassembly of section \.text:
.* 60 00 00 00 nop
.* 7c 63 6a 14 add r3,r3,r13
.* 38 62 80 18 addi r3,r2,-32744
-.* 4b ff ff a5 bl .*
+.* 4b ff ff a9 bl .*
.* 60 00 00 00 nop
.* 3c 6d 00 00 addis r3,r13,0
.* 60 00 00 00 nop
@@ -68,7 +67,6 @@ Disassembly of section \.text:
.* e9 4d 90 2a lwa r10,-28632\(r13\)
.* 3d 2d 00 00 addis r9,r13,0
.* a9 49 90 30 lha r10,-28624\(r9\)
-.* 60 00 00 00 nop
.* 00 00 00 00 .*
.* 00 01 02 00 .*
.* <__glink_PLTresolve>:
Index: ld/testsuite/ld-powerpc/tlsexe.g
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexe.g,v
retrieving revision 1.8
diff -u -p -r1.8 tlsexe.g
--- ld/testsuite/ld-powerpc/tlsexe.g 21 Sep 2009 11:51:02 -0000 1.8
+++ ld/testsuite/ld-powerpc/tlsexe.g 14 Jul 2011 02:52:49 -0000
@@ -7,6 +7,6 @@
.*: +file format elf64-powerpc
Contents of section \.got:
-.* 00000000 10018618 ffffffff ffff8018 .*
+.* 00000000 10018610 ffffffff ffff8018 .*
.* 00000000 00000000 00000000 00000000 .*
.* 00000000 00000000 00000000 00000000 .*
Index: ld/testsuite/ld-powerpc/tlsexe.r
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexe.r,v
retrieving revision 1.26
diff -u -p -r1.26 tlsexe.r
--- ld/testsuite/ld-powerpc/tlsexe.r 20 Jul 2010 14:08:32 -0000 1.26
+++ ld/testsuite/ld-powerpc/tlsexe.r 14 Jul 2011 02:52:49 -0000
@@ -16,7 +16,7 @@ Section Headers:
+\[[ 0-9]+\] \.dynstr +.*
+\[[ 0-9]+\] \.rela\.dyn +.*
+\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS .* 0+130 0+ +AX +0 +0 +8
+ +\[[ 0-9]+\] \.text +PROGBITS .* 0+128 0+ +AX +0 +0 +8
+\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
+\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
+\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
Index: ld/testsuite/ld-powerpc/tlsexetoc.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexetoc.d,v
retrieving revision 1.10
diff -u -p -r1.10 tlsexetoc.d
--- ld/testsuite/ld-powerpc/tlsexetoc.d 2 Oct 2009 15:00:30 -0000 1.10
+++ ld/testsuite/ld-powerpc/tlsexetoc.d 14 Jul 2011 02:52:49 -0000
@@ -21,7 +21,6 @@ Disassembly of section \.text:
.* f8 41 00 28 std r2,40\(r1\)
.* e9 62 80 70 ld r11,-32656\(r2\)
.* 7d 69 03 a6 mtctr r11
-.* e9 62 80 80 ld r11,-32640\(r2\)
.* e8 42 80 78 ld r2,-32648\(r2\)
.* 4e 80 04 21 bctrl
.* e9 61 00 20 ld r11,32\(r1\)
@@ -31,10 +30,10 @@ Disassembly of section \.text:
.* <_start>:
.* 38 62 80 08 addi r3,r2,-32760
-.* 4b ff ff b1 bl .*
+.* 4b ff ff b5 bl .*
.* 60 00 00 00 nop
.* 38 62 80 18 addi r3,r2,-32744
-.* 4b ff ff a5 bl .*
+.* 4b ff ff a9 bl .*
.* 60 00 00 00 nop
.* 3c 6d 00 00 addis r3,r13,0
.* 60 00 00 00 nop
@@ -52,7 +51,6 @@ Disassembly of section \.text:
.* 89 4d 90 60 lbz r10,-28576\(r13\)
.* 3d 2d 00 00 addis r9,r13,0
.* 99 49 90 68 stb r10,-28568\(r9\)
-.* 60 00 00 00 nop
.* 00 00 00 00 .*
.* 00 01 02 28 .*
.* <__glink_PLTresolve>:
Index: ld/testsuite/ld-powerpc/tlsexetoc.g
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexetoc.g,v
retrieving revision 1.8
diff -u -p -r1.8 tlsexetoc.g
--- ld/testsuite/ld-powerpc/tlsexetoc.g 21 Sep 2009 11:51:02 -0000 1.8
+++ ld/testsuite/ld-powerpc/tlsexetoc.g 14 Jul 2011 02:52:49 -0000
@@ -7,7 +7,7 @@
.*: +file format elf64-powerpc
Contents of section \.got:
-.* 00000000 100185b0 00000000 00000000 .*
+.* 00000000 100185a8 00000000 00000000 .*
.* 00000000 00000000 00000000 00000000 .*
.* 00000000 00000000 00000000 00000001 .*
.* 00000000 00000000 00000000 00000001 .*
Index: ld/testsuite/ld-powerpc/tlsexetoc.r
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsexetoc.r,v
retrieving revision 1.27
diff -u -p -r1.27 tlsexetoc.r
--- ld/testsuite/ld-powerpc/tlsexetoc.r 20 Jul 2010 14:08:32 -0000 1.27
+++ ld/testsuite/ld-powerpc/tlsexetoc.r 14 Jul 2011 02:52:49 -0000
@@ -16,7 +16,7 @@ Section Headers:
+\[[ 0-9]+\] \.dynstr +.*
+\[[ 0-9]+\] \.rela\.dyn +.*
+\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS .* 0+f0 0+ +AX +0 +0 +8
+ +\[[ 0-9]+\] \.text +PROGBITS .* 0+e8 0+ +AX +0 +0 +8
+\[[ 0-9]+\] \.tdata +PROGBITS .* 0+38 0+ WAT +0 +0 +8
+\[[ 0-9]+\] \.tbss +NOBITS .* 0+38 0+ WAT +0 +0 +8
+\[[ 0-9]+\] \.dynamic +DYNAMIC .* 0+160 10 +WA +4 +0 +8
Index: ld/testsuite/ld-powerpc/tlsso.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlsso.d,v
retrieving revision 1.9
diff -u -p -r1.9 tlsso.d
--- ld/testsuite/ld-powerpc/tlsso.d 2 Oct 2009 15:00:30 -0000 1.9
+++ ld/testsuite/ld-powerpc/tlsso.d 14 Jul 2011 02:52:49 -0000
@@ -12,22 +12,21 @@ Disassembly of section \.text:
.* f8 41 00 28 std r2,40\(r1\)
.* e9 62 80 78 ld r11,-32648\(r2\)
.* 7d 69 03 a6 mtctr r11
-.* e9 62 80 88 ld r11,-32632\(r2\)
.* e8 42 80 80 ld r2,-32640\(r2\)
.* 4e 80 04 20 bctr
.* <_start>:
.* 38 62 80 20 addi r3,r2,-32736
-.* 4b ff ff e5 bl .*
+.* 4b ff ff e9 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 50 addi r3,r2,-32688
-.* 4b ff ff d9 bl .*
+.* 4b ff ff dd bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 38 addi r3,r2,-32712
-.* 4b ff ff cd bl .*
+.* 4b ff ff d1 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 50 addi r3,r2,-32688
-.* 4b ff ff c1 bl .*
+.* 4b ff ff c5 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 39 23 80 40 addi r9,r3,-32704
.* 3d 23 00 00 addis r9,r3,0
@@ -40,10 +39,10 @@ Disassembly of section \.text:
.* 3d 2d 00 00 addis r9,r13,0
.* 99 49 00 00 stb r10,0\(r9\)
.* 38 62 80 08 addi r3,r2,-32760
-.* 4b ff ff 8d bl .*
+.* 4b ff ff 91 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 50 addi r3,r2,-32688
-.* 4b ff ff 81 bl .*
+.* 4b ff ff 85 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* f9 43 80 08 std r10,-32760\(r3\)
.* 3d 23 00 00 addis r9,r3,0
@@ -55,6 +54,7 @@ Disassembly of section \.text:
.* e9 4d 00 02 lwa r10,0\(r13\)
.* 3d 2d 00 00 addis r9,r13,0
.* a9 49 00 00 lha r10,0\(r9\)
+.* 60 00 00 00 nop
.* 00 00 00 00 .*
.* 00 01 02 20 .*
.* <__glink_PLTresolve>:
Index: ld/testsuite/ld-powerpc/tlstocso.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-powerpc/tlstocso.d,v
retrieving revision 1.8
diff -u -p -r1.8 tlstocso.d
--- ld/testsuite/ld-powerpc/tlstocso.d 2 Oct 2009 15:00:30 -0000 1.8
+++ ld/testsuite/ld-powerpc/tlstocso.d 14 Jul 2011 02:52:49 -0000
@@ -12,22 +12,21 @@ Disassembly of section \.text:
.* f8 41 00 28 std r2,40\(r1\)
.* e9 62 80 70 ld r11,-32656\(r2\)
.* 7d 69 03 a6 mtctr r11
-.* e9 62 80 80 ld r11,-32640\(r2\)
.* e8 42 80 78 ld r2,-32648\(r2\)
.* 4e 80 04 20 bctr
.* <_start>:
.* 38 62 80 08 addi r3,r2,-32760
-.* 4b ff ff e5 bl .*
+.* 4b ff ff e9 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 18 addi r3,r2,-32744
-.* 4b ff ff d9 bl .*
+.* 4b ff ff dd bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 28 addi r3,r2,-32728
-.* 4b ff ff cd bl .*
+.* 4b ff ff d1 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 38 62 80 38 addi r3,r2,-32712
-.* 4b ff ff c1 bl .*
+.* 4b ff ff c5 bl .*
.* e8 41 00 28 ld r2,40\(r1\)
.* 39 23 80 40 addi r9,r3,-32704
.* 3d 23 00 00 addis r9,r3,0
@@ -39,6 +38,7 @@ Disassembly of section \.text:
.* 89 4d 00 00 lbz r10,0\(r13\)
.* 3d 2d 00 00 addis r9,r13,0
.* 99 49 00 00 stb r10,0\(r9\)
+.* 60 00 00 00 nop
.* 00 00 00 00 .*
.* 00 01 02 18 .*
.* <__glink_PLTresolve>:
--
Alan Modra
Australia Development Lab, IBM