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PATCH: Add vmfunc


Hi,

I checked in this patch to implment vmfunc from Intel64/IA32 SDM revision
41.

H.J.
---
gas/

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add ".vmfunc".

	* doc/c-i386.texi: Document vmfunc.

gas/testsuite/

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run vmfunc and x86-64-vmfunc.

	* gas/i386/vmfunc.d: New.
	* gas/i386/vmfunc.s: Likewise.
	* gas/i386/x86-64-vmfunc.d: Likewise.

opcodes/

2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Add vmfunc.

	* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
	(cpu_flags): CpuVMFUNC.

	* i386-opc.h (CpuVMFUNC): New.
	(i386_cpu_flags): Add cpuvmfunc.

	* i386-opc.tbl: Add vmfunc.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 219bef4..9e83a4d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -689,6 +689,8 @@ static const arch_entry cpu_arch[] =
     CPU_ANY_AVX_FLAGS, 0, 1 },
   { STRING_COMMA_LEN (".vmx"), PROCESSOR_UNKNOWN,
     CPU_VMX_FLAGS, 0, 0 },
+  { STRING_COMMA_LEN (".vmfunc"), PROCESSOR_UNKNOWN,
+    CPU_VMFUNC_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".smx"), PROCESSOR_UNKNOWN,
     CPU_SMX_FLAGS, 0, 0 },
   { STRING_COMMA_LEN (".xsave"), PROCESSOR_UNKNOWN,
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 30745b4..57f9146 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -145,6 +145,7 @@ accept various extension mnemonics.  For example,
 @code{avx2},
 @code{noavx},
 @code{vmx},
+@code{vmfunc},
 @code{smx},
 @code{xsave},
 @code{xsaveopt},
@@ -1014,7 +1015,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.clflush} @tab @samp{.movbe} @tab @samp{.xsave} @tab @samp{.xsaveopt}
 @item @samp{.aes} @tab @samp{.pclmul} @tab @samp{.fma} @tab @samp{.fsgsbase}
 @item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2}
-@item @samp{.lzcnt} @tab @samp{.invpcid}
+@item @samp{.lzcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index e38cd27..df37d2f 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -54,6 +54,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "disp-intel"
     run_dump_test "disp32"
     run_dump_test "vmx"
+    run_dump_test "vmfunc"
     run_dump_test "smx"
     run_dump_test "suffix"
     run_dump_test "immed32"
@@ -302,6 +303,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "svme64"
     run_dump_test "x86-64-amdfam10"
     run_dump_test "x86-64-vmx"
+    run_dump_test "x86-64-vmfunc"
     run_dump_test "immed64"
     run_dump_test "x86-64-sse3"
     run_dump_test "x86-64-crx"
diff --git a/gas/testsuite/gas/i386/vmfunc.d b/gas/testsuite/gas/i386/vmfunc.d
new file mode 100644
index 0000000..dd6998d
--- /dev/null
+++ b/gas/testsuite/gas/i386/vmfunc.d
@@ -0,0 +1,11 @@
+#objdump: -dw
+#name: i386 VMFUNC
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	0f 01 d4             	vmfunc 
+[ 	]*[a-f0-9]+:	90                   	nop
+#pass
diff --git a/gas/testsuite/gas/i386/vmfunc.s b/gas/testsuite/gas/i386/vmfunc.s
new file mode 100644
index 0000000..6718bd0
--- /dev/null
+++ b/gas/testsuite/gas/i386/vmfunc.s
@@ -0,0 +1,6 @@
+# VMFUNC Instructions
+
+	.text
+foo:
+	vmfunc
+	nop
diff --git a/gas/testsuite/gas/i386/x86-64-vmfunc.d b/gas/testsuite/gas/i386/x86-64-vmfunc.d
new file mode 100644
index 0000000..2af8761
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-vmfunc.d
@@ -0,0 +1,12 @@
+#source: vmfunc.s
+#objdump: -dw
+#name: 64bit VMFUNC
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <foo>:
+[ 	]*[a-f0-9]+:	0f 01 d4             	vmfunc 
+[ 	]*[a-f0-9]+:	90                   	nop
+#pass
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 019a8f5..2991016 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -10470,6 +10470,9 @@ static const struct dis386 rm_table[][8] = {
     /* RM_0F01_REG_2 */
     { "xgetbv",		{ Skip_MODRM } },
     { "xsetbv",		{ Skip_MODRM } },
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vmfunc",		{ Skip_MODRM } },
   },
   {
     /* RM_0F01_REG_3 */
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 4dd75a2..ffdc7e6 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -164,6 +164,8 @@ static initializer cpu_flag_init[] =
     "CpuLZCNT" },
   { "CPU_INVPCID_FLAGS",
     "CpuINVPCID" },
+  { "CPU_VMFUNC_FLAGS",
+    "CpuVMFUNC" },
   { "CPU_3DNOW_FLAGS",
     "CpuMMX|Cpu3dnow" },
   { "CPU_3DNOWA_FLAGS",
@@ -350,6 +352,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuBMI2),
   BITFIELD (CpuLZCNT),
   BITFIELD (CpuINVPCID),
+  BITFIELD (CpuVMFUNC),
   BITFIELD (Cpu64),
   BITFIELD (CpuNo64),
 #ifdef CpuUnused
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 8d5dade..a92223c 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -136,6 +136,8 @@ enum
   CpuLZCNT,
   /* INVPCID Instructions required */
   CpuINVPCID,
+  /* VMFUNC Instruction required */
+  CpuVMFUNC,
   /* 64bit support available, used by -march= in assembler.  */
   CpuLM,
   /* 64bit support required  */
@@ -213,6 +215,7 @@ typedef union i386_cpu_flags
       unsigned int cpubmi2:1;
       unsigned int cpulzcnt:1;
       unsigned int cpuinvpcid:1;
+      unsigned int cpuvmfunc:1;
       unsigned int cpulm:1;
       unsigned int cpu64:1;
       unsigned int cpuno64:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index eb7dae9..79c8acc 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1561,6 +1561,10 @@ vmwrite, 2, 0xf79, None, 2, CpuVMX|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|
 vmxoff, 0, 0xf01, 0xc4, 2, CpuVMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
 vmxon, 1, 0xf30fc7, 0x6, 2, CpuVMX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
 
+// VMFUNC instruction
+
+vmfunc, 0, 0xf01, 0xd4, 2, CpuVMFUNC, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }
+
 // SMX instructions.
 
 getsec, 0, 0xf37, None, 2, CpuSMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }


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