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Re: [PATCH] x86/Intel: relax requirements for memory operands
On Mon, Jul 30, 2012 at 9:00 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Jul 24, 2012 at 7:48 AM, Jan Beulich <JBeulich@suse.com> wrote:
>> MASM accepts ESP/RSP being specified second in a memory address
>> operand, by silently making it the base register despite not being
>> specified first.
>>
>> Consequently, we also permit an xmm/ymm index to be specified first
>> (possibly alone), nevertheless putting it in as index register.
>>
>> 2012-07-24 Jan Beulich <jbeulich@suse.com>
>>
>> * config/tc-i386-intel.c (i386_intel_simplify_register): Handle
>> xmm/ymm index register being specified first as well as esp/rsp
>> base register being specified last in a memory operand.
>>
>
> Please add a testcase for each change and fix
>
> FAIL: i386 inval-equ-2
>
It was caused by a different patch. I checked in this
to fix it.
--
H.J.
--
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 85968f8..caa3ccb 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2012-07-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/inval-equ-2.l: Updated.
+
2012-07-24 Sandra Loosemore <sandra@codesourcery.com>
Jie Zhang <jzhang918@gmail.com>
diff --git a/gas/testsuite/gas/i386/inval-equ-2.l
b/gas/testsuite/gas/i386/inval-equ-2.l
index aed89b4..7a4f483 100644
--- a/gas/testsuite/gas/i386/inval-equ-2.l
+++ b/gas/testsuite/gas/i386/inval-equ-2.l
@@ -15,5 +15,7 @@ GAS LISTING .*
[ ]*6[ ]+\.globl bar2
[ ]*7[ ]+\.set bar3,\(%eax\+1\)
[ ]*8[ ]+\?\?\?\? A12A0000 mov bar3,%eax
+\*\*\*\* Error:can't make global register symbol `bar1'
+\*\*\*\* Error:can't make global register symbol `bar2'
\*\*\*\* Error:can't make global register symbol `bar3'
[ ]*8[ ]+00