Re: [PATCH, v2] gas/x86: don't allow invalid operand combinations for VGATHER

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Tue, Aug 7, 2012 at 6:34 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 07.08.12 at 15:21, "H.J. Lu" <hjl.tools@gmail.com> wrote:
>> On Tue, Aug 7, 2012 at 3:28 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>> On 31.07.12 at 17:43, "H.J. Lu" <hjl.tools@gmail.com> wrote:
>>>> On Tue, Jul 31, 2012 at 12:49 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>>>> On 30.07.12 at 18:10, "H.J. Lu" <hjl.tools@gmail.com> wrote:
>>>>>> The assembler should only check the operands which can't be
>>>>>> encoded.  It should shouldn't check if operands are functional
>>>>>> correct.  However, I don't mind to issue an error which is controlled
>>>>>> by a command line option.
>>>>>
>>>>> Hmm, not sure. Is there any precedent to such behavior? I as a
>>>>> programmer would appreciate if the assembler rejected anything
>>>>> that's invalid.
>>>>>
>>>>> In the case you stay on that position, would making the new
>>>>> diagnostic an unconditional warning be acceptable instead?
>>>>>
>>>>
>>>> Can you also add a command line option to turn it off and
>>>> turn warning into error?
>>>
>>> How about this then?
>>>
>>> Jan
>>>
>>> The VGATHER group of instructions requires that all three involved
>>> xmm/ymm registers are distinct. This patch adds code to check for this,
>>> and at once eliminates a superfluous check for not using PC-relative
>>> addressing for these instructions (the fact that an index register is
>>> required here already excludes valid PC-relative addresses). The
>>> severity of the resulting diagnostics can be controlled via command
>>> line option or directive.
>>
>> Why
>>
>> vgatherdps %xmm2,(%rax,%xmm1,2),%xmm2
>>
>> can't be used?  XMM2 can be used for both mask and
>> destination.
>
> Not that I'm aware of (quoting the documentation):
>
> "If any pair of the index, mask, or destination registers are the
>  same, this instruction results a #UD fault."
>
> It's my understanding that this is because of the restartability of
> the instruction (i.e. if the same register served as mask and
> destination, the instruction might never complete if the loaded
> vector element had its high bit set).
>
> Jan
>

OK.

Thanks.


-- 
H.J.