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Re: [AArch64] Binutils/gas/ld port for ARM's new 64-bit architecture, AArch64 [5/6] ld changes v2
- From: Yufeng Zhang <Yufeng dot Zhang at arm dot com>
- To: "Joseph S. Myers" <joseph at codesourcery dot com>
- Cc: "binutils at sourceware dot org" <binutils at sourceware dot org>
- Date: Tue, 07 Aug 2012 18:28:56 +0100
- Subject: Re: [AArch64] Binutils/gas/ld port for ARM's new 64-bit architecture, AArch64 [5/6] ld changes v2
- References: <50169862.7000705@arm.com> <5016A161.3040504@arm.com> <Pine.LNX.4.64.1207301503490.10885@digraph.polyomino.org.uk>
Hi,
Please find the updated patch in the attachment.
On 07/30/12 16:08, Joseph S. Myers wrote:
On Mon, 30 Jul 2012, Yufeng Zhang wrote:
+aarch64*-*-linux*)
+ MULTIARCHTUPLE=aarch64-linux-gnu
+ NATIVE_LIB_DIRS="/usr/local/lib/$MULTIARCHTUPLE /lib/$MULTIARCHTUPLE /usr/lib/$MULTIARCHTUPLE"
+ ;;
As I said for the GCC port, it's inappropriate for this sort of thing to
be present unconditionally for one architecture. Someone needs to submit
generic binutils support for this Debian scheme, *conditional on an
appropriate configure option*, and *after that* this port can have the
appropriate settings to support the scheme *conditionally*.
This change has been withdrawn; the AArch64 port now uses the default
NATIVE_LIB_DIRS.
I note you have some changes of the form:
# No shared lib support on this target.
-if { [istarget "mcore-*-*"] } {
+if { [istarget "mcore-*-*"] || [istarget "aarch64-*-*"] } {
Is it really the case that there is no shared library support for this
port? If not, the comments need updating.
Thanks for pointing this out. The change to ld-elf/exclude.exp and
ld-elf/frame.exp is no longer necessary and has been removed from the
re-submitted patch.
In general, please explain,
for each test being disabled for this target, why it is correct to disable
it.
The following tests have been disabled for the AArch64 port as
--gc-sections is not supported yet:
* ld-elf/group8a.d
* ld-elf/group8b.d
* ld-elf/group9a.d
* ld-elf/group9b.d
* ld-elf/pr12851.d
* ld-elf/pr12975.d
* ld-elf/pr13177.d
* ld-elf/pr13195.d
* ld-elfvers/vers.exp: Add AArch64.
* ld-shared/shared.exp: Add AArch64.
* ld-srec/srec.exp: Add AArch64.
* lib/ld-lib.exp: Add AArch64.
ld-srec/srec.exp has been disabled as well since SREC is not supported.
Thanks,
Yufeng
Updated change log:
ld/ChangeLog
2012-08-07 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
* Makefile.am: Add AArch64.
* Makefile.in: Regenerate.
* configure.tgt: Add AArch64.
* emulparams/aarch64elf.sh: New file.
* emulparams/aarch64elfb.sh: New file.
* emulparams/aarch64linux.sh: New file.
* emulparams/aarch64linuxb.sh: New file.
* emultempl/aarch64elf.em: New file.
ld/testsuite/ChangeLog
2012-08-07 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
Marcus Shawcroft <marcus.shawcroft@arm.com>
Nigel Stephens <nigel.stephens@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <rearnsha@arm.com>
Sofiane Naci <sofiane.naci@arm.com>
Tejas Belagod <tejas.belagod@arm.com>
Yufeng Zhang <yufeng.zhang@arm.com>
* ld-aarch64/aarch64-elf.exp: New file.
* ld-aarch64/aarch64.ld: New file.
* ld-aarch64/eh-frame-bar.s: New file.
* ld-aarch64/eh-frame-foo.s: New file.
* ld-aarch64/eh-frame.d: New file.
* ld-aarch64/emit-relocs-257-be.d: New file.
* ld-aarch64/emit-relocs-257.d: New file.
* ld-aarch64/emit-relocs-257.s: New file.
* ld-aarch64/emit-relocs-260-be.d: New file.
* ld-aarch64/emit-relocs-260.d: New file.
* ld-aarch64/emit-relocs-260.s: New file.
* ld-aarch64/emit-relocs-262.d: New file.
* ld-aarch64/emit-relocs-262.s: New file.
* ld-aarch64/emit-relocs-263.d: New file.
* ld-aarch64/emit-relocs-263.s: New file.
* ld-aarch64/emit-relocs-264.d: New file.
* ld-aarch64/emit-relocs-264.s: New file.
* ld-aarch64/emit-relocs-265.d: New file.
* ld-aarch64/emit-relocs-265.s: New file.
* ld-aarch64/emit-relocs-266.d: New file.
* ld-aarch64/emit-relocs-266.s: New file.
* ld-aarch64/emit-relocs-267.d: New file.
* ld-aarch64/emit-relocs-267.s: New file.
* ld-aarch64/emit-relocs-268.d: New file.
* ld-aarch64/emit-relocs-268.s: New file.
* ld-aarch64/emit-relocs-269.d: New file.
* ld-aarch64/emit-relocs-269.s: New file.
* ld-aarch64/emit-relocs-270-bad.d: New file.
* ld-aarch64/emit-relocs-270.d: New file.
* ld-aarch64/emit-relocs-270.s: New file.
* ld-aarch64/emit-relocs-271.d: New file.
* ld-aarch64/emit-relocs-271.s: New file.
* ld-aarch64/emit-relocs-272.d: New file.
* ld-aarch64/emit-relocs-272.s: New file.
* ld-aarch64/emit-relocs-273.d: New file.
* ld-aarch64/emit-relocs-273.s: New file.
* ld-aarch64/emit-relocs-274.d: New file.
* ld-aarch64/emit-relocs-274.s: New file.
* ld-aarch64/emit-relocs-275.d: New file.
* ld-aarch64/emit-relocs-275.s: New file.
* ld-aarch64/emit-relocs-276.d: New file.
* ld-aarch64/emit-relocs-276.s: New file.
* ld-aarch64/emit-relocs-277.d: New file.
* ld-aarch64/emit-relocs-277.s: New file.
* ld-aarch64/emit-relocs-278.d: New file.
* ld-aarch64/emit-relocs-278.s: New file.
* ld-aarch64/emit-relocs-279-bad.d: New file.
* ld-aarch64/emit-relocs-279.d: New file.
* ld-aarch64/emit-relocs-279.s: New file.
* ld-aarch64/emit-relocs-280.d: New file.
* ld-aarch64/emit-relocs-280.s: New file.
* ld-aarch64/emit-relocs-282.d: New file.
* ld-aarch64/emit-relocs-282.s: New file.
* ld-aarch64/emit-relocs-283.d: New file.
* ld-aarch64/emit-relocs-283.s: New file.
* ld-aarch64/emit-relocs-284.d: New file.
* ld-aarch64/emit-relocs-284.s: New file.
* ld-aarch64/emit-relocs-285.d: New file.
* ld-aarch64/emit-relocs-285.s: New file.
* ld-aarch64/emit-relocs-286-bad.d: New file.
* ld-aarch64/emit-relocs-286.d: New file.
* ld-aarch64/emit-relocs-286.s: New file.
* ld-aarch64/emit-relocs-287.d: New file.
* ld-aarch64/emit-relocs-287.s: New file.
* ld-aarch64/emit-relocs-299.d: New file.
* ld-aarch64/emit-relocs-299.s: New file.
* ld-aarch64/emit-relocs-311.d: New file.
* ld-aarch64/emit-relocs-311.s: New file.
* ld-aarch64/emit-relocs-312.d: New file.
* ld-aarch64/emit-relocs-312.s: New file.
* ld-aarch64/emit-relocs1.s: New file.
* ld-aarch64/farcall-b-none-function.d: New file.
* ld-aarch64/farcall-b-none-function.s: New file.
* ld-aarch64/farcall-b.d: New file.
* ld-aarch64/farcall-b.s: New file.
* ld-aarch64/farcall-back.d: New file.
* ld-aarch64/farcall-back.s: New file.
* ld-aarch64/farcall-bl-none-function.d: New file.
* ld-aarch64/farcall-bl-none-function.s: New file.
* ld-aarch64/farcall-bl.d: New file.
* ld-aarch64/farcall-bl.s: New file.
* ld-aarch64/farcall-section.d: New file.
* ld-aarch64/farcall-section.s: New file.
* ld-aarch64/limit-b.d: New file.
* ld-aarch64/limit-b.s: New file.
* ld-aarch64/limit-bl.d: New file.
* ld-aarch64/limit-bl.s: New file.
* ld-aarch64/relocs.ld: New file.
* ld-aarch64/tls-desc-ie.d: New file.
* ld-aarch64/tls-desc-ie.s: New file.
* ld-aarch64/tls-relax-all.d: New file.
* ld-aarch64/tls-relax-all.s: New file.
* ld-aarch64/tls-relax-gd-ie.d: New file.
* ld-aarch64/tls-relax-gd-ie.s: New file.
* ld-aarch64/tls-relax-gd-le.d: New file.
* ld-aarch64/tls-relax-gd-le.s: New file.
* ld-aarch64/tls-relax-gdesc-ie-2.d: New file.
* ld-aarch64/tls-relax-gdesc-ie-2.s: New file.
* ld-aarch64/tls-relax-gdesc-ie.d: New file.
* ld-aarch64/tls-relax-gdesc-ie.s: New file.
* ld-aarch64/tls-relax-gdesc-le-2.d: New file.
* ld-aarch64/tls-relax-gdesc-le-2.s: New file.
* ld-aarch64/tls-relax-gdesc-le.d: New file.
* ld-aarch64/tls-relax-gdesc-le.s: New file.
* ld-aarch64/tls-relax-ie-le-2.d: New file.
* ld-aarch64/tls-relax-ie-le-2.s: New file.
* ld-aarch64/tls-relax-ie-le-3.d: New file.
* ld-aarch64/tls-relax-ie-le-3.s: New file.
* ld-aarch64/tls-relax-ie-le.d: New file.
* ld-aarch64/tls-relax-ie-le.s: New file.
* ld-aarch64/weak-undefined.d: New file.
* ld-aarch64/weak-undefined.s: New file.
* ld-elf/binutils.exp (binutils_test): Add optional parameter
'test_name'; change to construct 'test_name' from the 'prog_name'
and 'ld_options' only when "$test_name" == "".
* ld-elf/group8a.d (#notarget): Add AArch64.
* ld-elf/group8b.d (#notarget): Add AArch64.
* ld-elf/group9a.d (#notarget): Add AArch64.
* ld-elf/group9b.d (#notarget): Add AArch64.
* ld-elf/pr12851.d (#notarget): Add AArch64.
* ld-elf/pr12975.d (#notarget): Add AArch64.
* ld-elf/pr13177.d (#notarget): Add AArch64.
* ld-elf/pr13195.d (#notarget): Add AArch64.
* ld-elfvers/vers.exp: Add AArch64.
* ld-shared/shared.exp: Add AArch64.
* ld-srec/srec.exp: Add AArch64.
* lib/ld-lib.exp: Add AArch64.diff --git a/ld/Makefile.am b/ld/Makefile.am
index f35ba4b..8ee8655 100644
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -127,6 +127,10 @@ BFDLIB = ../bfd/libbfd.la
LIBIBERTY = ../libiberty/libiberty.a
ALL_EMULATION_SOURCES = \
+ eaarch64elf.c \
+ eaarch64elfb.c \
+ eaarch64linux.c \
+ eaarch64linuxb.c \
eaix5ppc.c \
eaix5rs6.c \
eaixppc.c \
@@ -1719,6 +1723,22 @@ ens32knbsd.c: $(srcdir)/emulparams/ns32knbsd.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/emultempl/netbsd.em \
$(srcdir)/scripttempl/aout.sc ${GEN_DEPENDS}
${GENSCRIPTS} ns32knbsd "$(tdir_ns32knbsd)"
+eaarch64elf.c: $(srcdir)/emulparams/aarch64elf.sh \
+ $(ELF_DEPS) $(srcdir)/emultempl/aarch64elf.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} aarch64elf "$(tdir_aarch64elf)"
+eaarch64elfb.c: $(srcdir)/emulparams/aarch64elfb.sh $(srcdir)/emulparams/aarch64elf.sh \
+ $(ELF_DEPS) $(srcdir)/emultempl/aarch64elf.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} aarch64elfb "$(tdir_aarch64elfb)"
+eaarch64linux.c: $(srcdir)/emulparams/aarch64linux.sh \
+ $(ELF_DEPS) $(srcdir)/emultempl/aarch64elf.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} aarch64linux "$(tdir_aarch64linux)"
+eaarch64linuxb.c: $(srcdir)/emulparams/aarch64linuxb.sh $(srcdir)/emulparams/aarch64linux.sh \
+ $(ELF_DEPS) $(srcdir)/emultempl/aarch64elf.em \
+ $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
+ ${GENSCRIPTS} aarch64linuxb "$(tdir_aarch64linuxb)"
eor32.c: $(srcdir)/emulparams/or32.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/or32.sc ${GEN_DEPENDS}
${GENSCRIPTS} or32 "$(tdir_or32)"
diff --git a/ld/configure.tgt b/ld/configure.tgt
index e58f4b8..0075dce 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -27,6 +27,14 @@ targ64_extra_libpath=
# architecture variants should be kept together even if their names
# break the alpha sorting.
case "${targ}" in
+aarch64_be-*-elf) targ_emul=aarch64elfb
+ targ_extra_emuls="aarch64elf armelfb armelf" ;;
+aarch64-*-elf) targ_emul=aarch64elf
+ targ_extra_emuls="aarch64elfb armelf armelfb" ;;
+aarch64_be-*-linux*) targ_emul=aarch64linuxb
+ targ_extra_emuls="aarch64linux aarch64elfb aarch64elf armelfb_linux_eabi armelf_linux_eabi armelfb armelf" ;;
+aarch64-*-linux*) targ_emul=aarch64linux
+ targ_extra_emuls="aarch64linuxb aarch64elf aarch64elfb armelf_linux_eabi armelfb_linux_eabi armelf armelfb" ;;
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
targ_emul=elf64alpha_fbsd
targ_extra_emuls="elf64alpha alpha"
diff --git a/ld/emulparams/aarch64elf.sh b/ld/emulparams/aarch64elf.sh
new file mode 100644
index 0000000..d72e5f7
--- /dev/null
+++ b/ld/emulparams/aarch64elf.sh
@@ -0,0 +1,35 @@
+ARCH=aarch64
+MACHINE=
+NOP=0
+
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf64-littleaarch64"
+BIG_OUTPUT_FORMAT="elf64-bigaarch64"
+LITTLE_OUTPUT_FORMAT="elf64-littleaarch64"
+NO_REL_RELOCS=yes
+
+TEMPLATE_NAME=elf32
+EXTRA_EM_FILE=aarch64elf
+
+GENERATE_SHLIB_SCRIPT=yes
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+
+ENTRY=_start
+EMBEDDED=yes
+SEPARATE_GOTPLT=24
+TEXT_START_ADDR=0x00400000
+
+DATA_START_SYMBOLS='__data_start = . ;';
+
+# AArch64 does not support .s* sections.
+NO_SMALL_DATA=yes
+
+OTHER_BSS_SYMBOLS='__bss_start__ = .;'
+OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
+OTHER_END_SYMBOLS='__end__ = . ;'
+
+OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
+ATTRS_SECTIONS='.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }'
+
+# This sets the stack to the top of the simulator memory (2^19 bytes).
+STACK_ADDR=0x80000
diff --git a/ld/emulparams/aarch64elfb.sh b/ld/emulparams/aarch64elfb.sh
new file mode 100644
index 0000000..7a3ff97
--- /dev/null
+++ b/ld/emulparams/aarch64elfb.sh
@@ -0,0 +1,2 @@
+. ${srcdir}/emulparams/aarch64elf.sh
+OUTPUT_FORMAT="elf64-bigaarch64"
diff --git a/ld/emulparams/aarch64linux.sh b/ld/emulparams/aarch64linux.sh
new file mode 100644
index 0000000..a5a2500
--- /dev/null
+++ b/ld/emulparams/aarch64linux.sh
@@ -0,0 +1,36 @@
+ARCH=aarch64
+MACHINE=
+NOP=0
+
+SCRIPT_NAME=elf
+OUTPUT_FORMAT="elf64-littleaarch64"
+BIG_OUTPUT_FORMAT="elf64-bigaarch64"
+LITTLE_OUTPUT_FORMAT="elf64-littleaarch64"
+NO_REL_RELOCS=yes
+
+TEMPLATE_NAME=elf32
+EXTRA_EM_FILE=aarch64elf
+
+GENERATE_SHLIB_SCRIPT=yes
+GENERATE_PIE_SCRIPT=yes
+
+MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
+COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
+SEPARATE_GOTPLT=24
+IREL_IN_PLT=
+
+TEXT_START_ADDR=0x400000
+
+DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
+
+# AArch64 does not support .s* sections.
+NO_SMALL_DATA=yes
+
+OTHER_BSS_SYMBOLS='__bss_start__ = .;'
+OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
+OTHER_END_SYMBOLS='__end__ = . ;'
+
+OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
+ATTRS_SECTIONS='.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }'
+# Ensure each PLT entry is aligned to a cache line.
+PLT=".plt ${RELOCATING-0} : ALIGN(16) { *(.plt)${IREL_IN_PLT+ *(.iplt)} }"
diff --git a/ld/emulparams/aarch64linuxb.sh b/ld/emulparams/aarch64linuxb.sh
new file mode 100644
index 0000000..2bdf602
--- /dev/null
+++ b/ld/emulparams/aarch64linuxb.sh
@@ -0,0 +1,2 @@
+. ${srcdir}/emulparams/aarch64linux.sh
+OUTPUT_FORMAT="elf64-bigaarch64"
diff --git a/ld/emultempl/aarch64elf.em b/ld/emultempl/aarch64elf.em
new file mode 100644
index 0000000..4c03ffd
--- /dev/null
+++ b/ld/emultempl/aarch64elf.em
@@ -0,0 +1,415 @@
+# This shell script emits a C file. -*- C -*-
+# Copyright 2009-2012 Free Software Foundation, Inc.
+# Contributed by ARM Ltd.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the license, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING3. If not,
+# see <http://www.gnu.org/licenses/>.
+#
+
+# This file is sourced from elf32.em, and defines extra aarch64-elf
+# specific routines.
+#
+fragment <<EOF
+
+#include "ldctor.h"
+#include "elf/aarch64.h"
+
+static int no_enum_size_warning = 0;
+static int no_wchar_size_warning = 0;
+static int pic_veneer = 0;
+
+static void
+gld${EMULATION_NAME}_before_parse (void)
+{
+#ifndef TARGET_ /* I.e., if not generic. */
+ ldfile_set_output_arch ("`echo ${ARCH}`", bfd_arch_unknown);
+#endif /* not TARGET_ */
+ input_flags.dynamic = ${DYNAMIC_LINK-TRUE};
+ config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`;
+}
+
+static void
+aarch64_elf_before_allocation (void)
+{
+ /* We should be able to set the size of the interworking stub section. We
+ can't do it until later if we have dynamic sections, though. */
+ if (! elf_hash_table (&link_info)->dynamic_sections_created)
+ {
+ /* Here we rummage through the found bfds to collect information. */
+ LANG_FOR_EACH_INPUT_STATEMENT (is)
+ {
+ /* Initialise mapping tables for code/data. */
+ bfd_elf64_aarch64_init_maps (is->the_bfd);
+ }
+ }
+
+ /* Call the standard elf routine. */
+ gld${EMULATION_NAME}_before_allocation ();
+}
+
+/* Fake input file for stubs. */
+static lang_input_statement_type *stub_file;
+
+/* Whether we need to call gldarm_layout_sections_again. */
+static int need_laying_out = 0;
+
+/* Maximum size of a group of input sections that can be handled by
+ one stub section. A value of +/-1 indicates the bfd back-end
+ should use a suitable default size. */
+static bfd_signed_vma group_size = 1;
+
+struct hook_stub_info
+{
+ lang_statement_list_type add;
+ asection *input_section;
+};
+
+/* Traverse the linker tree to find the spot where the stub goes. */
+
+static bfd_boolean
+hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
+{
+ lang_statement_union_type *l;
+ bfd_boolean ret;
+
+ for (; (l = *lp) != NULL; lp = &l->header.next)
+ {
+ switch (l->header.type)
+ {
+ case lang_constructors_statement_enum:
+ ret = hook_in_stub (info, &constructor_list.head);
+ if (ret)
+ return ret;
+ break;
+
+ case lang_output_section_statement_enum:
+ ret = hook_in_stub (info,
+ &l->output_section_statement.children.head);
+ if (ret)
+ return ret;
+ break;
+
+ case lang_wild_statement_enum:
+ ret = hook_in_stub (info, &l->wild_statement.children.head);
+ if (ret)
+ return ret;
+ break;
+
+ case lang_group_statement_enum:
+ ret = hook_in_stub (info, &l->group_statement.children.head);
+ if (ret)
+ return ret;
+ break;
+
+ case lang_input_section_enum:
+ if (l->input_section.section == info->input_section)
+ {
+ /* We've found our section. Insert the stub immediately
+ after its associated input section. */
+ *(info->add.tail) = l->header.next;
+ l->header.next = info->add.head;
+ return TRUE;
+ }
+ break;
+
+ case lang_data_statement_enum:
+ case lang_reloc_statement_enum:
+ case lang_object_symbols_statement_enum:
+ case lang_output_statement_enum:
+ case lang_target_statement_enum:
+ case lang_input_statement_enum:
+ case lang_assignment_statement_enum:
+ case lang_padding_statement_enum:
+ case lang_address_statement_enum:
+ case lang_fill_statement_enum:
+ break;
+
+ default:
+ FAIL ();
+ break;
+ }
+ }
+ return FALSE;
+}
+
+
+/* Call-back for elf64_aarch64_size_stubs. */
+
+/* Create a new stub section, and arrange for it to be linked
+ immediately after INPUT_SECTION. */
+
+static asection *
+elf64_aarch64_add_stub_section (const char *stub_sec_name,
+ asection *input_section)
+{
+ asection *stub_sec;
+ flagword flags;
+ asection *output_section;
+ const char *secname;
+ lang_output_section_statement_type *os;
+ struct hook_stub_info info;
+
+ flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
+ | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY | SEC_KEEP);
+ stub_sec = bfd_make_section_anyway_with_flags (stub_file->the_bfd,
+ stub_sec_name, flags);
+ if (stub_sec == NULL)
+ goto err_ret;
+
+ bfd_set_section_alignment (stub_file->the_bfd, stub_sec, 3);
+
+ output_section = input_section->output_section;
+ secname = bfd_get_section_name (output_section->owner, output_section);
+ os = lang_output_section_find (secname);
+
+ info.input_section = input_section;
+ lang_list_init (&info.add);
+ lang_add_section (&info.add, stub_sec, NULL, os);
+
+ if (info.add.head == NULL)
+ goto err_ret;
+
+ if (hook_in_stub (&info, &os->children.head))
+ return stub_sec;
+
+ err_ret:
+ einfo ("%X%P: can not make stub section: %E\n");
+ return NULL;
+}
+
+/* Another call-back for elf_arm_size_stubs. */
+
+static void
+gldaarch64_layout_sections_again (void)
+{
+ /* If we have changed sizes of the stub sections, then we need
+ to recalculate all the section offsets. This may mean we need to
+ add even more stubs. */
+ gld${EMULATION_NAME}_map_segments (TRUE);
+ need_laying_out = -1;
+}
+
+static void
+build_section_lists (lang_statement_union_type *statement)
+{
+ if (statement->header.type == lang_input_section_enum)
+ {
+ asection *i = statement->input_section.section;
+
+ if (!((lang_input_statement_type *) i->owner->usrdata)->flags.just_syms
+ && (i->flags & SEC_EXCLUDE) == 0
+ && i->output_section != NULL
+ && i->output_section->owner == link_info.output_bfd)
+ elf64_aarch64_next_input_section (& link_info, i);
+ }
+}
+
+static void
+gld${EMULATION_NAME}_after_allocation (void)
+{
+ /* bfd_elf32_discard_info just plays with debugging sections,
+ ie. doesn't affect any code, so we can delay resizing the
+ sections. It's likely we'll resize everything in the process of
+ adding stubs. */
+ if (bfd_elf_discard_info (link_info.output_bfd, & link_info))
+ need_laying_out = 1;
+
+ /* If generating a relocatable output file, then we don't
+ have to examine the relocs. */
+ if (stub_file != NULL && !link_info.relocatable)
+ {
+ int ret = elf64_aarch64_setup_section_lists (link_info.output_bfd,
+ & link_info);
+
+ if (ret != 0)
+ {
+ if (ret < 0)
+ {
+ einfo ("%X%P: could not compute sections lists for stub generation: %E\n");
+ return;
+ }
+
+ lang_for_each_statement (build_section_lists);
+
+ /* Call into the BFD backend to do the real work. */
+ if (! elf64_aarch64_size_stubs (link_info.output_bfd,
+ stub_file->the_bfd,
+ & link_info,
+ group_size,
+ & elf64_aarch64_add_stub_section,
+ & gldaarch64_layout_sections_again))
+ {
+ einfo ("%X%P: cannot size stub section: %E\n");
+ return;
+ }
+ }
+ }
+
+ if (need_laying_out != -1)
+ gld${EMULATION_NAME}_map_segments (need_laying_out);
+}
+
+static void
+gld${EMULATION_NAME}_finish (void)
+{
+ if (! link_info.relocatable)
+ {
+ /* Now build the linker stubs. */
+ if (stub_file->the_bfd->sections != NULL)
+ {
+ if (! elf64_aarch64_build_stubs (& link_info))
+ einfo ("%X%P: can not build stubs: %E\n");
+ }
+ }
+
+ finish_default ();
+}
+
+/* This is a convenient point to tell BFD about target specific flags.
+ After the output has been created, but before inputs are read. */
+static void
+aarch64_elf_create_output_section_statements (void)
+{
+ if (strstr (bfd_get_target (link_info.output_bfd), "aarch64") == NULL)
+ {
+ /* The arm backend needs special fields in the output hash structure.
+ These will only be created if the output format is an arm format,
+ hence we do not support linking and changing output formats at the
+ same time. Use a link followed by objcopy to change output formats. */
+ einfo ("%F%X%P: error: Cannot change output format whilst linking AArch64 binaries.\n");
+ return;
+ }
+
+ bfd_elf64_aarch64_set_options (link_info.output_bfd, &link_info,
+ no_enum_size_warning,
+ no_wchar_size_warning,
+ pic_veneer);
+
+ stub_file = lang_add_input_file ("linker stubs",
+ lang_input_file_is_fake_enum,
+ NULL);
+ stub_file->the_bfd = bfd_create ("linker stubs", link_info.output_bfd);
+ if (stub_file->the_bfd == NULL
+ || ! bfd_set_arch_mach (stub_file->the_bfd,
+ bfd_get_arch (link_info.output_bfd),
+ bfd_get_mach (link_info.output_bfd)))
+ {
+ einfo ("%X%P: can not create BFD %E\n");
+ return;
+ }
+
+ stub_file->the_bfd->flags |= BFD_LINKER_CREATED;
+ ldlang_add_file (stub_file);
+}
+
+/* Avoid processing the fake stub_file in vercheck, stat_needed and
+ check_needed routines. */
+
+static void (*real_func) (lang_input_statement_type *);
+
+static void aarch64_for_each_input_file_wrapper (lang_input_statement_type *l)
+{
+ if (l != stub_file)
+ (*real_func) (l);
+}
+
+static void
+aarch64_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
+{
+ real_func = func;
+ lang_for_each_input_file (&aarch64_for_each_input_file_wrapper);
+}
+
+#define lang_for_each_input_file aarch64_lang_for_each_input_file
+
+EOF
+
+# Define some shell vars to insert bits of code into the standard elf
+# parse_args and list_options functions.
+#
+PARSE_AND_LIST_PROLOGUE='
+#define OPTION_NO_ENUM_SIZE_WARNING 309
+#define OPTION_PIC_VENEER 310
+#define OPTION_STUBGROUP_SIZE 311
+#define OPTION_NO_WCHAR_SIZE_WARNING 312
+'
+
+PARSE_AND_LIST_SHORTOPTS=p
+
+PARSE_AND_LIST_LONGOPTS='
+ { "no-pipeline-knowledge", no_argument, NULL, '\'p\''},
+ { "no-enum-size-warning", no_argument, NULL, OPTION_NO_ENUM_SIZE_WARNING},
+ { "pic-veneer", no_argument, NULL, OPTION_PIC_VENEER},
+ { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
+ { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
+'
+
+PARSE_AND_LIST_OPTIONS='
+ fprintf (file, _(" --no-enum-size-warning Don'\''t warn about objects with incompatible\n"
+ " enum sizes\n"));
+ fprintf (file, _(" --no-wchar-size-warning Don'\''t warn about objects with incompatible"
+ " wchar_t sizes\n"));
+ fprintf (file, _(" --pic-veneer Always generate PIC interworking veneers\n"));
+ fprintf (file, _("\
+ --stub-group-size=N Maximum size of a group of input sections that can be\n\
+ handled by one stub section. A negative value\n\
+ locates all stubs after their branches (with a\n\
+ group size of -N), while a positive value allows\n\
+ two groups of input sections, one before, and one\n\
+ after each stub section. Values of +/-1 indicate\n\
+ the linker should choose suitable defaults.\n"
+ ));
+'
+
+PARSE_AND_LIST_ARGS_CASES='
+ case '\'p\'':
+ /* Only here for backwards compatibility. */
+ break;
+
+ case OPTION_NO_ENUM_SIZE_WARNING:
+ no_enum_size_warning = 1;
+ break;
+
+ case OPTION_NO_WCHAR_SIZE_WARNING:
+ no_wchar_size_warning = 1;
+ break;
+
+ case OPTION_PIC_VENEER:
+ pic_veneer = 1;
+ break;
+
+ case OPTION_STUBGROUP_SIZE:
+ {
+ const char *end;
+
+ group_size = bfd_scan_vma (optarg, &end, 0);
+ if (*end)
+ einfo (_("%P%F: invalid number `%s'\''\n"), optarg);
+ }
+ break;
+'
+
+# We have our own before_allocation etc. functions, but they call
+# the standard routines, so give them a different name.
+LDEMUL_BEFORE_ALLOCATION=aarch64_elf_before_allocation
+LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation
+LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=aarch64_elf_create_output_section_statements
+
+# Replace the elf before_parse function with our own.
+LDEMUL_BEFORE_PARSE=gld"${EMULATION_NAME}"_before_parse
+
+# Call the extra arm-elf function
+LDEMUL_FINISH=gld${EMULATION_NAME}_finish
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
new file mode 100644
index 0000000..eefe05a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -0,0 +1,105 @@
+# Expect script for various AARCH64 ELF tests.
+# Copyright 2009-2012 Free Software Foundation, Inc.
+#
+# This file is part of the GNU Binutils.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+# Exclude non-aarch64-ELF targets.
+if { ![is_elf_format] || ![istarget "aarch64*-*-*"] } {
+ return
+}
+
+# List contains test-items with 3 items followed by 2 lists:
+# 0:name 1:ld options 2:assembler options
+# 3:filenames of assembler files 4: action and options. 5: name of output file
+
+# Actions:
+# objdump: Apply objdump options on result. Compare with regex (last arg).
+# nm: Apply nm options on result. Compare with regex (last arg).
+# readelf: Apply readelf options on result. Compare with regex (last arg).
+
+set aarch64elftests {
+ {"EH Frame merge" "-Ttext 0x8000" "" {eh-frame-bar.s eh-frame-foo.s}
+ {{objdump --dwarf=frames eh-frame.d}} "eh-frame"}
+}
+
+run_ld_link_tests $aarch64elftests
+
+# Relocation Tests
+run_dump_test "weak-undefined"
+run_dump_test "emit-relocs-257"
+run_dump_test "emit-relocs-257-be"
+# 258 is tested in 257
+# 259 is tested in 257
+run_dump_test "emit-relocs-260"
+run_dump_test "emit-relocs-260-be"
+# 261 is tested by 260
+run_dump_test "emit-relocs-262"
+run_dump_test "emit-relocs-263"
+run_dump_test "emit-relocs-264"
+run_dump_test "emit-relocs-265"
+run_dump_test "emit-relocs-266"
+run_dump_test "emit-relocs-267"
+run_dump_test "emit-relocs-268"
+run_dump_test "emit-relocs-269"
+run_dump_test "emit-relocs-270"
+run_dump_test "emit-relocs-270-bad"
+run_dump_test "emit-relocs-271"
+run_dump_test "emit-relocs-272"
+run_dump_test "emit-relocs-273"
+run_dump_test "emit-relocs-274"
+run_dump_test "emit-relocs-275"
+run_dump_test "emit-relocs-276"
+run_dump_test "emit-relocs-277"
+run_dump_test "emit-relocs-278"
+run_dump_test "emit-relocs-279"
+run_dump_test "emit-relocs-279-bad"
+run_dump_test "emit-relocs-280"
+# 281 is unused
+run_dump_test "emit-relocs-282"
+run_dump_test "emit-relocs-283"
+run_dump_test "emit-relocs-284"
+run_dump_test "emit-relocs-285"
+run_dump_test "emit-relocs-286"
+run_dump_test "emit-relocs-286-bad"
+# 287-298 are not done yet
+run_dump_test "emit-relocs-299"
+# 300-310 are not done yet
+run_dump_test "emit-relocs-311"
+run_dump_test "emit-relocs-312"
+
+
+run_dump_test "limit-b"
+run_dump_test "limit-bl"
+run_dump_test "farcall-section"
+run_dump_test "farcall-back"
+run_dump_test "farcall-bl"
+run_dump_test "farcall-b"
+run_dump_test "farcall-b-none-function"
+run_dump_test "farcall-bl-none-function"
+
+run_dump_test "tls-relax-all"
+run_dump_test "tls-relax-gd-le"
+run_dump_test "tls-relax-gdesc-le"
+run_dump_test "tls-relax-gd-ie"
+run_dump_test "tls-relax-gdesc-ie"
+run_dump_test "tls-relax-ie-le"
+run_dump_test "tls-desc-ie"
+run_dump_test "tls-relax-gdesc-ie-2"
+run_dump_test "tls-relax-gdesc-le-2"
+run_dump_test "tls-relax-ie-le-2"
+run_dump_test "tls-relax-ie-le-3"
diff --git a/ld/testsuite/ld-aarch64/aarch64.ld b/ld/testsuite/ld-aarch64/aarch64.ld
new file mode 100644
index 0000000..75ee3b5
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/aarch64.ld
@@ -0,0 +1,19 @@
+/* Script for ld testsuite */
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x8000); . = 0x8000;
+ .text :
+ {
+ *(.before)
+ *(.text)
+ *(.after)
+ } =0
+ . = 0x9000;
+ .got : { *(.got) *(.got.plt)}
+ . = 0x12340000;
+ .far : { *(.far) }
+ .ARM.attributes 0 : { *(.ARM.atttributes) }
+}
diff --git a/ld/testsuite/ld-aarch64/eh-frame-bar.s b/ld/testsuite/ld-aarch64/eh-frame-bar.s
new file mode 100644
index 0000000..a67d8e4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/eh-frame-bar.s
@@ -0,0 +1,38 @@
+__longjmp:
+ .cfi_startproc
+ .cfi_def_cfa x0, 0
+ .cfi_offset x19, 16
+ .cfi_offset x20, 16
+ .cfi_offset x21, 16
+ .cfi_offset x22, 16
+ .cfi_offset x23, 24
+ .cfi_offset x24, 24
+ .cfi_offset x25, 24
+ .cfi_offset x26, 24
+ .cfi_offset x27, 24
+ .cfi_offset x28, 32
+ .cfi_offset x29, 32
+ .cfi_offset x30, 36
+ .cfi_offset d9, 8
+# This eh frame data differs from eh-frame-bar.s here, see the comment
+# in eh-frame-foo.s
+ .cfi_offset d11, 8
+
+ ldp x19, x20, [x0, #16]
+ ldp x21, x22, [x0, #16]
+ ldp x23, x24, [x0, #24]
+ ldp x25, x26, [x0, #24]
+ ldp x27, x28, [x0, #24]
+ ldp x29, x30, [x0, #32]
+
+ ldp d8, d9, [x0, #8]
+ ldp d10, d11, [x0, #8]
+ ldp d12, d13, [x0, #8]
+ ldp d14, d15, [x0, #8]
+ ldr x5, [x0, #48]
+ mov sp, x5
+ cmp x1, #0
+ mov x0, #1
+ csel x0, x1, x0, ne
+ br x30
+ .cfi_endproc
diff --git a/ld/testsuite/ld-aarch64/eh-frame-foo.s b/ld/testsuite/ld-aarch64/eh-frame-foo.s
new file mode 100644
index 0000000..c077ef2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/eh-frame-foo.s
@@ -0,0 +1,55 @@
+__longjmp:
+ .cfi_startproc
+ .cfi_def_cfa x0, 0
+ .cfi_offset x19, 16
+ .cfi_offset x20, 16
+ .cfi_offset x21, 16
+ .cfi_offset x22, 16
+ .cfi_offset x23, 24
+ .cfi_offset x24, 24
+ .cfi_offset x25, 24
+ .cfi_offset x26, 24
+ .cfi_offset x27, 24
+ .cfi_offset x28, 32
+ .cfi_offset x29, 32
+ .cfi_offset x30, 36
+ .cfi_offset d9, 8
+
+/* This eh frame data differs from eh-frame-bar.s here. The eh
+ frame information is identical but changes at the end. The
+ initial identical section is long enough to overflow the
+ initial instruction buffer used in eh frame merging. This
+ checks that merging does something sane once the initial
+ instruction buffer overflows. */
+
+.cfi_offset d10, 8
+
+
+
+
+
+
+
+ ldp x19, x20, [x0, #16]
+ ldp x21, x22, [x0, #16]
+ ldp x23, x24, [x0, #24]
+ ldp x25, x26, [x0, #24]
+ ldp x27, x28, [x0, #24]
+ ldp x29, x30, [x0, #32]
+
+ ldp d8, d9, [x0, #8]
+ ldp d10, d11, [x0, #8]
+ ldp d12, d13, [x0, #8]
+ ldp d14, d15, [x0, #8]
+ ldr x5, [x0, #48]
+ mov sp, x5
+ cmp x1, #0
+ mov x0, #1
+ csel x0, x1, x0, ne
+
+ br x30
+ .cfi_endproc
+
+ .global _start
+_start:
+
diff --git a/ld/testsuite/ld-aarch64/eh-frame.d b/ld/testsuite/ld-aarch64/eh-frame.d
new file mode 100644
index 0000000..88e9988
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/eh-frame.d
@@ -0,0 +1,86 @@
+.*: file format elf64-(little|big)aarch64
+
+Contents of the .eh_frame section:
+
+00000000 00000044 00000000 CIE
+ Version: 1
+ Augmentation: "zR"
+ Code alignment factor: 2
+ Data alignment factor: -4
+ Return address column: 30
+ Augmentation data: 1b
+
+ DW_CFA_def_cfa: r31 ofs 0
+ DW_CFA_def_cfa: r0 ofs 0
+ DW_CFA_offset_extended_sf: r19 at cfa\+16
+ DW_CFA_offset_extended_sf: r20 at cfa\+16
+ DW_CFA_offset_extended_sf: r21 at cfa\+16
+ DW_CFA_offset_extended_sf: r22 at cfa\+16
+ DW_CFA_offset_extended_sf: r23 at cfa\+24
+ DW_CFA_offset_extended_sf: r24 at cfa\+24
+ DW_CFA_offset_extended_sf: r25 at cfa\+24
+ DW_CFA_offset_extended_sf: r26 at cfa\+24
+ DW_CFA_offset_extended_sf: r27 at cfa\+24
+ DW_CFA_offset_extended_sf: r28 at cfa\+32
+ DW_CFA_offset_extended_sf: r29 at cfa\+32
+ DW_CFA_offset_extended_sf: r30 at cfa\+36
+ DW_CFA_offset_extended_sf: r9 at cfa\+8
+ DW_CFA_offset_extended_sf: r11 at cfa\+8
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+
+00000048 00000014 0000004c FDE cie=00000000 pc=f*ffffff80..f*ffffffc0
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+
+00000060 00000044 00000000 CIE
+ Version: 1
+ Augmentation: "zR"
+ Code alignment factor: 2
+ Data alignment factor: -4
+ Return address column: 30
+ Augmentation data: 1b
+
+ DW_CFA_def_cfa: r31 ofs 0
+ DW_CFA_def_cfa: r0 ofs 0
+ DW_CFA_offset_extended_sf: r19 at cfa\+16
+ DW_CFA_offset_extended_sf: r20 at cfa\+16
+ DW_CFA_offset_extended_sf: r21 at cfa\+16
+ DW_CFA_offset_extended_sf: r22 at cfa\+16
+ DW_CFA_offset_extended_sf: r23 at cfa\+24
+ DW_CFA_offset_extended_sf: r24 at cfa\+24
+ DW_CFA_offset_extended_sf: r25 at cfa\+24
+ DW_CFA_offset_extended_sf: r26 at cfa\+24
+ DW_CFA_offset_extended_sf: r27 at cfa\+24
+ DW_CFA_offset_extended_sf: r28 at cfa\+32
+ DW_CFA_offset_extended_sf: r29 at cfa\+32
+ DW_CFA_offset_extended_sf: r30 at cfa\+36
+ DW_CFA_offset_extended_sf: r9 at cfa\+8
+ DW_CFA_offset_extended_sf: r10 at cfa\+8
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+
+000000a8 00000014 0000004c FDE cie=00000060 pc=f*ffffffc0..00000000
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-257-be.d b/ld/testsuite/ld-aarch64/emit-relocs-257-be.d
new file mode 100644
index 0000000..3f6be24
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-257-be.d
@@ -0,0 +1,16 @@
+#source: emit-relocs-257.s
+#ld: -T relocs.ld --defsym tempy=0x11012 --defsym tempy2=0x45034 --defsym tempy3=0x1234 -e0 --emit-relocs
+#notarget: aarch64-*-*
+#objdump: -dr
+#...
+ +10000: 00011012 \.word 0x00011012
+ +10000: R_AARCH64_ABS32 tempy
+ +10004: 00000000 \.word 0x00000000
+ +10004: R_AARCH64_ABS64 tempy2
+ +10008: 00045034 \.word 0x00045034
+ +1000c: 1234123c \.word 0x1234123c
+ +1000c: R_AARCH64_ABS16 tempy3
+ +1000e: R_AARCH64_ABS16 tempy3\+0x8
+ +10010: 8a000000 and x0, x0, x0
+ +10014: 92400000 and x0, x0, #0x1
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-257.d b/ld/testsuite/ld-aarch64/emit-relocs-257.d
new file mode 100644
index 0000000..0a3a7ac
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-257.d
@@ -0,0 +1,16 @@
+#source: emit-relocs-257.s
+#ld: -T relocs.ld --defsym tempy=0x11012 --defsym tempy2=0x45034 --defsym tempy3=0x1234 -e0 --emit-relocs
+#notarget: aarch64_be-*-*
+#objdump: -dr
+#...
+ +10000: 00011012 \.word 0x00011012
+ +10000: R_AARCH64_ABS32 tempy
+ +10004: 00045034 \.word 0x00045034
+ +10004: R_AARCH64_ABS64 tempy2
+ +10008: 00000000 \.word 0x00000000
+ +1000c: 123c1234 \.word 0x123c1234
+ +1000c: R_AARCH64_ABS16 tempy3
+ +1000e: R_AARCH64_ABS16 tempy3\+0x8
+ +10010: 8a000000 and x0, x0, x0
+ +10014: 92400000 and x0, x0, #0x1
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-257.s b/ld/testsuite/ld-aarch64/emit-relocs-257.s
new file mode 100644
index 0000000..609ebba
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-257.s
@@ -0,0 +1,12 @@
+.comm gempy,4,4
+.text
+
+.word tempy
+.xword tempy2
+.hword tempy3
+.hword tempy3+8
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-260-be.d b/ld/testsuite/ld-aarch64/emit-relocs-260-be.d
new file mode 100644
index 0000000..7cea3c6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-260-be.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-260.s
+#ld: -T relocs.ld --defsym tempy=0x11012 --defsym tempy2=0x45034 --defsym tempy3=0x1234 --defsym _GOT_=0x10000 -e0 --emit-relocs
+#notarget: aarch64-*-*
+#objdump: -dr
+#...
+ +10000: R_AARCH64_PREL32 _GOT_
+ +10004: R_AARCH64_PREL64 _GOT_\+0x12
+ +10008: 0000000e \.word 0x0000000e
+ +1000c: fff404f2 \.word 0xfff404f2
+ +1000c: R_AARCH64_PREL16 _GOT_
+ +1000e: R_AARCH64_PREL16 _GOT_\+0x500
+ +10010: 8a000000 and x0, x0, x0
+ +10014: 92400000 and x0, x0, #0x1
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-260.d b/ld/testsuite/ld-aarch64/emit-relocs-260.d
new file mode 100644
index 0000000..91c1d8a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-260.d
@@ -0,0 +1,16 @@
+#source: emit-relocs-260.s
+#ld: -T relocs.ld --defsym tempy=0x11012 --defsym tempy2=0x45034 --defsym tempy3=0x1234 --defsym _GOT_=0x10000 -e0 --emit-relocs
+#notarget: aarch64_be-*-*
+#objdump: -dr
+#...
+ +10000: 00000000 \.word 0x00000000
+ +10000: R_AARCH64_PREL32 _GOT_
+ +10004: 0000000e \.word 0x0000000e
+ +10004: R_AARCH64_PREL64 _GOT_\+0x12
+ +10008: 00000000 \.word 0x00000000
+ +1000c: 04f2fff4 \.word 0x04f2fff4
+ +1000c: R_AARCH64_PREL16 _GOT_
+ +1000e: R_AARCH64_PREL16 _GOT_\+0x500
+ +10010: 8a000000 and x0, x0, x0
+ +10014: 92400000 and x0, x0, #0x1
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-260.s b/ld/testsuite/ld-aarch64/emit-relocs-260.s
new file mode 100644
index 0000000..87aa342
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-260.s
@@ -0,0 +1,13 @@
+.comm gempy,4,4
+.text
+
+.word _GOT_ - .
+.xword _GOT_ - . + 0x12
+.hword _GOT_ - .
+.hword _GOT_ - . + 0x500
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+
+
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-262.d b/ld/testsuite/ld-aarch64/emit-relocs-262.d
new file mode 100644
index 0000000..c42ecb6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-262.d
@@ -0,0 +1,16 @@
+#source: emit-relocs-262.s
+#ld: -T relocs.ld --defsym tempy=0x11012 --defsym tempy2=0x45034 --defsym tempy3=0x1234 --defsym _GOT_=0x20000 -e0 --emit-relocs
+#error: .*truncated.*
+#objdump: -dr
+#...
+ +10000: 00011012 \.word 0x00011012
+ +10000: R_AARCH64_PREL32 tempy
+ +10004: 00045034 \.word 0x00045034
+ +10004: R_AARCH64_PREL64 tempy2
+ +10008: 00000000 \.word 0x00000000
+ +1000c: 123c1234 \.word 0x123c1234
+ +1000c: R_AARCH64_PREL16 tempy3
+ +1000e: R_AARCH64_PREL16 tempy3\+0x8
+ +10010: 8a000000 and x0, x0, x0
+ +10014: 92400000 and x0, x0, #0x1
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-262.s b/ld/testsuite/ld-aarch64/emit-relocs-262.s
new file mode 100644
index 0000000..aa97f52
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-262.s
@@ -0,0 +1,13 @@
+.comm gempy,4,4
+.text
+
+.word _GOT_ - .
+.xword _GOT_ - . + 0x12
+.hword _GOT_ - .
+.hword _GOT_ - .
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+
+
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-263.d b/ld/testsuite/ld-aarch64/emit-relocs-263.d
new file mode 100644
index 0000000..a6c854d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-263.d
@@ -0,0 +1,15 @@
+#source: emit-relocs-263.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_UABS_G0 against symbol `tempy.*
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2820004 movz x4, #0x1000
+ +10008: R_AARCH64_MOVW_UABS_G0 tempy
+ +1000c: d28a0007 movz x7, #0x5000
+ +1000c: R_AARCH64_MOVW_UABS_G0 tempy2
+ +10010: d2824691 movz x17, #0x1234
+ +10010: R_AARCH64_MOVW_UABS_G0 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-263.s b/ld/testsuite/ld-aarch64/emit-relocs-263.s
new file mode 100644
index 0000000..e215872
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-263.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g0:tempy
+ movz x7, :abs_g0:tempy2
+ movz x17, :abs_g0:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-264.d b/ld/testsuite/ld-aarch64/emit-relocs-264.d
new file mode 100644
index 0000000..1da911b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-264.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-264.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2820004 movz x4, #0x1000
+ +10008: R_AARCH64_MOVW_UABS_G0_NC tempy
+ +1000c: d28a0007 movz x7, #0x5000
+ +1000c: R_AARCH64_MOVW_UABS_G0_NC tempy2
+ +10010: d2824691 movz x17, #0x1234
+ +10010: R_AARCH64_MOVW_UABS_G0_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-264.s b/ld/testsuite/ld-aarch64/emit-relocs-264.s
new file mode 100644
index 0000000..32a5a17
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-264.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g0_nc:tempy
+ movz x7, :abs_g0_nc:tempy2
+ movz x17, :abs_g0_nc:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-265.d b/ld/testsuite/ld-aarch64/emit-relocs-265.d
new file mode 100644
index 0000000..d30db5f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-265.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-265.s
+#ld: -T relocs.ld --defsym tempy=0x100011000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_MOVW_UABS_G1 against symbol `tempy.*
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2a00024 movz x4, #0x1, lsl #16
+ +10008: R_AARCH64_MOVW_UABS_G1 tempy
+ +1000c: d2a00087 movz x7, #0x4, lsl #16
+ +1000c: R_AARCH64_MOVW_UABS_G1 tempy2
+ +10010: d2a00011 movz x17, #0x0, lsl #16
+ +10010: R_AARCH64_MOVW_UABS_G1 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-265.s b/ld/testsuite/ld-aarch64/emit-relocs-265.s
new file mode 100644
index 0000000..552a8ae
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-265.s
@@ -0,0 +1,10 @@
+.comm gempy,4,4
+.text
+
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g1:tempy
+ movz x7, :abs_g1:tempy2
+ movz x17, :abs_g1:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-266.d b/ld/testsuite/ld-aarch64/emit-relocs-266.d
new file mode 100644
index 0000000..fde9090
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-266.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-266.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2a00024 movz x4, #0x1, lsl #16
+ +10008: R_AARCH64_MOVW_UABS_G1_NC tempy
+ +1000c: d2a00087 movz x7, #0x4, lsl #16
+ +1000c: R_AARCH64_MOVW_UABS_G1_NC tempy2
+ +10010: d2a00011 movz x17, #0x0, lsl #16
+ +10010: R_AARCH64_MOVW_UABS_G1_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-266.s b/ld/testsuite/ld-aarch64/emit-relocs-266.s
new file mode 100644
index 0000000..7c23e87
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-266.s
@@ -0,0 +1,10 @@
+.comm gempy,4,4
+.text
+
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g1_nc:tempy
+ movz x7, :abs_g1_nc:tempy2
+ movz x17, :abs_g1_nc:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-267.d b/ld/testsuite/ld-aarch64/emit-relocs-267.d
new file mode 100644
index 0000000..9cc495c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-267.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-267.s
+#ld: -T relocs.ld --defsym tempy=0x63001000 --defsym tempy2=0x4500000000 --defsym tempy3=0x1234567812345 -e0 --emit-relocs
+#error: .*truncated.*tempy3.*
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2c00004 movz x4, #0x0, lsl #32
+ +10008: R_AARCH64_MOVW_UABS_G2 tempy
+ +1000c: d2c008a7 movz x7, #0x45, lsl #32
+ +1000c: R_AARCH64_MOVW_UABS_G2 tempy2
+ +10010: d2c468b1 movz x17, #0x2345, lsl #32
+ +10010: R_AARCH64_MOVW_UABS_G2 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-267.s b/ld/testsuite/ld-aarch64/emit-relocs-267.s
new file mode 100644
index 0000000..94a150e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-267.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g2:tempy
+ movz x7, :abs_g2:tempy2
+ movz x17, :abs_g2:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-268.d b/ld/testsuite/ld-aarch64/emit-relocs-268.d
new file mode 100644
index 0000000..126548b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-268.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-268.s
+#ld: -T relocs.ld --defsym tempy=0x63001000 --defsym tempy2=0x4500000000 --defsym tempy3=0x1234567812345 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2c00004 movz x4, #0x0, lsl #32
+ +10008: R_AARCH64_MOVW_UABS_G2_NC tempy
+ +1000c: d2c008a7 movz x7, #0x45, lsl #32
+ +1000c: R_AARCH64_MOVW_UABS_G2_NC tempy2
+ +10010: d2c468b1 movz x17, #0x2345, lsl #32
+ +10010: R_AARCH64_MOVW_UABS_G2_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-268.s b/ld/testsuite/ld-aarch64/emit-relocs-268.s
new file mode 100644
index 0000000..5928043
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-268.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g2_nc:tempy
+ movz x7, :abs_g2_nc:tempy2
+ movz x17, :abs_g2_nc:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-269.d b/ld/testsuite/ld-aarch64/emit-relocs-269.d
new file mode 100644
index 0000000..a911532
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-269.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-269.s
+#ld: -T relocs.ld --defsym tempy=0x6300100100100100 --defsym tempy2=0xf00df00df00df00d --defsym tempy3=0x1234567812345 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2ec6004 movz x4, #0x6300, lsl #48
+ +10008: R_AARCH64_MOVW_UABS_G3 tempy
+ +1000c: d2fe01a7 movz x7, #0xf00d, lsl #48
+ +1000c: R_AARCH64_MOVW_UABS_G3 tempy2
+ +10010: d2e00031 movz x17, #0x1, lsl #48
+ +10010: R_AARCH64_MOVW_UABS_G3 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-269.s b/ld/testsuite/ld-aarch64/emit-relocs-269.s
new file mode 100644
index 0000000..b0f11a0
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-269.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g3:tempy
+ movz x7, :abs_g3:tempy2
+ movz x17, :abs_g3:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-270-bad.d b/ld/testsuite/ld-aarch64/emit-relocs-270-bad.d
new file mode 100644
index 0000000..a781a5a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-270-bad.d
@@ -0,0 +1,15 @@
+#source: emit-relocs-270.s
+#ld: -T relocs.ld --defsym tempy=0x10012 --defsym tempy2=0x45000 --defsym tempy3=-292 -e0 --emit-relocs
+#error: .*truncated.*tempy[12].*
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2820244 movz x4, #0x1012
+ +10008: R_AARCH64_MOVW_SABS_G0 tempy
+ +1000c: d288a007 movz x7, #0x4500
+ +1000c: R_AARCH64_MOVW_SABS_G0 tempy2
+ +10010: 92802471 movn x17, #0x123
+ +10010: R_AARCH64_MOVW_SABS_G0 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-270.d b/ld/testsuite/ld-aarch64/emit-relocs-270.d
new file mode 100644
index 0000000..6e68aec
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-270.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-270.s
+#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=0x4500 --defsym tempy3=-292 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2820244 movz x4, #0x1012
+ +10008: R_AARCH64_MOVW_SABS_G0 tempy
+ +1000c: d288a007 movz x7, #0x4500
+ +1000c: R_AARCH64_MOVW_SABS_G0 tempy2
+ +10010: 92802471 movn x17, #0x123
+ +10010: R_AARCH64_MOVW_SABS_G0 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-270.s b/ld/testsuite/ld-aarch64/emit-relocs-270.s
new file mode 100644
index 0000000..b508f88
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-270.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g0_s:tempy
+ movz x7, :abs_g0_s:tempy2
+ movz x17, :abs_g0_s:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-271.d b/ld/testsuite/ld-aarch64/emit-relocs-271.d
new file mode 100644
index 0000000..5a230c7
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-271.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-271.s
+#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=0x674500 --defsym tempy3=-292 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2a00004 movz x4, #0x0, lsl #16
+ +10008: R_AARCH64_MOVW_SABS_G1 tempy
+ +1000c: d2a00ce7 movz x7, #0x67, lsl #16
+ +1000c: R_AARCH64_MOVW_SABS_G1 tempy2
+ +10010: 92a00011 movn x17, #0x0, lsl #16
+ +10010: R_AARCH64_MOVW_SABS_G1 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-271.s b/ld/testsuite/ld-aarch64/emit-relocs-271.s
new file mode 100644
index 0000000..bb14fbb
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-271.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g1_s:tempy
+ movz x7, :abs_g1_s:tempy2
+ movz x17, :abs_g1_s:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-272.d b/ld/testsuite/ld-aarch64/emit-relocs-272.d
new file mode 100644
index 0000000..a02a52e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-272.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-272.s
+#ld: -T relocs.ld --defsym tempy=0x1012 --defsym tempy2=-12345678912345 --defsym tempy3=-292 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2c00004 movz x4, #0x0, lsl #32
+ +10008: R_AARCH64_MOVW_SABS_G2 tempy
+ +1000c: 92c16747 movn x7, #0xb3a, lsl #32
+ +1000c: R_AARCH64_MOVW_SABS_G2 tempy2
+ +10010: 92c00011 movn x17, #0x0, lsl #32
+ +10010: R_AARCH64_MOVW_SABS_G2 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-272.s b/ld/testsuite/ld-aarch64/emit-relocs-272.s
new file mode 100644
index 0000000..daa625a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-272.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :abs_g2_s:tempy
+ movz x7, :abs_g2_s:tempy2
+ movz x17, :abs_g2_s:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-273.d b/ld/testsuite/ld-aarch64/emit-relocs-273.d
new file mode 100644
index 0000000..13ed221
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-273.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-273.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 58007fc4 ldr x4, 11000 <tempy>
+ +10008: R_AARCH64_LD_PREL_LO19 tempy
+ +1000c: 581a7fa7 ldr x7, 45000 <tempy2>
+ +1000c: R_AARCH64_LD_PREL_LO19 tempy2
+ +10010: 58f89131 ldr x17, 1234 <tempy3>
+ +10010: R_AARCH64_LD_PREL_LO19 tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-273.s b/ld/testsuite/ld-aarch64/emit-relocs-273.s
new file mode 100644
index 0000000..d1bad37
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-273.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr x4,tempy
+ ldr x7,tempy2
+ ldr x17,tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-274.d b/ld/testsuite/ld-aarch64/emit-relocs-274.d
new file mode 100644
index 0000000..f38ecbd
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-274.d
@@ -0,0 +1,12 @@
+#source: emit-relocs-274.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 10007fc2 adr x2, .*
+ +10008: R_AARCH64_ADR_PREL_LO21 tempy
+ +1000c: 101a7fa7 adr x7, 45000 .*
+ +1000c: R_AARCH64_ADR_PREL_LO21 tempy2
+ +10010: 10f89131 adr x17, .*
+ +10010: R_AARCH64_ADR_PREL_LO21 tempy3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-274.s b/ld/testsuite/ld-aarch64/emit-relocs-274.s
new file mode 100644
index 0000000..8668b7c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-274.s
@@ -0,0 +1,5 @@
+ and x0,x0,x0
+ and x0,x0,#1
+ adr x2,tempy
+ adr x7,tempy2
+ adr x17,tempy3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-275.d b/ld/testsuite/ld-aarch64/emit-relocs-275.d
new file mode 100644
index 0000000..94e61a7
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-275.d
@@ -0,0 +1,15 @@
+#source: emit-relocs-275.s
+#ld: -T relocs.ld --defsym tempy=0x200011000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#error: .*\(.text\+0x\d+\): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against symbol `tempy'
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: b0000002 adrp x2, .*
+ +10008: R_AARCH64_ADR_PREL_PG_HI21 tempy
+ +1000c: b00001a7 adrp x7, .*
+ +1000c: R_AARCH64_ADR_PREL_PG_HI21 tempy2
+ +10010: b0ffff91 adrp x17, .*
+ +10010: R_AARCH64_ADR_PREL_PG_HI21 tempy3
+
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-275.s b/ld/testsuite/ld-aarch64/emit-relocs-275.s
new file mode 100644
index 0000000..92a2935
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-275.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+ and x0,x0,x0
+ and x0,x0,#1
+ adrp x2,tempy
+ adrp x7,tempy2
+ adrp x17,tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-276.d b/ld/testsuite/ld-aarch64/emit-relocs-276.d
new file mode 100644
index 0000000..f133253
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-276.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-275.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: b0000002 adrp x2, 11000 <tempy>
+ +10008: R_AARCH64_ADR_PREL_PG_HI21 tempy
+ +1000c: b00001a7 adrp x7, 45000 <tempy2>
+ +1000c: R_AARCH64_ADR_PREL_PG_HI21 tempy2
+ +10010: b0ffff91 adrp x17, 1000 <tempy3-0x234>
+ +10010: R_AARCH64_ADR_PREL_PG_HI21 tempy3
+
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-276.s b/ld/testsuite/ld-aarch64/emit-relocs-276.s
new file mode 100644
index 0000000..92a2935
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-276.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+ and x0,x0,x0
+ and x0,x0,#1
+ adrp x2,tempy
+ adrp x7,tempy2
+ adrp x17,tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-277.d b/ld/testsuite/ld-aarch64/emit-relocs-277.d
new file mode 100644
index 0000000..2145441
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-277.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-277.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 91006064 add x4, x3,.*
+ +10008: R_AARCH64_ADD_ABS_LO12_NC tempy
+ +1000c: 9100e067 add x7, x3,.*
+ +1000c: R_AARCH64_ADD_ABS_LO12_NC tempy2
+ +10010: 9108d071 add x17, x3,.*
+ +10010: R_AARCH64_ADD_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-277.s b/ld/testsuite/ld-aarch64/emit-relocs-277.s
new file mode 100644
index 0000000..efb0bf0
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-277.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ add x4, x3, #:lo12:tempy
+ add x7, x3, #:lo12:tempy2
+ add x17, x3, #:lo12:tempy3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-278.d b/ld/testsuite/ld-aarch64/emit-relocs-278.d
new file mode 100644
index 0000000..29a0095
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-278.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-278.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 3d406064 ldr b4, \[x3,.*
+ +10008: R_AARCH64_LDST8_ABS_LO12_NC tempy
+ +1000c: 3d40e067 ldr b7, \[x3,.*
+ +1000c: R_AARCH64_LDST8_ABS_LO12_NC tempy2
+ +10010: 3d48d071 ldr b17, \[x3,.*
+ +10010: R_AARCH64_LDST8_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-278.s b/ld/testsuite/ld-aarch64/emit-relocs-278.s
new file mode 100644
index 0000000..2f7f321
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-278.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr b4, [x3, #:lo12:tempy]
+ ldr b7, [x3, #:lo12:tempy2]
+ ldr b17, [x3, #:lo12:tempy3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-279-bad.d b/ld/testsuite/ld-aarch64/emit-relocs-279-bad.d
new file mode 100644
index 0000000..02b5ff6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-279-bad.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-279.s
+#ld: -T relocs.ld --defsym target=0xc000 --defsym target2=0x45678 -e0 --emit-relocs
+#error: .*truncated.*target2.*
+#objdump: -dr
+#...
+ +10000: 8a000000 and .*
+ +10004: 8a000000 and .*
+ +10008: 8a000000 and .*
+ +1000c: 8a000000 and .*
+ +10010: 17ffeffc b c000 <target>
+ +10010: R_AARCH64_TSTBR14 target
+ +10014: 17ffefff b c010 <target\+0x10>
+ +10014: R_AARCH64_TSTBR14 target\+0x10
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-279.d b/ld/testsuite/ld-aarch64/emit-relocs-279.d
new file mode 100644
index 0000000..6980f81
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-279.d
@@ -0,0 +1,17 @@
+#source: emit-relocs-279.s
+#ld: -T relocs.ld --defsym target=0xc000 --defsym target2=0x12340 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and .*
+ +10004: 8a000000 and .*
+ +10008: 8a000000 and .*
+ +1000c: 8a000000 and .*
+ +10010: 363dff84 tbz w4, #7, c000 <target>
+ +10010: R_AARCH64_TSTBR14 target
+ +10014: b745ffe7 tbnz x7, #40, c010 <target\+0x10>
+ +10014: R_AARCH64_TSTBR14 target\+0x10
+ +10018: 3619194c tbz w12, #3, 12340 <target2>
+ +10018: R_AARCH64_TSTBR14 target2
+ +1001c: b7c118d1 tbnz x17, #56, 12334 <target.*
+ +1001c: R_AARCH64_TSTBR14 target.*
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-279.s b/ld/testsuite/ld-aarch64/emit-relocs-279.s
new file mode 100644
index 0000000..f70c78b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-279.s
@@ -0,0 +1,8 @@
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ tbz x4, 7, target
+ tbnz x7, 40, target+16
+ tbz x12, 3, target2
+ tbnz x17, 56, target2-12
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-280.d b/ld/testsuite/ld-aarch64/emit-relocs-280.d
new file mode 100644
index 0000000..9b954ff
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-280.d
@@ -0,0 +1,12 @@
+#source: emit-relocs-280.s
+#ld: -T relocs.ld --defsym target=0xc000 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and .*
+ +10004: 8a000000 and .*
+ +10008: 8a000000 and .*
+ +1000c: 8a000000 and .*
+ +10010: 54fdff80 b.eq c000 <target>
+ +10010: R_AARCH64_CONDBR19 target
+ +10014: 54fdffe0 b.eq c010 <target\+0x10>
+ +10014: R_AARCH64_CONDBR19 target\+0x10
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-280.s b/ld/testsuite/ld-aarch64/emit-relocs-280.s
new file mode 100644
index 0000000..8f5ec34
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-280.s
@@ -0,0 +1,6 @@
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ beq target
+ beq target+16
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-282.d b/ld/testsuite/ld-aarch64/emit-relocs-282.d
new file mode 100644
index 0000000..fc5764b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-282.d
@@ -0,0 +1,12 @@
+#source: emit-relocs-282.s
+#ld: -T relocs.ld --defsym target=0xc000 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and .*
+ +10004: 8a000000 and .*
+ +10008: 8a000000 and .*
+ +1000c: 8a000000 and .*
+ +10010: 17ffeffc b c000 <target>
+ +10010: R_AARCH64_JUMP26 target
+ +10014: 17ffefff b c010 <target\+0x10>
+ +10014: R_AARCH64_JUMP26 target\+0x10
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-282.s b/ld/testsuite/ld-aarch64/emit-relocs-282.s
new file mode 100644
index 0000000..b249b6b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-282.s
@@ -0,0 +1,6 @@
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ b target
+ b target+16
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-283.d b/ld/testsuite/ld-aarch64/emit-relocs-283.d
new file mode 100644
index 0000000..708fc7c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-283.d
@@ -0,0 +1,12 @@
+#source: emit-relocs-283.s
+#ld: -T relocs.ld --defsym target=0xc000 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and .*
+ +10004: 8a000000 and .*
+ +10008: 8a000000 and .*
+ +1000c: 8a000000 and .*
+ +10010: 97ffeffc bl c000 <target>
+ +10010: R_AARCH64_CALL26 target
+ +10014: 97ffefff bl c010 <target\+0x10>
+ +10014: R_AARCH64_CALL26 target\+0x10
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-283.s b/ld/testsuite/ld-aarch64/emit-relocs-283.s
new file mode 100644
index 0000000..9c9f509
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-283.s
@@ -0,0 +1,6 @@
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ bl target
+ bl target+16
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-284.d b/ld/testsuite/ld-aarch64/emit-relocs-284.d
new file mode 100644
index 0000000..5cb6dac
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-284.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-284.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 7d403064 ldr h4, \[x3,.*
+ +10008: R_AARCH64_LDST16_ABS_LO12_NC tempy
+ +1000c: 7d407067 ldr h7, \[x3,.*
+ +1000c: R_AARCH64_LDST16_ABS_LO12_NC tempy2
+ +10010: 7d446871 ldr h17, \[x3,.*
+ +10010: R_AARCH64_LDST16_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-284.s b/ld/testsuite/ld-aarch64/emit-relocs-284.s
new file mode 100644
index 0000000..ffd213b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-284.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr h4, [x3, #:lo12:tempy]
+ ldr h7, [x3, #:lo12:tempy2]
+ ldr h17, [x3, #:lo12:tempy3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-285.d b/ld/testsuite/ld-aarch64/emit-relocs-285.d
new file mode 100644
index 0000000..8bf8270
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-285.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-285.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: b9401864 ldr w4, \[x3,.*
+ +10008: R_AARCH64_LDST32_ABS_LO12_NC tempy
+ +1000c: b9403867 ldr w7, \[x3,.*
+ +1000c: R_AARCH64_LDST32_ABS_LO12_NC tempy2
+ +10010: b9423471 ldr w17, \[x3,.*
+ +10010: R_AARCH64_LDST32_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-285.s b/ld/testsuite/ld-aarch64/emit-relocs-285.s
new file mode 100644
index 0000000..245f8be
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-285.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr w4, [x3, #:lo12:tempy]
+ ldr w7, [x3, #:lo12:tempy2]
+ ldr w17, [x3, #:lo12:tempy3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-286-bad.d b/ld/testsuite/ld-aarch64/emit-relocs-286-bad.d
new file mode 100644
index 0000000..50cd605
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-286-bad.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-286.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1234 -e0 --emit-relocs
+#error: .*truncated.*tempy3.*
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: f9400c64 ldr x4, \[x3,.*
+ +10008: R_AARCH64_LDST64_ABS_LO12_NC tempy
+ +1000c: f9401c67 ldr x7, \[x3,.*
+ +1000c: R_AARCH64_LDST64_ABS_LO12_NC tempy2
+ +10010: f9411871 ldr x17, \[x3,.*
+ +10010: R_AARCH64_LDST64_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-286.d b/ld/testsuite/ld-aarch64/emit-relocs-286.d
new file mode 100644
index 0000000..851fa7b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-286.d
@@ -0,0 +1,13 @@
+#source: emit-relocs-286.s
+#ld: -T relocs.ld --defsym tempy=0x11018 --defsym tempy2=0x45038 --defsym tempy3=0x1230 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: f9400c64 ldr x4, \[x3,.*
+ +10008: R_AARCH64_LDST64_ABS_LO12_NC tempy
+ +1000c: f9401c67 ldr x7, \[x3,.*
+ +1000c: R_AARCH64_LDST64_ABS_LO12_NC tempy2
+ +10010: f9411871 ldr x17, \[x3,.*
+ +10010: R_AARCH64_LDST64_ABS_LO12_NC tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-286.s b/ld/testsuite/ld-aarch64/emit-relocs-286.s
new file mode 100644
index 0000000..78b508f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-286.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr x4, [x3, #:lo12:tempy]
+ ldr x7, [x3, #:lo12:tempy2]
+ ldr x17, [x3, #:lo12:tempy3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-287.d b/ld/testsuite/ld-aarch64/emit-relocs-287.d
new file mode 100644
index 0000000..4d5fd43
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-287.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-287.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 --defsym _GOT_=0x10000 -e0 --emit-relocs
+#objdump: -dr
+
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: d2820004 movz x4, #0x1000
+ +10008: R_AARCH64_MOVW_PREL_G0 _GOT_
+ +1000c: d28a0007 movz x7, #0x5000
+ +1000c: R_AARCH64_MOVW_PREL_G0 _GOT_
+ +10010: d2824691 movz x17, #0x1234
+ +10010: R_AARCH64_MOVW_PREL_G0 _GOT_
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-287.s b/ld/testsuite/ld-aarch64/emit-relocs-287.s
new file mode 100644
index 0000000..ae9476f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-287.s
@@ -0,0 +1,9 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ movz x4, :prel_g0:tempy
+ movz x7, :prel_g0:tempy2
+ movz x17, :prel_g0:tempy3
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-299.d b/ld/testsuite/ld-aarch64/emit-relocs-299.d
new file mode 100644
index 0000000..d24b442
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-299.d
@@ -0,0 +1,12 @@
+#source: emit-relocs-299.s
+#ld: -T relocs.ld --defsym tempy=0x11030 --defsym tempy2=0x45fa0 --defsym tempy3=0x1230 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 3dc00c64 ldr q4, \[x3,.*
+ +10008: R_AARCH64_LDST128_ABS_LO12_NC tempy
+ +1000c: 3dc3e867 ldr q7, \[x3,.*
+ +1000c: R_AARCH64_LDST128_ABS_LO12_NC tempy2
+ +10010: 3dc08c71 ldr q17, \[x3,.*
+ +10010: R_AARCH64_LDST128_ABS_LO12_NC tempy3
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-299.s b/ld/testsuite/ld-aarch64/emit-relocs-299.s
new file mode 100644
index 0000000..b1fe6cf
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-299.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr q4, [x3, #:lo12:tempy]
+ ldr q7, [x3, #:lo12:tempy2]
+ ldr q17, [x3, #:lo12:tempy3]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-311.d b/ld/testsuite/ld-aarch64/emit-relocs-311.d
new file mode 100644
index 0000000..5f1b47f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-311.d
@@ -0,0 +1,14 @@
+#source: emit-relocs-311.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: b0000002 adrp x2, 11000 <tempy>
+ +10008: R_AARCH64_ADR_PREL_PG_HI21 tempy
+ +1000c: b00001a7 adrp x7, 45000 <tempy2>
+ +1000c: R_AARCH64_ADR_PREL_PG_HI21 tempy2
+ +10010: b0ffff91 adrp x17, 1000 <tempy3-0x234>
+ +10010: R_AARCH64_ADR_PREL_PG_HI21 tempy3
+ +10014: 90000083 adrp x3, 20000 <tempy[+]0xf000>
+ +10014: R_AARCH64_ADR_GOT_PAGE gempy
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-311.s b/ld/testsuite/ld-aarch64/emit-relocs-311.s
new file mode 100644
index 0000000..182f0d4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-311.s
@@ -0,0 +1,8 @@
+.comm gempy,4,4
+.text
+ and x0,x0,x0
+ and x0,x0,#1
+ adrp x2,tempy
+ adrp x7,tempy2
+ adrp x17,tempy3
+ adrp x3,:got:gempy
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-312.d b/ld/testsuite/ld-aarch64/emit-relocs-312.d
new file mode 100644
index 0000000..8d50d8d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-312.d
@@ -0,0 +1,19 @@
+#source: emit-relocs-312.s
+#ld: -T relocs.ld --defsym tempy=0x11000 --defsym tempy2=0x45000 --defsym tempy3=0x1234 -e0 --emit-relocs
+#objdump: -dr
+#...
+ +10000: 8a000000 and x0, x0, x0
+ +10004: 92400000 and x0, x0, #0x1
+ +10008: 58007fc4 ldr x4, 11000 <tempy>
+ +10008: R_AARCH64_LD_PREL_LO19 tempy
+ +1000c: 581a7fa7 ldr x7, 45000 <tempy2>
+ +1000c: R_AARCH64_LD_PREL_LO19 tempy2
+ +10010: 58f89131 ldr x17, 1234 <tempy3>
+ +10010: R_AARCH64_LD_PREL_LO19 tempy3
+ +10014: f9400843 ldr x3, \[x2.*
+ +10014: R_AARCH64_LD64_GOT_LO12_NC jempy
+ +10018: f9400444 ldr x4, \[x2.*
+ +10018: R_AARCH64_LD64_GOT_LO12_NC gempy
+ +1001c: f9400045 ldr x5, \[x2.*
+ +1001c: R_AARCH64_LD64_GOT_LO12_NC lempy
+
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-312.s b/ld/testsuite/ld-aarch64/emit-relocs-312.s
new file mode 100644
index 0000000..29494ee
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs-312.s
@@ -0,0 +1,13 @@
+.comm gempy,4
+.comm jempy,4
+.comm lempy,4
+.text
+
+ and x0,x0,x0
+ and x0,x0,#0x1
+ ldr x4,tempy
+ ldr x7,tempy2
+ ldr x17,tempy3
+ ldr x3, [x2, #:got_lo12:jempy]
+ ldr x4, [x2, #:got_lo12:gempy]
+ ldr x5, [x2, #:got_lo12:lempy]
diff --git a/ld/testsuite/ld-aarch64/emit-relocs1.s b/ld/testsuite/ld-aarch64/emit-relocs1.s
new file mode 100644
index 0000000..b249b6b
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/emit-relocs1.s
@@ -0,0 +1,6 @@
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ and x0,x0,x0
+ b target
+ b target+16
diff --git a/ld/testsuite/ld-aarch64/farcall-b-none-function.d b/ld/testsuite/ld-aarch64/farcall-b-none-function.d
new file mode 100644
index 0000000..34a6568
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-none-function.d
@@ -0,0 +1,5 @@
+#name: aarch64-farcall-b-none-function
+#source: farcall-b-none-function.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar'.*
diff --git a/ld/testsuite/ld-aarch64/farcall-b-none-function.s b/ld/testsuite/ld-aarch64/farcall-b-none-function.s
new file mode 100644
index 0000000..5e5bc8d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b-none-function.s
@@ -0,0 +1,16 @@
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ b bar
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-b.d b/ld/testsuite/ld-aarch64/farcall-b.d
new file mode 100644
index 0000000..f3cb5ef
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b.d
@@ -0,0 +1,22 @@
+#name: aarch64-farcall-b
+#source: farcall-b.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+0000000000001000 <_start>:
+ +1000: 14000002 b 1008 <__bar_veneer>
+ +1004: d65f03c0 ret
+0000000000001008 <__bar_veneer>:
+ 1008: 90040010 adrp x16, 8001000 <bar>
+ 100c: 91000210 add x16, x16, #0x0
+ 1010: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+0000000008001000 <bar>:
+ 8001000: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-b.s b/ld/testsuite/ld-aarch64/farcall-b.s
new file mode 100644
index 0000000..8ab3103
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-b.s
@@ -0,0 +1,17 @@
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ b bar
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-back.d b/ld/testsuite/ld-aarch64/farcall-back.d
new file mode 100644
index 0000000..9ff43b3
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-back.d
@@ -0,0 +1,72 @@
+#name: aarch64-farcall-back
+#source: farcall-back.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x100000000
+#notarget: aarch64_be-*-*
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+0000000000001000 <_start>:
+ 1000: 14000412 b 2048 <__bar1_veneer>
+ 1004: 94000411 bl 2048 <__bar1_veneer>
+ 1008: 14000406 b 2020 <__bar2_veneer>
+ 100c: 94000405 bl 2020 <__bar2_veneer>
+ 1010: 14000408 b 2030 <__bar3_veneer>
+ 1014: 94000407 bl 2030 <__bar3_veneer>
+ 1018: d65f03c0 ret
+ ...
+
+000000000000201c <_back>:
+ 201c: d65f03c0 ret
+
+0000000000002020 <__bar2_veneer>:
+ 2020: f07ffff0 adrp x16, 100001000 <bar1\+0x1000>
+ 2024: 91002210 add x16, x16, #0x8
+ 2028: d61f0200 br x16
+ 202c: 00000000 .inst 0x00000000 ; undefined
+
+0000000000002030 <__bar3_veneer>:
+ 2030: 58000090 ldr x16, 2040 <__bar3_veneer\+0x10>
+ 2034: 10000011 adr x17, 2034 <__bar3_veneer\+0x4>
+ 2038: 8b110210 add x16, x16, x17
+ 203c: d61f0200 br x16
+ 2040: ffffffdc .word 0xffffffdc
+ 2044: 00000000 .word 0x00000000
+
+0000000000002048 <__bar1_veneer>:
+ 2048: d07ffff0 adrp x16, 100000000 <bar1>
+ 204c: 91000210 add x16, x16, #0x0
+ 2050: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+0000000100000000 <bar1>:
+ 100000000: d65f03c0 ret
+ 100000004: 14000805 b 100002018 <___start_veneer>
+ ...
+
+0000000100001008 <bar2>:
+ 100001008: d65f03c0 ret
+ 10000100c: 14000403 b 100002018 <___start_veneer>
+ ...
+
+0000000100002010 <bar3>:
+ 100002010: d65f03c0 ret
+ 100002014: 14000007 b 100002030 <___back_veneer>
+
+0000000100002018 <___start_veneer>:
+ 100002018: 58000090 ldr x16, 100002028 <___start_veneer\+0x10>
+ 10000201c: 10000011 adr x17, 10000201c <___start_veneer\+0x4>
+ 100002020: 8b110210 add x16, x16, x17
+ 100002024: d61f0200 br x16
+ 100002028: ffffefe4 .word 0xffffefe4
+ 10000202c: fffffffe .word 0xfffffffe
+
+0000000100002030 <___back_veneer>:
+ 100002030: 90800010 adrp x16, 2000 <_start\+0x1000>
+ 100002034: 91007210 add x16, x16, #0x1c
+ 100002038: d61f0200 br x16
+ ...
diff --git a/ld/testsuite/ld-aarch64/farcall-back.s b/ld/testsuite/ld-aarch64/farcall-back.s
new file mode 100644
index 0000000..d0a3bd5
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-back.s
@@ -0,0 +1,42 @@
+ .global _start
+ .global _back
+ .global bar1
+ .global bar2
+ .global bar3
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+ .type _start, @function
+_start:
+ b bar1
+ bl bar1
+ b bar2
+ bl bar2
+ b bar3
+ bl bar3
+ ret
+ .space 0x1000
+ .type _back, @function
+_back: ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+ .type bar1, @function
+bar1:
+ ret
+ b _start
+
+ .space 0x1000
+ .type bar2, @function
+bar2:
+ ret
+ b _start
+
+ .space 0x1000
+ .type bar3, @function
+bar3:
+ ret
+ b _back
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-none-function.d b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d
new file mode 100644
index 0000000..6ce9ca4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d
@@ -0,0 +1,5 @@
+#name: aarch64-farcall-bl-none-function
+#source: farcall-bl-none-function.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against symbol `bar'.*
diff --git a/ld/testsuite/ld-aarch64/farcall-bl-none-function.s b/ld/testsuite/ld-aarch64/farcall-bl-none-function.s
new file mode 100644
index 0000000..89aa85a
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl-none-function.s
@@ -0,0 +1,16 @@
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ bl bar
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl.d b/ld/testsuite/ld-aarch64/farcall-bl.d
new file mode 100644
index 0000000..2bdd2c4
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl.d
@@ -0,0 +1,23 @@
+#name: aarch64-farcall-bl
+#source: farcall-bl.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001000
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+0000000000001000 <_start>:
+ +1000: 94000002 bl 1008 <__bar_veneer>
+ +1004: d65f03c0 ret
+
+0000000000001008 <__bar_veneer>:
+ 1008: 90040010 adrp x16, 8001000 <bar>
+ 100c: 91000210 add x16, x16, #0x0
+ 1010: d61f0200 br x16
+ ...
+
+Disassembly of section .foo:
+
+0000000008001000 <bar>:
+ 8001000: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/farcall-bl.s b/ld/testsuite/ld-aarch64/farcall-bl.s
new file mode 100644
index 0000000..432b120
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-bl.s
@@ -0,0 +1,17 @@
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ bl bar
+ ret
+
+# We will place the section .foo at 0x8001000.
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/farcall-section.d b/ld/testsuite/ld-aarch64/farcall-section.d
new file mode 100644
index 0000000..85775e1
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-section.d
@@ -0,0 +1,5 @@
+#name: Aarch64 farcall to symbol of type STT_SECTION
+#source: farcall-section.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8001014
+#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against `.foo'
diff --git a/ld/testsuite/ld-aarch64/farcall-section.s b/ld/testsuite/ld-aarch64/farcall-section.s
new file mode 100644
index 0000000..86a070c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/farcall-section.s
@@ -0,0 +1,19 @@
+# Test to ensure that an Aarch64 call exceeding 128MB generates an error
+# if the destination is of type STT_SECTION (eg non-global symbol)
+
+ .global _start
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ bl bar
+
+# We will place the section .foo at 0x8001020.
+
+ .section .foo, "xa"
+
+bar:
+ ret
+
diff --git a/ld/testsuite/ld-aarch64/limit-b.d b/ld/testsuite/ld-aarch64/limit-b.d
new file mode 100644
index 0000000..95d4c8f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/limit-b.d
@@ -0,0 +1,17 @@
+#name: aarch64-limit-b
+#source: limit-b.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8000ffc
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+0000000000001000 <_start>:
+ 1000: 15ffffff b 8000ffc <bar>
+ 1004: d65f03c0 ret
+
+Disassembly of section .foo:
+
+0000000008000ffc <bar>:
+ 8000ffc: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/limit-b.s b/ld/testsuite/ld-aarch64/limit-b.s
new file mode 100644
index 0000000..2b9f432
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/limit-b.s
@@ -0,0 +1,19 @@
+# Test maximum encoding range of b
+
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ b bar
+ ret
+
+# We will place the section .foo at 0x8000ffc
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/limit-bl.d b/ld/testsuite/ld-aarch64/limit-bl.d
new file mode 100644
index 0000000..2eddeb7
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/limit-bl.d
@@ -0,0 +1,17 @@
+#name: aarch64-limit-bl
+#source: limit-bl.s
+#as:
+#ld: -Ttext 0x1000 --section-start .foo=0x8000ffc
+#objdump: -dr
+#...
+
+Disassembly of section .text:
+
+0000000000001000 <_start>:
+ 1000: 95ffffff bl 8000ffc <bar>
+ 1004: d65f03c0 ret
+
+Disassembly of section .foo:
+
+0000000008000ffc <bar>:
+ 8000ffc: d65f03c0 ret
diff --git a/ld/testsuite/ld-aarch64/limit-bl.s b/ld/testsuite/ld-aarch64/limit-bl.s
new file mode 100644
index 0000000..72f47a5
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/limit-bl.s
@@ -0,0 +1,19 @@
+# Test maximum encoding range of bl
+
+ .global _start
+ .global bar
+
+# We will place the section .text at 0x1000.
+
+ .text
+
+_start:
+ bl bar
+ ret
+
+# We will place the section .foo at 0x8000ffc
+
+ .section .foo, "xa"
+ .type bar, @function
+bar:
+ ret
diff --git a/ld/testsuite/ld-aarch64/relocs.ld b/ld/testsuite/ld-aarch64/relocs.ld
new file mode 100644
index 0000000..f42176e
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/relocs.ld
@@ -0,0 +1,19 @@
+/* Script for ld testsuite */
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x8000); . = 0x10000;
+ .text :
+ {
+ *(.before)
+ *(.text)
+ *(.after)
+ } =0
+ . = 0x20000;
+ .got : { *(.got) *(.got.plt)}
+ . = 0x12340000;
+ .far : { *(.far) }
+ .ARM.attributes 0 : { *(.ARM.atttributes) }
+}
diff --git a/ld/testsuite/ld-aarch64/tls-desc-ie.d b/ld/testsuite/ld-aarch64/tls-desc-ie.d
new file mode 100644
index 0000000..712e39c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-desc-ie.d
@@ -0,0 +1,36 @@
+#source: tls-desc-ie.s
+#ld: -shared -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
+ +10004: 91002000 add x0, x0, #0x8
+ +10008: 94000016 bl 10060 <v1\+0x10060>
+ +1000c: d503201f nop
+ +10010: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
+ +10014: f9400000 ldr x0, \[x0\]
+ +10018: d503201f nop
+ +1001c: d503201f nop
+ +10020: d53bd041 mrs x1, tpidr_el0
+ +10024: 8b000020 add x0, x1, x0
+ +10028: d53bd042 mrs x2, tpidr_el0
+ +1002c: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
+ +10030: f9400000 ldr x0, \[x0\]
+ +10034: 8b000040 add x0, x2, x0
+ +10038: b9400000 ldr w0, \[x0\]
+ +1003c: 0b000020 add w0, w1, w0
+
+Disassembly of section .plt:
+
+0000000000010040 <.plt>:
+ +10040: a9bf7bf0 stp x16, x30, \[sp,#-16\]!
+ +10044: 90000090 adrp x16, 20000 <_GLOBAL_OFFSET_TABLE_>
+ +10048: f9401611 ldr x17, \[x16,#40\]
+ +1004c: 9100a210 add x16, x16, #0x28
+ +10050: d61f0220 br x17
+ +10054: d503201f nop
+ +10058: d503201f nop
+ +1005c: d503201f nop
+ +10060: 90000090 adrp x16, 20000 <_GLOBAL_OFFSET_TABLE_>
+ +10064: f9401a11 ldr x17, \[x16,#48\]
+ +10068: 9100c210 add x16, x16, #0x30
+ +1006c: d61f0220 br x17
diff --git a/ld/testsuite/ld-aarch64/tls-desc-ie.s b/ld/testsuite/ld-aarch64/tls-desc-ie.s
new file mode 100644
index 0000000..93fd71c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-desc-ie.s
@@ -0,0 +1,32 @@
+ .global v1
+ .global v2
+ .section .tdata,"awT",%progbits
+v1:
+ .word 1
+
+ .text
+
+# This GD access does not relax. It consumes a double GOT slot.
+
+ adrp x0, :tlsgd:v2
+ add x0, x0, :tlsgd_lo12:v2
+ bl __tls_get_addr
+ nop
+
+# Test the combination of a TLSDESC-GD and IE access to the same
+# symbol. We expect the TLSDESC-GD to relax to IE.
+
+ adrp x0, :tlsdesc:v1
+ ldr x1, [x0, #:tlsdesc_lo12:v1]
+ add x0, x0, :tlsdesc_lo12:v1
+ .tlsdesccall v1
+ blr x1
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+
+ mrs x2, tpidr_el0
+ adrp x0, :gottprel:v1
+ ldr x0, [x0, #:gottprel_lo12:v1]
+ add x0, x2, x0
+ ldr w0, [x0]
+ add w0, w1, w0
diff --git a/ld/testsuite/ld-aarch64/tls-relax-all.d b/ld/testsuite/ld-aarch64/tls-relax-all.d
new file mode 100644
index 0000000..d3db04d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-all.d
@@ -0,0 +1,39 @@
+#source: tls-relax-all.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: a9bf7bfd stp x29, x30, \[sp,#-16\]!
+ +10004: 910003fd mov x29, sp
+ +10008: 90000080 adrp x0, 20000 <ie_var\+0x1fff0>
+ +1000c: f9400000 ldr x0, \[x0\]
+ +10010: d503201f nop
+ +10014: d503201f nop
+ +10018: d53bd041 mrs x1, tpidr_el0
+ +1001c: 8b000020 add x0, x1, x0
+ +10020: b9400001 ldr w1, \[x0\]
+ +10024: d2a00000 movz x0, #0x0, lsl #16
+ +10028: f2800280 movk x0, #0x14
+ +1002c: d503201f nop
+ +10030: d503201f nop
+ +10034: d53bd042 mrs x2, tpidr_el0
+ +10038: 8b000040 add x0, x2, x0
+ +1003c: b9400000 ldr w0, \[x0\]
+ +10040: 0b000021 add w1, w1, w0
+ +10044: 90000080 adrp x0, 20000 <ie_var\+0x1fff0>
+ +10048: f9400400 ldr x0, \[x0,#8\]
+ +1004c: d53bd041 mrs x1, tpidr_el0
+ +10050: 8b000020 add x0, x1, x0
+ +10054: b9400000 ldr w0, \[x0\]
+ +10058: 0b000021 add w1, w1, w0
+ +1005c: d2a00000 movz x0, #0x0, lsl #16
+ +10060: f2800380 movk x0, #0x1c
+ +10064: d53bd041 mrs x1, tpidr_el0
+ +10068: 8b000020 add x0, x1, x0
+ +1006c: b9400000 ldr w0, \[x0\]
+ +10070: 0b000021 add w1, w1, w0
+ +10074: d53bd042 mrs x2, tpidr_el0
+ +10078: d2a00000 movz x0, #0x0, lsl #16
+ +1007c: f2800400 movk x0, #0x20
+ +10080: 8b000040 add x0, x2, x0
+ +10084: b9400000 ldr w0, \[x0\]
+ +10088: 0b000020 add w0, w1, w0
diff --git a/ld/testsuite/ld-aarch64/tls-relax-all.s b/ld/testsuite/ld-aarch64/tls-relax-all.s
new file mode 100644
index 0000000..1bef53d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-all.s
@@ -0,0 +1,51 @@
+ .global gdesc_var_1
+ .global gd_var_1
+ .section .tdata,"awT",%progbits
+gdesc_var_1:
+ .word 1
+gdesc_var_2:
+ .word 2
+gd_var_1:
+ .word 3
+gd_var_2:
+ .word 4
+ie_var:
+ .word 5
+ .text
+ stp x29, x30, [sp, -16]!
+ add x29, sp, 0
+ adrp x0, :tlsdesc:gdesc_var_1
+ ldr x1, [x0, #:tlsdesc_lo12:gdesc_var_1]
+ add x0, x0, :tlsdesc_lo12:gdesc_var_1
+ .tlsdesccall gdesc_var_1
+ blr x1
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+ ldr w1, [x0]
+ adrp x0, :tlsdesc:gdesc_var_2
+ ldr x2, [x0, #:tlsdesc_lo12:gdesc_var_2]
+ add x0, x0, :tlsdesc_lo12:gdesc_var_2
+ .tlsdesccall gdesc_var_2
+ blr x2
+ mrs x2, tpidr_el0
+ add x0, x2, x0
+ ldr w0, [x0]
+ add w1, w1, w0
+ adrp x0, :tlsgd:gd_var_1
+ add x0, x0, :tlsgd_lo12:gd_var_1
+ bl __tls_get_addr
+ nop
+ ldr w0, [x0]
+ add w1, w1, w0
+ adrp x0, :tlsgd:gd_var_2
+ add x0, x0, :tlsgd_lo12:gd_var_2
+ bl __tls_get_addr
+ nop
+ ldr w0, [x0]
+ add w1, w1, w0
+ mrs x2, tpidr_el0
+ adrp x0, :gottprel:ie_var
+ ldr x0, [x0, #:gottprel_lo12:ie_var]
+ add x0, x2, x0
+ ldr w0, [x0]
+ add w0, w1, w0
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gd-ie.d b/ld/testsuite/ld-aarch64/tls-relax-gd-ie.d
new file mode 100644
index 0000000..a142f54
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gd-ie.d
@@ -0,0 +1,9 @@
+#source: tls-relax-gd-ie.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: 90000080 adrp x0, 20000 <var\+0x20000>
+ +10004: f9400000 ldr x0, \[x0\]
+ +10008: d53bd041 mrs x1, tpidr_el0
+ +1000c: 8b000020 add x0, x1, x0
+ +10010: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gd-ie.s b/ld/testsuite/ld-aarch64/tls-relax-gd-ie.s
new file mode 100644
index 0000000..88c7eec
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gd-ie.s
@@ -0,0 +1,10 @@
+ .global var
+ .section .tdata,"awT",%progbits
+var:
+ .word 2
+ .text
+ adrp x0, :tlsgd:var
+ add x0, x0, :tlsgd_lo12:var
+ bl __tls_get_addr
+ nop
+ ldr w0, [x0]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gd-le.d b/ld/testsuite/ld-aarch64/tls-relax-gd-le.d
new file mode 100644
index 0000000..b5ee39c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gd-le.d
@@ -0,0 +1,9 @@
+#source: tls-relax-gd-le.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d2a00000 movz x0, #0x0, lsl #16
+ +10004: f2800200 movk x0, #0x10
+ +10008: d53bd041 mrs x1, tpidr_el0
+ +1000c: 8b000020 add x0, x1, x0
+ +10010: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gd-le.s b/ld/testsuite/ld-aarch64/tls-relax-gd-le.s
new file mode 100644
index 0000000..eb6fc2f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gd-le.s
@@ -0,0 +1,9 @@
+ .section .tdata
+var:
+ .word 2
+ .text
+ adrp x0, :tlsgd:var
+ add x0, x0, :tlsgd_lo12:var
+ bl __tls_get_addr
+ nop
+ ldr w0, [x0]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d
new file mode 100644
index 0000000..f3307ae
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.d
@@ -0,0 +1,18 @@
+#source: tls-relax-gdesc-ie-2.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: 90000080 adrp x0, 20000 <var\+0x20000>
+ +10004: d503201f nop
+ +10008: f9400000 ldr x0, \[x0\]
+ +1000c: d503201f nop
+ +10010: d503201f nop
+ +10014: d503201f nop
+ +10018: d503201f nop
+ +1001c: d503201f nop
+ +10020: d503201f nop
+ +10024: d503201f nop
+ +10028: d503201f nop
+ +1002c: d53bd041 mrs x1, tpidr_el0
+ +10030: 8b000020 add x0, x1, x0
+ +10034: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.s
new file mode 100644
index 0000000..790b6c6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie-2.s
@@ -0,0 +1,24 @@
+// Test TLS Desc to TLS IE relaxation when instructions are not consecutive.
+
+ .global var
+ .section .tdata
+var:
+ .word 2
+ .text
+ adrp x0, :tlsdesc:var
+ nop
+ ldr x1, [x0, #:tlsdesc_lo12:var]
+ nop
+ nop
+ nop
+ add x0, x0, :tlsdesc_lo12:var
+ nop
+ nop
+ .tlsdesccall var
+ blr x1
+ nop
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+ ldr w0, [x0]
+ .global var
+ .section .tdata
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.d b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.d
new file mode 100644
index 0000000..691df06
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.d
@@ -0,0 +1,11 @@
+#source: tls-relax-gdesc-ie.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: 90000080 adrp x0, 20000 <var\+0x20000>
+ +10004: f9400000 ldr x0, \[x0\]
+ +10008: d503201f nop
+ +1000c: d503201f nop
+ +10010: d53bd041 mrs x1, tpidr_el0
+ +10014: 8b000020 add x0, x1, x0
+ +10018: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
new file mode 100644
index 0000000..c20690c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-ie.s
@@ -0,0 +1,13 @@
+ .global var
+ .section .tdata
+var:
+ .word 2
+ .text
+ adrp x0, :tlsdesc:var
+ ldr x1, [x0, #:tlsdesc_lo12:var]
+ add x0, x0, :tlsdesc_lo12:var
+ .tlsdesccall var
+ blr x1
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+ ldr w0, [x0]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.d b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.d
new file mode 100644
index 0000000..3c028e2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.d
@@ -0,0 +1,18 @@
+#source: tls-relax-gdesc-le-2.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d2a00000 movz x0, #0x0, lsl #16
+ +10004: d503201f nop
+ +10008: d503201f nop
+ +1000c: f2800200 movk x0, #0x10
+ +10010: d503201f nop
+ +10014: d503201f nop
+ +10018: d503201f nop
+ +1001c: d503201f nop
+ +10020: d503201f nop
+ +10024: d503201f nop
+ +10028: d503201f nop
+ +1002c: d53bd041 mrs x1, tpidr_el0
+ +10030: 8b000020 add x0, x1, x0
+ +10034: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.s
new file mode 100644
index 0000000..fb8bf66
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le-2.s
@@ -0,0 +1,22 @@
+# Test TLS Desc to TLS LE relaxation when instructions are not consecutive.
+
+ .section .tdata
+var:
+ .word 2
+ .text
+ adrp x0, :tlsdesc:var
+ nop
+ nop
+ ldr x1, [x0, #:tlsdesc_lo12:var]
+ nop
+ add x0, x0, :tlsdesc_lo12:var
+ nop
+ nop
+ nop
+ .tlsdesccall var
+ blr x1
+ nop
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+ ldr w0, [x0]
+ .section .tdata
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.d b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.d
new file mode 100644
index 0000000..afe0a56
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.d
@@ -0,0 +1,11 @@
+#source: tls-relax-gdesc-le.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d2a00000 movz x0, #0x0, lsl #16
+ +10004: f2800200 movk x0, #0x10
+ +10008: d503201f nop
+ +1000c: d503201f nop
+ +10010: d53bd041 mrs x1, tpidr_el0
+ +10014: 8b000020 add x0, x1, x0
+ +10018: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.s b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.s
new file mode 100644
index 0000000..28ee0f6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-gdesc-le.s
@@ -0,0 +1,12 @@
+ .section .tdata
+var:
+ .word 2
+ .text
+ adrp x0, :tlsdesc:var
+ ldr x1, [x0, #:tlsdesc_lo12:var]
+ add x0, x0, :tlsdesc_lo12:var
+ .tlsdesccall var
+ blr x1
+ mrs x1, tpidr_el0
+ add x0, x1, x0
+ ldr w0, [x0]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.d b/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.d
new file mode 100644
index 0000000..2f93955
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.d
@@ -0,0 +1,17 @@
+#source: tls-relax-ie-le-2.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d53bd041 mrs x1, tpidr_el0
+ +10004: d503201f nop
+ +10008: d503201f nop
+ +1000c: d2a00000 movz x0, #0x0, lsl #16
+ +10010: d503201f nop
+ +10014: d503201f nop
+ +10018: d503201f nop
+ +1001c: f2800200 movk x0, #0x10
+ +10020: d503201f nop
+ +10024: 8b000020 add x0, x1, x0
+ +10028: d503201f nop
+ +1002c: d503201f nop
+ +10030: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.s b/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.s
new file mode 100644
index 0000000..98b62e2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le-2.s
@@ -0,0 +1,20 @@
+# Test TLS IE to TLS LE relaxation when instructions are not consecutive.
+
+ .section .tdata
+var:
+ .word 2
+ .text
+ mrs x1, tpidr_el0
+ nop
+ nop
+ adrp x0, :gottprel:var
+ nop
+ nop
+ nop
+ ldr x0, [x0, #:gottprel_lo12:var]
+ nop
+ add x0, x1, x0
+ nop
+ nop
+ ldr w0, [x0]
+ .section .tdata
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.d b/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.d
new file mode 100644
index 0000000..a2fd823
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.d
@@ -0,0 +1,9 @@
+#source: tls-relax-ie-le-3.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d53bd042 mrs x2, tpidr_el0
+ +10004: d2a0000f movz x15, #0x0, lsl #16
+ +10008: f280020f movk x15, #0x10
+ +1000c: 8b0f004f add x15, x2, x15
+ +10010: b94001e0 ldr w0, \[x15\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.s b/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.s
new file mode 100644
index 0000000..70e7062
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le-3.s
@@ -0,0 +1,12 @@
+# Test TLS IE to TLS LE relaxation when using arbitrary registers.
+
+ .section .tdata
+var:
+ .word 2
+ .text
+ mrs x2, tpidr_el0
+ adrp x15, :gottprel:var
+ ldr x15, [x15, #:gottprel_lo12:var]
+ add x15, x2, x15
+ ldr w0, [x15]
+ .section .tdata
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le.d b/ld/testsuite/ld-aarch64/tls-relax-ie-le.d
new file mode 100644
index 0000000..ff3b344
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le.d
@@ -0,0 +1,9 @@
+#source: tls-relax-ie-le.s
+#ld: -T relocs.ld -e0
+#objdump: -dr
+#...
+ +10000: d53bd041 mrs x1, tpidr_el0
+ +10004: d2a00000 movz x0, #0x0, lsl #16
+ +10008: f2800200 movk x0, #0x10
+ +1000c: 8b000020 add x0, x1, x0
+ +10010: b9400000 ldr w0, \[x0\]
diff --git a/ld/testsuite/ld-aarch64/tls-relax-ie-le.s b/ld/testsuite/ld-aarch64/tls-relax-ie-le.s
new file mode 100644
index 0000000..093cda2
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/tls-relax-ie-le.s
@@ -0,0 +1,9 @@
+ .section .tdata
+var:
+ .word 2
+ .text
+ mrs x1, tpidr_el0
+ adrp x0, :gottprel:var
+ ldr x0, [x0, #:gottprel_lo12:var]
+ add x0, x1, x0
+ ldr w0, [x0]
diff --git a/ld/testsuite/ld-aarch64/weak-undefined.d b/ld/testsuite/ld-aarch64/weak-undefined.d
new file mode 100644
index 0000000..22a9860
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/weak-undefined.d
@@ -0,0 +1,18 @@
+#source: weak-undefined.s
+#ld: -Ttext 0xF0000000 -T relocs.ld -e0 --emit-relocs
+#objdump: -d
+#...
+ +f0000000: 54000001 b\.ne f0000000 <main>
+ +f0000004: 54000000 b\.eq f0000004 <main\+0x4>
+ +f0000008: 54000002 b\.cs f0000008 <main\+0x8>
+ +f000000c: 54000003 b\.cc f000000c <main\+0xc>
+ +f0000010: 5400000c b\.gt f0000010 <main\+0x10>
+ +f0000014: 5400000a b\.ge f0000014 <main\+0x14>
+ +f0000018: 5400000b b\.lt f0000018 <main\+0x18>
+ +f000001c: 5400000d b\.le f000001c <main\+0x1c>
+ +f0000020: d503201f nop
+ +f0000024: d503201f nop
+ +f0000028: 58000000 ldr x0, f0000028 <main\+0x28>
+ +f000002c: 10000000 adr x0, f000002c <main\+0x2c>
+ +f0000030: 90000000 adrp x0, f0000000 <main>
+ +f0000034: 91000000 add x0, x0, #0x0
diff --git a/ld/testsuite/ld-aarch64/weak-undefined.s b/ld/testsuite/ld-aarch64/weak-undefined.s
new file mode 100644
index 0000000..692798f
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/weak-undefined.s
@@ -0,0 +1,18 @@
+.text
+ .weak foo
+ .global main
+main:
+ b.ne foo
+ b.eq foo
+ b.cs foo
+ b.cc foo
+ b.gt foo
+ b.ge foo
+ b.lt foo
+ b.le foo
+ b foo
+ bl foo
+ ldr x0, foo
+ adr x0, foo
+ adrp x0, foo
+ add x0, x0, :lo12:foo
diff --git a/ld/testsuite/ld-elf/binutils.exp b/ld/testsuite/ld-elf/binutils.exp
index 4d91105..249fa2a 100644
--- a/ld/testsuite/ld-elf/binutils.exp
+++ b/ld/testsuite/ld-elf/binutils.exp
@@ -34,7 +34,12 @@ if { [istarget *-*-linux*aout*]
return
}
-proc binutils_test { prog_name ld_options test } {
+# The optional test_name argument provides a mechanism for the caller
+# to hardwire the test name. This is important if ld_options contains
+# absolute path names because the default test name is constructed
+# from the prog_name and ld_options and we do not want absolute paths
+# to appear in the test_name.
+proc binutils_test { prog_name ld_options test {test_name ""}} {
global as
global ld
global READELF
@@ -45,7 +50,10 @@ proc binutils_test { prog_name ld_options test } {
global link_output
eval set prog \$$prog_name
- set test_name "$prog_name $ld_options ($test)"
+
+ if { "$test_name" == "" } {
+ set test_name "$prog_name $ld_options ($test)"
+ }
if { ![ld_assemble $as $srcdir/$subdir/$test.s tmpdir/$test.o ] } {
unresolved "$test_name"
@@ -123,7 +131,7 @@ if { ([istarget "i?86-*-elf*"]
binutils_test objcopy "-z relro -shared" relro2
}
-binutils_test strip "-T ${srcdir}/${subdir}/lma.lnk" lma
+binutils_test strip "-T ${srcdir}/${subdir}/lma.lnk" lma "strip -T lma.lnk"
set tls_tests { "tdata1" "tdata2" }
# hppa64 has its own .tbss section, with different flags.
diff --git a/ld/testsuite/ld-elf/group8a.d b/ld/testsuite/ld-elf/group8a.d
index bad4123..753eb0f 100644
--- a/ld/testsuite/ld-elf/group8a.d
+++ b/ld/testsuite/ld-elf/group8a.d
@@ -1,7 +1,7 @@
#source: group8.s
#ld: -r --gc-sections --entry foo
#readelf: -g --wide
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/group8b.d b/ld/testsuite/ld-elf/group8b.d
index fb37198..107ff69 100644
--- a/ld/testsuite/ld-elf/group8b.d
+++ b/ld/testsuite/ld-elf/group8b.d
@@ -1,7 +1,7 @@
#source: group8.s
#ld: -r --gc-sections --entry bar
#readelf: -g --wide
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/group9a.d b/ld/testsuite/ld-elf/group9a.d
index fd04c48..511cec7 100644
--- a/ld/testsuite/ld-elf/group9a.d
+++ b/ld/testsuite/ld-elf/group9a.d
@@ -1,7 +1,7 @@
#source: group9.s
#ld: -r --gc-sections --entry foo
#readelf: -g --wide
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: alpha-*-* hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/group9b.d b/ld/testsuite/ld-elf/group9b.d
index 3f19fd6..fd5b0c2 100644
--- a/ld/testsuite/ld-elf/group9b.d
+++ b/ld/testsuite/ld-elf/group9b.d
@@ -1,7 +1,7 @@
#source: group9.s
#ld: -r --gc-sections --entry bar
#readelf: -g --wide
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: alpha-*-* hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
#xfail: cr16-*-* crx-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/pr12851.d b/ld/testsuite/ld-elf/pr12851.d
index fb61c5a..9160142 100644
--- a/ld/testsuite/ld-elf/pr12851.d
+++ b/ld/testsuite/ld-elf/pr12851.d
@@ -2,7 +2,7 @@
#source: start.s
#ld: --gc-sections
#readelf: -s --wide
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/pr12975.d b/ld/testsuite/ld-elf/pr12975.d
index b361cc2..abdb571 100644
--- a/ld/testsuite/ld-elf/pr12975.d
+++ b/ld/testsuite/ld-elf/pr12975.d
@@ -1,7 +1,7 @@
#ld: --gc-sections -shared -version-script pr12975.t
#readelf: -s --wide
#target: *-*-linux* *-*-gnu*
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/pr13177.d b/ld/testsuite/ld-elf/pr13177.d
index e56e865..f32e15d 100644
--- a/ld/testsuite/ld-elf/pr13177.d
+++ b/ld/testsuite/ld-elf/pr13177.d
@@ -2,7 +2,7 @@
#ld: --gc-sections -shared
#readelf: -s -D --wide
#target: *-*-linux* *-*-gnu*
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elf/pr13195.d b/ld/testsuite/ld-elf/pr13195.d
index 796102b..88c6278 100644
--- a/ld/testsuite/ld-elf/pr13195.d
+++ b/ld/testsuite/ld-elf/pr13195.d
@@ -1,7 +1,7 @@
#ld: --gc-sections -shared -version-script pr13195.t
#readelf: -s --wide -D
#target: *-*-linux* *-*-gnu*
-#notarget: arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
+#notarget: aarch64*-*-* arc-*-* d30v-*-* dlx-*-* i960-*-* or32-*-* pj*-*-*
#notarget: hppa64-*-* i370-*-* i860-*-* ia64-*-* mep-*-* mn10200-*-*
# generic linker targets don't support --gc-sections, nor do a bunch of others
diff --git a/ld/testsuite/ld-elfvers/vers.exp b/ld/testsuite/ld-elfvers/vers.exp
index 4bea6e4..1e9ff53 100644
--- a/ld/testsuite/ld-elfvers/vers.exp
+++ b/ld/testsuite/ld-elfvers/vers.exp
@@ -47,6 +47,7 @@ if { ![istarget hppa*64*-*-hpux*]
&& ![istarget sparc*-*-elf]
&& ![istarget sparc*-*-solaris2*]
&& ![istarget sparc*-*-linux*]
+ && ![istarget aarch64*-*-linux*]
&& ![istarget arm*-*-linux*]
&& ![istarget mips*-*-linux*]
&& ![istarget alpha*-*-linux*]
diff --git a/ld/testsuite/ld-shared/shared.exp b/ld/testsuite/ld-shared/shared.exp
index 7ec304b..07fc881 100644
--- a/ld/testsuite/ld-shared/shared.exp
+++ b/ld/testsuite/ld-shared/shared.exp
@@ -57,6 +57,7 @@ if { ![istarget hppa*64*-*-hpux*] \
&& ![istarget rs6000*-*-aix*] \
&& ![istarget powerpc*-*-aix*] \
&& ![istarget s390*-*-linux*] \
+ && ![istarget aarch64*-*-linux*] \
&& ![istarget x86_64-*-linux*] } {
return
}
diff --git a/ld/testsuite/ld-srec/srec.exp b/ld/testsuite/ld-srec/srec.exp
index 7f13e9c..001fb2e 100644
--- a/ld/testsuite/ld-srec/srec.exp
+++ b/ld/testsuite/ld-srec/srec.exp
@@ -250,9 +250,12 @@ proc run_srec_test { test objs } {
setup_xfail "sh64*-*-*"
}
- if {[istarget arm*-*-*]} {
- # ARM targets cannot convert format in the linker
+ if {[istarget aarch64*-*-*] || \
+ [istarget arm*-*-*]} {
+ # ARM targets cannot convert format in the linker
# using the --oformat command line switch
+ setup_xfail "aarch64-*-*"
+ setup_xfail "aarch64_be-*-*"
setup_xfail "arm*-*-*"
}
diff --git a/ld/testsuite/lib/ld-lib.exp b/ld/testsuite/lib/ld-lib.exp
index a481ce7..f05d42c 100644
--- a/ld/testsuite/lib/ld-lib.exp
+++ b/ld/testsuite/lib/ld-lib.exp
@@ -1459,7 +1459,8 @@ proc check_gc_sections_available { } {
if {![info exists gc_sections_available_saved]} {
# Some targets don't support gc-sections despite whatever's
# advertised by ld's options.
- if {[istarget arc-*-*]
+ if {[istarget aarch64*-*-*]
+ || [istarget arc-*-*]
|| [istarget d30v-*-*]
|| [istarget dlx-*-*]
|| [istarget i960-*-*]