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Please find below a small patch that fixes the opcode generated for the "divwu" instruction for the RL78 target. This would be as per the opcode table provided by Renesas (Table 5.6 of RL78 Software Manual Rev.1.00 Jan 2011)
| DIVWU - { B3 (0xce, 0xfb, 0x04); } + { B3 (0xce, 0xfb, 0x0b); }
Cheers Nick
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