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[Patch, avr] Fix PR15281 : DWARF CIE def_cfa_offset incorrect for XMEGAS with >=128 KB flash
- From: Senthil Kumar Selvaraj <senthil_kumar dot selvaraj at atmel dot com>
- To: <binutils at sourceware dot org>
- Cc: <eric dot weddington at atmel dot com>, <joerg dot wunsch at atmel dot com>, <avr at gjlay dot de>
- Date: Fri, 15 Mar 2013 19:28:05 +0530
- Subject: [Patch, avr] Fix PR15281 : DWARF CIE def_cfa_offset incorrect for XMEGAS with >=128 KB flash
The cfa offset definition in the DWARF CIE for xmegas with 3 byte PCs
is set as 2, instead of 3. For devices with >= 128 KB flash, 3 bytes are
pushed on the stack as the return address, and hence the value of SP at the
call site (the CFA) will be off by 3, not 2.
This already works correctly for megas with >= 128 KB flash, so this patch
just extends it to xmega6 and xmega7 archs.
If ok, could someone apply please?
Regards
Senthil
ChangeLog
2013-03-15 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* tc-avr.c (mcu_has_3_byte_pc): Add
(tc_cfi_frame_initial_instructions): Call it to find return address size
diff --git gas/config/tc-avr.c gas/config/tc-avr.c
index 0bc972e..efb5fc1 100644
--- gas/config/tc-avr.c
+++ gas/config/tc-avr.c
@@ -1587,11 +1587,19 @@ avr_cons_fix_new (fragS *frag,
pexp_mod_data = &exp_mod_data[0];
}
+static unsigned int mcu_has_3_byte_pc (void)
+{
+ int mach = avr_mcu->mach;
+ return mach == bfd_mach_avr6
+ || mach == bfd_mach_avrxmega6
+ || mach == bfd_mach_avrxmega7;
+}
+
void
tc_cfi_frame_initial_instructions (void)
{
/* AVR6 pushes 3 bytes for calls. */
- int return_size = (avr_mcu->mach == bfd_mach_avr6 ? 3 : 2);
+ int return_size = (mcu_has_3_byte_pc() ? 3 : 2);
/* The CFA is the caller's stack location before the call insn. */
/* Note that the stack pointer is dwarf register number 32. */