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Fix some MIPS operand typos
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: binutils at sourceware dot org
- Date: Sun, 23 Jun 2013 21:12:59 +0100
- Subject: Fix some MIPS operand typos
Noticed these while working on something else. Applied.
Richard
include/opcode/
* mips.h: Fix comment typo: "G" is _RS rather than _RD for microMIPS.
gas/
* config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
Index: include/opcode/mips.h
===================================================================
--- include/opcode/mips.h 2013-06-23 16:12:03.048236213 +0100
+++ include/opcode/mips.h 2013-06-23 20:49:32.410068693 +0100
@@ -1811,7 +1811,7 @@ #define MICROMIPSOP_MASK_EVAOFFSET 0x1ff
Coprocessor instructions:
"E" 5-bit target register (MICROMIPSOP_*_RT)
- "G" 5-bit destination register (MICROMIPSOP_*_RD)
+ "G" 5-bit destination register (MICROMIPSOP_*_RS)
"H" 3-bit sel field for (D)MTC* and (D)MFC* (MICROMIPSOP_*_SEL)
"+D" combined destination register ("G") and sel ("H") for CP0 ops,
for pretty-printing in disassembly only
Index: gas/config/tc-mips.c
===================================================================
--- gas/config/tc-mips.c 2013-06-23 20:49:30.866055991 +0100
+++ gas/config/tc-mips.c 2013-06-23 20:49:32.392068544 +0100
@@ -11386,8 +11386,8 @@ mips_ip (char *str, struct mips_cl_insn
continue;
case '3':
- /* DSP 3-bit unsigned immediate in bit 13 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 3-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 13 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_SA3 : OP_MASK_SA3);
@@ -11405,8 +11405,8 @@ mips_ip (char *str, struct mips_cl_insn
continue;
case '4':
- /* DSP 4-bit unsigned immediate in bit 12 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 4-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 12 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_SA4 : OP_MASK_SA4);
@@ -11424,8 +11424,8 @@ mips_ip (char *str, struct mips_cl_insn
continue;
case '5':
- /* DSP 8-bit unsigned immediate in bit 13 (for standard MIPS
- code) or 16 (for microMIPS code). */
+ /* DSP 8-bit unsigned immediate in bit 16 (for standard MIPS
+ code) or 13 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_IMM8 : OP_MASK_IMM8);
@@ -11443,8 +11443,8 @@ mips_ip (char *str, struct mips_cl_insn
continue;
case '6':
- /* DSP 5-bit unsigned immediate in bit 16 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 5-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 16 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_RS : OP_MASK_RS);
@@ -11461,7 +11461,9 @@ mips_ip (char *str, struct mips_cl_insn
}
continue;
- case '7': /* Four DSP accumulators in bits 11,12. */
+ case '7':
+ /* Four DSP accumulators in bit 11 (for standard MIPS code)
+ or 14 (for microMIPS code). */
if (s[0] == '$' && s[1] == 'a' && s[2] == 'c'
&& s[3] >= '0' && s[3] <= '3')
{
@@ -11509,8 +11511,8 @@ mips_ip (char *str, struct mips_cl_insn
break;
case '0':
- /* DSP 6-bit signed immediate in bit 16 (for standard MIPS
- code) or 20 (for microMIPS code). */
+ /* DSP 6-bit signed immediate in bit 20 (for standard MIPS
+ code) or 16 (for microMIPS code). */
{
long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_DSPSFT : OP_MASK_DSPSFT);