Re: [PATCH 2/6] x86/MPX: fix address size handling

["H.J. Lu" <hjl dot tools at gmail dot com>]

On Wed, Oct 9, 2013 at 12:30 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 08.10.13 at 17:32, "H.J. Lu" <hjl.tools@gmail.com> wrote:
>> On Tue, Oct 8, 2013 at 8:20 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>>> On 08.10.13 at 17:15, "H.J. Lu" <hjl.tools@gmail.com> wrote:
>>>> On Tue, Oct 8, 2013 at 7:41 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>>> While address overrides are ignored in 64-bit mode (and hence shouldn't
>>>>> result in an error), trying to use 16-bit addressing is documented to
>>>>> result in #UD, and hence the assembler should reject the attempt.
>>>>>
>>>>> gas/
>>>>> 2013-10-08  Jan Beulich <jbeulich@suse.com>
>>>>>
>>>>>         * tc-i386.c (md_assemble): Alter address size checking for MPX
>>>>>         instructions.
>>>>>
>>>>> --- 2013-10-07/gas/config/tc-i386.c
>>>>> +++ 2013-10-07/gas/config/tc-i386.c
>>>>> @@ -3549,10 +3549,15 @@ md_assemble (char *line)
>>>>>    if (i.bnd_prefix && !i.tm.opcode_modifier.bndprefixok)
>>>>>      as_bad (_("expecting valid branch instruction after `bnd'"));
>>>>>
>>>>> -  if (i.tm.cpu_flags.bitfield.cpumpx
>>>>> -      && flag_code == CODE_64BIT
>>>>> -      && i.prefix[ADDR_PREFIX])
>>>>> -    as_bad (_("32-bit address isn't allowed in 64-bit MPX instructions."));
>>>>
>>>> It is done on purpose.  When 32-bit address prefix in 64-bit is ignored,
>>>> MPX doesn't work correctly for x32.
>>>
>>> I don't understand: It _is_ being ignored by the hardware as per
>>> the documentation. So x32 need to get along with that. Maybe
>>> an example would help, so I could understand why you think
>>> this _needs_ to be an error...
>>>
>>
>> X32 won't work with MPX since hardware assumes pointer
>> size is always 64 bit in 64-bit mode with or without address
>> size prefix.  MPX depends on correct pointer size to work.
>> I don't want people to use MPX in x32 by accident.
>
> This seems even more odd - why would x32 be excluded from
> using MPX? Again - an example might help, as my understanding
> so far was that the implicit zero extension of results of 32-bit
> operations should guarantee the half width pointers to be quite
> fine to use as full width values (i.e. in other memory operands
> I don't see why you would want to use 32-bit addressing either,
> except when the wraparound case matters, as might e.g. be
> the case with EIP-relative addressing).

In 64-bit mode, bndldx and bndstx ignore the lower 3 bits of
the address of a pointer, which is OK when pointers are
64-bit aligned. X32 runs in 64-bit mode. But pointers are
32-bit aligned.  That means 2 pointers may point to the same
bound table entry.  That is why MPX won't work for x32 and
assembler shouldn't allow it.


-- 
H.J.